Abstract: A method for improving the processing of MP3 decoding includes decoding Huffman encoded data into audio samples according to side information, determining a first group of audio samples having a predefined audio characteristic outside a range running from a first predetermined value to a second predetermined value inclusive, determining a second group of audio samples having the predefined audio characteristic inside said range, and performing fewer arithmetic operations on the first group of audio samples than on the second group of audio samples. Performing fewer arithmetic operations on the first group of audio samples than on the second group of audio samples includes no subsequent arithmetic operations are performed on the first group of audio samples or fewer bits are utilized to represent the first group of audio samples than to represent the second group of audio samples.

Abstract: A method for controlling an apparatus to perform a multi-layer chemical mechanical polishing (CMP) process with a polishing rate for a plurality of process runs. For each process run, a multilayered structure with a first thickness formed on a wafer is polished and a second thickness of the multilayered structure is predetermined to be polished away. The method comprises steps of receiving a post-CMP thickness information of the multilayered structure of a first process run, wherein for the first process run, the CMP process is performed for a first CMP process time. Then, a second CMP process time is determined according to the first CMP process time, the first thickness and the post-CMP thickness. Further, the second CMP process time is provided to the apparatus for processing a second process run posterior to the first process run.

Abstract: A method for controlling an apparatus to perform a multi-layer chemical mechanical polishing (CMP) process with a polishing rate for a plurality of process runs. For each process run, a multilayered structure with a first thickness formed on a wafer is polished and a second thickness of the multilayered structure is predetermined to be polished away. The method comprises steps of receiving a post-CMP thickness information of the multilayered structure of a first process run, wherein for the first process run, the CMP process is performed for a first CMP process time. Then, a second CMP process time is determined according to the first CMP process time, the first thickness and the post-CMP thickness. Further, the second CMP process time is provided to the apparatus for processing a second process run posterior to the first process run.

Abstract: A look-up table which is required during looking up table for data transferring and a method for looking up table are provided. The method reduces the size of the look-up table used in the method for looking up table by simplifying the calculations. A reasonable error range is obtained for the required look-up table by adjusting appropriate modifiers. The method can be applied in the method for looking up table similar to the Q ? ( x ) = x B A calculation in the digital signal coder/decoder (CODEC), where both A and B are integers, and the calculation is more efficient if B/A is close to 1 or smaller than 1.

Abstract: A method of photolithography. An anti-reflective coating is formed on the conductive layer. An nitrogen plasma treatment is performed. A photo-resist layer is formed and patterned on the anti-reflective coating. The conductive layer is defined. The photo-resist layer is removed. The anti-reflective layer is removed by using phosphoric acid.

Abstract: A method of photolithography. An anti-reflective coating is formed on the conductive layer. An nitrogen plasma treatment is performed. A photo-resist layer is formed and patterned on the anti-reflective coating. The conductive layer is defined. The photo-resist layer is removed. The anti-reflective layer is removed by using phosphoric acid.

Abstract: A method of forming a fluorinated silicon oxide layer or an FSG film having a dielectric constant less than 3.2 is disclosed. The method includes introducing a fluorine-rich gas into a reacting chamber, introducing an oxygen-rich gas into the reacting chamber, creating a plasma environment in the reacting chamber to deposit the FSG film, and adjusting the flow rate of the oxygen-rich gas till the ratio of the flow rate of the oxygen-rich gas to the total flow rate of the fluorine-rich gas and silicon-rich gas is less than or equal to a pre-selected value to form the FSG film. The refraction index (RI) of the fluorinated silicon oxide layer must be greater than or equal to 1.46.

Abstract: A method is provided for forming fluorosilicate glass (FSG) layers that serve as inter-metal dielectric (IMD) layers in a semiconductor wafer with a high moisture-resistant capability. In particular, the method can nonetheless allow the resultant semiconductor circuit to have a low RC delay. The method includes the step of subjecting the FSG layer to a plasma treatment so as to form a moisture-resistant layer over the FSG layer. In the plasma treatment, the ionized gas of ammonia is used as the plasma. As a result of this plasma treatment, a layer of nitrogen-containing compound having a high moisture-resistant property is formed over the FSG layer, which serves as a moisture-resistant layer that can protect the FSG layer from absorbing moistures.

Abstract: A method for fabricating a passivation layer on a metal pad. A conformal first silicon dioxide layer is formed on a substrate having a metal pad. A conformal first silicon nitride layer is formed on the first silicon dioxide layer, and then a second silicon dioxide layer is formed on the first silicon nitride layer by high density plasma chemical vapor deposition. The second silicon dioxide layer is planarized to expose the first silicon nitride layer. A portion of the first silicon nitride layer aligned over the metal pad is removed to expose the first silicon dioxide layer. A second silicon nitride layer is formed to cover the first silicon dioxide layer and the second silicon dioxide layer. In the above process, a thickness of the first silicon dioxide layer and a thickness of the second silicon nitride layer are precisely controlled.

Abstract: A method of fabricating a shallow trench isolation includes formation of a trench in a substrate. A high-density plasma chemical vapor deposition is performed with a plasma which does not contain argon gas. A liner oxide layer is formed on the substrate exposed in the trench. Another high-density plasma chemical vapor deposition is performed. A silicon oxide layer is formed. Then, some follow-up steps are performed to complete the shallow trench isolation.

Abstract: A method for depositing a silicon oxynitride layer that has a higher etch-removal rate. The deposition starts by first passing gas from a pipeline A into the deposition chamber before switching the RF power source on. The further is the delay in switching the RF power source on, the higher will be the etch-removal rate of the silicon oxynitride layer formed by the deposition. Furthermore, the RF power source will remain on for a short period after the pump starts pumping gas away from the deposition chamber through pipeline A at the end of the deposition. The sooner is the switching off of the RB power source after the pump start to operate, the higher will be the etch-removal rate of the silicon oxynitride layer that result from the deposition.

Abstract: A method of fabricating shallow trench isolation with multi-step HDP process for avoiding kinks is described. This method is to form two insulator layers with different etching rates, the etching rate of outer insulator layer being slower than that of inner insulator layer. Additionally, use of a multi-step HDP process produces better gapfilling and avoid clipping phenomenon in shallow trench isolations. This method comprises the following steps. A substrate having a mask layer thereabove is provided. A pattern is defined on the mask layer to form a trench. Then, a first insulator layer, which covers the inner wall of the trench and the top surface of the mask layer, is formed. Next, a second insulator layer is formed in the trench and over the first insulator layer, the etching rate of the first insulator layer being slower than that of the second insulator layer. The first and the second insulator layer are removed, using said mask layer as a etching stop layer.

Abstract: A method for forming an isolating trench in a substrate is disclosed herein. The forgoing method includes the following steps. First, form a first dielectric layer and a second dielectric layer on the substrate subsequently, and then develop a photoresist pattern on the second dielectric layer. Then, etch the substrate, the first dielectric layer and the second dielectric layer to form a trench in the substrate. Next, form a first silicon dioxide layer in the trench followed by removing the photoresist pattern. The next step is to form a third dielectric layer on the second dielectric layer and the first silicon dioxide layer. Subsequently, fill the trench with silicon dioxide to from an oxide trench; then remove the second dielectric layer, a first portion of the third dielectric layer and a portion of the oxide trench with a chemical mechanical polishing (CMP) and a first solution.

Abstract: A shallow trench isolation structure is formed by providing a polish stop layer with an opening aligned with edges of a trench formed in the substrate. The etch stop layer might have a surface composition of SiO.sub.x N.sub.y and a composition of SiN or Si.sub.3 N.sub.4 at a lower surface within the polish stop layer. The composition of the silicon oxynitride surface of the polish stop layer is most preferably chosen so that the material has a refractive index on the order of n.about.1.8 to 2.0. The trench is overfilled with silicon oxide so that a layer of silicon oxide extends over the surface of the etch stop layer. Chemical mechanical polishing is then performed to remove the excess silicon oxide from the surface of the etch stop layer and to define an oxide plug within the trench.