Patents by Inventor CHIH HSUAN WANG

CHIH HSUAN WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130256655
    Abstract: An active device is disposed on a substrate. The active device includes a metal layer, a semiconductor channel layer, an insulating layer, a source and a drain. The metal layer has a metal oxide surface away from the substrate. The insulating layer is disposed between the metal layer and the semiconductor channel layer. The source and the drain are disposed at one side of the semiconductor channel layer. A portion of the semiconductor channel layer is exposed between the source and the drain. An orthogonal projection of the metal layer on the substrate at least covers an orthogonal projection of the portion of the semiconductor channel layer exposed by the source and the drain on the substrate.
    Type: Application
    Filed: December 26, 2012
    Publication date: October 3, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Chih-Hsuan Wang, Chia-Chun Yeh, Ted-Hong Shinn
  • Publication number: 20130187149
    Abstract: Disclosed herein is a thin film transistor. The thin film transistor is characterized in having a source interconnect layer and a drain interconnect layer. The source electrode and the drain electrode are respectively disposed above and in contact with the source interconnect layer and the drain interconnect layer. The semiconductor layer is in contact with both the source interconnect layer and the drain interconnect layer, but is not in contact with the source electrode and the drain electrode.
    Type: Application
    Filed: September 14, 2012
    Publication date: July 25, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Henry WANG, Chia-Chun YEH, Xue-Hung TSAI, Chih-Hsuan WANG, Ted-Hong SHINN
  • Publication number: 20130087781
    Abstract: A metal oxide thin film transistor (TFT) includes a gate electrode, a gate insulating layer, a metal oxide active layer, a source electrode, and a drain electrode. The gate electrode is formed on a substrate. The gate insulating layer is formed on the substrate and covers the gate electrode. The metal oxide active layer is formed on the gate insulating layer. The drain electrode and the source electrode are formed on two opposite ends of the metal oxide active layer in a spaced-apart manner, in which at least one of the orthographic projection of the source electrode and the orthographic projection of the drain to electrode on the substrate does not overlap the gate electrode.
    Type: Application
    Filed: August 22, 2012
    Publication date: April 11, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Chia-Chun YEH, Henry WANG, Xue-Hung TSAI, Chih-Hsuan WANG
  • Publication number: 20120287772
    Abstract: A method for performing serial transport communication is provided, where the method is utilized for performing communication between a plurality of devices, each of which provides a user with a plurality of wireless communication functions respectively complying with different wireless communication standards. The method includes: with regard to a first wireless communication function of the plurality of wireless communication functions, utilizing a serial transport protocol to perform communication between the plurality of devices through a transport bus; and with regard to a second wireless communication function of the plurality of wireless communication functions, utilizing the serial transport protocol to perform communication between the plurality of devices through the transport bus. An associated device is also provided.
    Type: Application
    Filed: November 1, 2011
    Publication date: November 15, 2012
    Inventors: Wei-Lun Wan, Hsien-Chang Liu, Shuo-Jen Hsu, Chia-Hsuan Chuang, Chih-Hsuan Wang, Juei-Ting Sun
  • Publication number: 20120262997
    Abstract: A method for searching an optimum value of a memory includes the following steps. A first and a second phase delay values of the memory are sequentially set to a plurality of first values and a plurality of second values respectively amounts of combinations of the first values combining with the second values passing a reading and writing test is recorded. A portion of the first values that the amounts of the corresponding combinations passing the reading and writing test is greater than a threshold is selected. A first value near a median of the selected first values is selected as a first optimum value for setting the first phase delay value. A portion of second values passing the reading and writing test is recorded. A second value near a median of the recording second values is selected as a second optimum value for setting the second phase delay value.
    Type: Application
    Filed: April 13, 2011
    Publication date: October 18, 2012
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventor: CHIH-HSUAN WANG
  • Publication number: 20110105025
    Abstract: An adaptive tuning method comprises the steps of: obtaining a statistical result; determining whether an adaptive tuning procedure is to be performed in accordance with the statistical result; obtaining reference information of the first wireless module; and performing the adaptive tuning procedure in accordance with the reference information.
    Type: Application
    Filed: March 5, 2010
    Publication date: May 5, 2011
    Applicant: RALINK TECHNOLOGY CORPORATION
    Inventors: CHIH HSUAN WANG, HAO SHENG HSU