Patents by Inventor Chih-Hung Pan
Chih-Hung Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170117465Abstract: A resistive random access memory does not encounter the undesired effects caused by sneak current which occurs when a conventional resistive random access memory operates in an integrated circuit. The resistive random access memory includes a first electrode layer, a first insulating layer, an oxygen-containing layer, a second insulating layer and a second electrode layer. The first insulating layer is arranged on the first electrode layer. The oxygen-containing layer is arranged on the first insulating layer and includes an oxide doped with a metal element. The metal element does not exceed 10% of the oxygen-containing layer. The second insulating layer is arranged on the oxygen-containing layer, and the second electrode layer is arranged on the second insulating layer. In this arrangement, the undesired effects caused by sneak current can be effectively eliminated.Type: ApplicationFiled: December 3, 2015Publication date: April 27, 2017Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Chih-Cheng Shih, Chih-Hung Pan
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Publication number: 20170117466Abstract: A resistive random access memory overcomes the difficulty in reducing the forming voltage thereof. The resistive random access memory includes a first electrode layer, a separating portion, a lateral wall portion, an oxygen-containing rheostatic layer and a second electrode layer. The separating portion is arranged on the first electrode layer and forms a through-hole. The first electrode layer is exposed via the through-hole. The lateral wall portion is annularly arranged on an inner periphery of the separating portion defining the through-hole. The lateral wall portion is connected to the first electrode layer and includes a first dielectric. The oxygen-containing rheostatic layer covers the first electrode layer, the separating portion and the lateral wall portion. The oxygen-containing rheostatic layer includes a second dielectric smaller than the first dielectric. The second electrode layer is arranged on the oxygen-containing rheostatic layer.Type: ApplicationFiled: December 3, 2015Publication date: April 27, 2017Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
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Publication number: 20170110658Abstract: A resistive random access memory includes a first electrode, a separating medium, a resistance changing layer and a second electrode. The first electrode has a mounting face. The separating medium has a first face in contact with the mounting face, a second face opposite to the first face, and an inner face extending between the first and second faces. The separating medium forms a through hole extending from the first to second face. A part of the mounting face is not covered by the separating medium. The separating medium has a first dielectric. The resistance changing layer extends along the part of the mounting face as well as the inner and second faces. The resistance changing layer has a second dielectric having a dielectric constant larger than a dielectric constant of the first dielectric by 2 or less. The second electrode is arranged on the resistance changing layer.Type: ApplicationFiled: December 29, 2016Publication date: April 20, 2017Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
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Patent number: 9620211Abstract: A maintaining device and a maintenance method for maintaining the normal operation of a resistive random access memory are disclosed. The maintenance method can be executed by the maintaining device. Said memory includes first and second electrodes. The first electrode is not grounded. The maintaining device is connected to the first electrode so that the first electrode receives an operational signal and a restoring signal generated by the maintaining device. The operational signal transits from a zero voltage to a non-zero voltage and then to the zero voltage. If the operational signal has already transited from the non-zero voltage to the zero voltage, the maintenance method controls the restoring signal to transit from the zero voltage to a negative voltage, controls the restoring signal to remain the negative voltage for a period of restoring time, and controls the restoring signal to transit from the negative voltage to the zero voltage.Type: GrantFiled: July 6, 2016Date of Patent: April 11, 2017Assignee: National Sun Yat-Sen UniversityInventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Yu-Ting Su, Chih-Hung Pan
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Publication number: 20170025607Abstract: A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.Type: ApplicationFiled: October 7, 2016Publication date: January 26, 2017Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
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Patent number: 9502647Abstract: A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a resistance-switching network disposed between the pair of electrodes. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer. The group-IV doping layer comprises silicon oxide doped with a group-IV element. The porous low-k layer comprises porous silicon oxide or porous hafnium oxide. The group-IV element may comprise zirconium, titanium, or hafnium. The porous low-k layer may be prepared by inductively coupled plasma (ICP) treatment. A method of fabricating a resistive memory is disclosed. The method comprises forming a resistance-switching network on a first electrode using sputtering and forming a second electrode on the resistance-switching network using sputtering. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer.Type: GrantFiled: May 28, 2014Date of Patent: November 22, 2016Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Chih-Hung Pan, Ying-Lang Wang, Kei-Wei Chen, Shih-Chieh Chang, Te-Ming Kung
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Patent number: 9496493Abstract: A resistive random access memory includes two electrode layers and a resistive switching layer mounted between the two electrode layers. The resistive switching layer consists essentially of insulating material with oxygen, metal material, and mobile ions. The polarity of the mobile ions is opposite to the polarity of oxygen ions. A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.Type: GrantFiled: December 8, 2014Date of Patent: November 15, 2016Assignee: NATIONAL SUN YAT-SEN UNIVERSITYInventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
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Publication number: 20160240777Abstract: A resistive random access memory including a first electrode, a separating medium, a resistance changing layer and a second electrode is disclosed. The first electrode has a mounting face. The separating medium is arranged on the first electrode and forms a through hole. A part of the first electrode is not covered by the separating medium. The separating medium has a first dielectric. The resistance changing layer extends along the part of the first electrode as well as along an inner face and the second face of the separating medium. The resistance changing layer has a second dielectric having a dielectric constant larger than a dielectric constant of the first dielectric by 2 or less. The second electrode is arranged on the resistance changing layer. In this arrangement, the problem of unstable forming voltage of the conventional resistive random access memory can be solved.Type: ApplicationFiled: June 9, 2015Publication date: August 18, 2016Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
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Publication number: 20160118579Abstract: A resistive random access memory includes two electrode layers and a resistive switching layer mounted between the two electrode layers. The resistive switching layer consists essentially of insulating material with oxygen, metal material, and mobile ions. The polarity of the mobile ions is opposite to the polarity of oxygen ions. A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.Type: ApplicationFiled: December 8, 2014Publication date: April 28, 2016Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
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Publication number: 20160111640Abstract: A resistive random access memory including two electrode layers and a multi-resistance layer mounted between the two electrode layers. The multi-resistance layer consists essentially of insulating material with oxygen and lithium ions. The number of resistance states of a memory element can be increased by the resistive random access memory to increase the integration density of a memory module having a plurality of memory elements.Type: ApplicationFiled: December 3, 2014Publication date: April 21, 2016Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
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Patent number: 9287501Abstract: A resistive random access memory includes an oxygen-poor layer disposed on a first electrode layer and formed by indium tin oxide, indium oxide, tin dioxide, or zinc oxide. An insulating layer is disposed on the oxygen-poor layer and is formed by silicon dioxide or hafnium oxide. A second electrode layer is disposed on the insulating layer. A method for producing a resistive random access memory includes preparing a first electrode layer. An oxygen-poor layer is then formed on the first electrode layer. The oxygen-poor layer is formed by indium tin oxide, indium oxide, tin dioxide, or zinc oxide. Next, an insulating layer is formed on the oxygen-poor layer. The insulating layer formed by silicon dioxide or hafnium oxide. A second electrode layer is then formed on the insulating layer.Type: GrantFiled: December 17, 2014Date of Patent: March 15, 2016Assignee: NATIONAL SUN YAT-SEN UNIVERSITYInventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Chih-Hung Pan
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Patent number: 9281475Abstract: A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a multi-layer resistance-switching network disposed between the pair of electrodes. The multi-layer resistance-switching network comprises a pair of carbon doping layers and a group-IV element doping layer disposed between the pair of carbon doping layers. Each carbon doping layer comprises silicon oxide doped with carbon. The group-IV doping layer comprises silicon oxide doped with a group-IV element. A method of fabricating a resistive memory cell is also disclosed. The method comprises forming a first carbon doping layer on a first electrode using sputtering, forming a group-IV element doping layer on the first carbon doping layer using sputtering, forming a second carbon doping layer on the group-IV element doping layer using sputtering, and forming a second electrode on the second carbon doping layer using sputtering.Type: GrantFiled: May 28, 2014Date of Patent: March 8, 2016Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Chih-Hung Pan, Ying-Lang Wang, Kei-Wei Chen, Shih-Chieh Chang, Te-Ming Kung
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Publication number: 20150349250Abstract: A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a multi-layer resistance-switching network disposed between the pair of electrodes. The multi-layer resistance-switching network comprises a pair of carbon doping layers and a group-IV element doping layer disposed between the pair of carbon doping layers. Each carbon doping layer comprises silicon oxide doped with carbon. The group-IV doping layer comprises silicon oxide doped with a group-IV element. A method of fabricating a resistive memory cell is also disclosed. The method comprises forming a first carbon doping layer on a first electrode using sputtering, forming a group-IV element doping layer on the first carbon doping layer using sputtering, forming a second carbon doping layer on the group-IV element doping layer using sputtering, and forming a second electrode on the second carbon doping layer using sputtering.Type: ApplicationFiled: May 28, 2014Publication date: December 3, 2015Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: TING-CHANG CHANG, KUAN-CHANG CHANG, TSUNG-MING TSAI, CHIH-HUNG PAN, YING-LANG WANG, KEI-WEI CHEN, SHIH-CHIEH CHANG, TE-MING KUNG
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Publication number: 20150349251Abstract: A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a resistance-switching network disposed between the pair of electrodes. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer. The group-IV doping layer comprises silicon oxide doped with a group-IV element. The porous low-k layer comprises porous silicon oxide or porous hafnium oxide. The group-IV element may comprise zirconium, titanium, or hafnium. The porous low-k layer may be prepared by inductively coupled plasma (ICP) treatment. A method of fabricating a resistive memory is disclosed. The method comprises forming a resistance-switching network on a first electrode using sputtering and forming a second electrode on the resistance-switching network using sputtering. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer.Type: ApplicationFiled: May 28, 2014Publication date: December 3, 2015Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: TING-CHANG CHANG, KUAN-CHANG CHANG, TSUNG-MING TSAI, CHIH-HUNG PAN, YING-LANG WANG, KEI-WEI CHEN, SHIH-CHIEH CHANG, TE-MING KUNG
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Patent number: 8828757Abstract: A light-emitting device and method for manufacturing the same are described. A method for manufacturing a light-emitting device comprising steps of: providing a growth substrate, wherein the growth substrate has a first surface and a second surface; forming a light-absorbable layer on the first surface of the growth substrate; forming an illuminant epitaxial structure on the light absorbable layer; providing a laser beam and irradiating the second surface of the growth substrate, wherein the laser beam wavelength is greater than 1000 nm; and removing the growth substrate.Type: GrantFiled: August 15, 2011Date of Patent: September 9, 2014Assignee: Epistar CorporationInventors: Chih-Yuan Lin, Shih-Yi Lien, Cheng-Hsing Chiang, Chih-Hung Pan
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Publication number: 20130045551Abstract: A light-emitting device and method for manufacturing the same are described. A method for manufacturing a light-emitting device comprising steps of: providing a growth substrate, wherein the growth substrate has a first surface and a second surface; forming a light-absorbable layer on the first surface of the growth substrate; forming an illuminant epitaxial structure on the light absorbable layer; providing a laser beam and irradiating the second surface of the growth substrate, wherein the laser beam wavelength is greater than 1000 nm; and removing the growth substrate.Type: ApplicationFiled: August 15, 2011Publication date: February 21, 2013Applicant: Epistar CorporationInventors: Chih-Yuan Lin, Shih-Yi Lien, Cheng-Hsing Chiang, Chih-Hung Pan
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Patent number: 8316362Abstract: A method for updating a program section is disclosed; the method is used for an electronic system. The electronic system comprises a control unit and a storage device; the control unit is electrically connected with the storage device; the storage device comprises a program section; the program section comprises an application section and a boot section; the application section comprises a first bootloader and application information, wherein the first bootloader comprises a first driver. The method comprises the following steps of: connecting a data source device, wherein the data source device comprises update data; determining whether the first driver is able to drive the data source device or not; and if the first driver is able to drive the data source device, the first driver performs an updating procedure according to the update data.Type: GrantFiled: June 8, 2010Date of Patent: November 20, 2012Assignee: Wistron Neweb Corp.Inventors: Chih-Hung Pan, Hung-Hsiang Hsu, Shih-Chieh Tzeng
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Publication number: 20110010510Abstract: A method for updating a program section is disclosed; the method is used for an electronic system. The electronic system comprises a control unit and a storage device; the control unit is electrically connected with the storage device; the storage device comprises a program section; the program section comprises an application section and a boot section; the application section comprises a first bootloader and application information, wherein the first bootloader comprises a first driver. The method comprises the following steps of: connecting a data source device, wherein the data source device comprises update data; determining whether the first driver is able to drive the data source device or not; and if the first driver is able to drive the data source device, the first driver performs an updating procedure according to the update data.Type: ApplicationFiled: June 8, 2010Publication date: January 13, 2011Applicant: WISTRON NEWEB CORP.Inventors: Chih-Hung Pan, Hung-Hsiang Hsu, Shih-Chieh Tzeng