Abstract: A method for a network 300 including a plurality of nodes, the method including: detecting, at a first node (N2), that a second node (N1) is a failed node; recording, at the first node, that the second node is a failed node and that a first path is unavailable; switching, at the first node, to a second path, the second path including a third node (N6); checking, at the first node, the hop count of the third node, wherein the third node is the next hop on the second path; generating an information packet at the first node, wherein the information packet comprises a unique ID of the failed node and the hop count of the first node; broadcasting the information packet from the first node (N2) to one or more one-hop neighbouring nodes (N1, N3, N6) of the first node.

Abstract: A method for handling a broadcast data packet using a network (300) including a plurality of nodes (NH, N1, N2, N3, N4, N5, N6), the method including: receiving, at a sending node, the broadcast data packet; checking, at the sending node, whether the broadcast data packet has been received at the sending node on a previous occasion, wherein if the sending node has not previously received the broadcast data packet the sending node enters a broadcast delivery mode, the broadcast delivery mode including: switching to a scan mode to listen for advertisements from other nodes in the network; starting a timer; wherein upon receipt of an advertisement from a neighbouring node the sending node sends an instance of the broadcast data packet to the neighbouring node and resets the timer.

Abstract: A method for communicating data between Bluetooth Low Energy (BLE) devices in a network (100) including multiple nodes (200, 202). The method includes starting a scan mode at a first node (200) having data to send; and determining whether data to send has been transmitted to the first node from an upstream node or a downstream node. If the data to send was received from a downstream node, the first node begins a scan mode. If the data to send was received from an upstream node, the first node begins an ADV event.

Abstract: A method for communicating data between Bluetooth Low Energy (BLE) devices (200, 202) in a network (100) comprising multiple nodes, the method comprising: broadcasting data from a broadcasting node (200); receiving the data at multiple receiving nodes (202); transmitting an acknowledgement (ACK) packet from each of the receiving nodes (202) to the broadcasting node (200), wherein each receiving node (202) waits for a waiting period before transmitting the ACK packet, and wherein the waiting period is a varying length of time for each receiving node (202).

Abstract: There is provided a communications system comprising an access network node and a plurality of resource limited nodes. The access network node comprises: a control unit operable to estimate a belief on a network condition for a resource limited node of the plurality of resource limited nodes based on network observations and a history profile of the network observations; dynamically update the belief for the resource limited node in the access network node; determine that the severity of the updated belief in the network condition is indicative that a change in sleep duty cycle of the resource limited node is required; determine that correlation between the resource limited nodes within the plurality of resource limited nodes is indicative that a change in sleep duty cycle of the resource limited node is required; and update the sleep duty cycle of the resource limited node to optimize the overall energy consumed in the resource limited nodes while achieving a specific detection threshold.

Abstract: A capability for localization of a wireless tag based on wireless gateway association information uses a wireless tag supporting multiple states and wireless gateway association information associated with the wireless tag to control localization of the wireless tag. The wireless tag may support an unconnected state in which the wireless tag communicates location tracking information using a wireless beacon signal which may be detected by various wireless gateways and a connected state in which the wireless tag communicates location tracking information via one or more connections with one or more wireless gateways. The wireless gateway association information may include wireless gateway lists (e.g., whitelists, blacklists, or the like), association rules, notification rules, or the like. The wireless gateway association information may be used to control transitions of the wireless tag between the unconnected state and the connected state, to control notifications for the wireless tag, or the like.

Abstract: The present disclosure provides a housing assembly, and the housing assembly is applied to an electronic device. The housing assembly includes a first part and a second part. The first part includes at least one opening. The second part includes at least one mesh area. The mesh area deformably connects to the first part, and covers the opening.

Abstract: The present disclosure provides an electronic device. The electronic device includes a casing and a detachable unit. The casing includes an opening. The detachable unit is selectively disposed in the opening. The detachable unit includes a recognizing element. The detachable unit is provided for the electronic device provided in the present disclosure. In addition to having an electromagnetic shielding effect, the detachable unit can further provide various different functions, such as cooling, storage, display, communication, and accommodation. A user selects different detachable units according to needs. Therefore, the electronic device provided in the present disclosure helps improve user experience.

Abstract: A motherboard of a computer is provided. The motherboard of a computer includes a main body, a notch formed at a side edge of the main body, an auxiliary device, and a fixing device formed adjacent to the notch to fix the auxiliary device in the notch, wherein the auxiliary device is a light guiding device including patterns.

Abstract: The present disclosure provides a housing assembly, and the housing assembly is applied to an electronic device. The housing assembly includes a first part and a second part. The first part includes at least one opening. The second part includes at least one mesh area. The mesh area deformably connects to the first part, and covers the opening.

Abstract: The present disclosure provides an electronic device. The electronic device includes a casing and a detachable unit. The casing includes an opening. The detachable unit is selectively disposed in the opening. The detachable unit includes a recognizing element. The detachable unit is provided for the electronic device provided in the present disclosure. In addition to having an electromagnetic shielding effect, the detachable unit can further provide various different functions, such as cooling, storage, display, communication, and accommodation. A user selects different detachable units according to needs. Therefore, the electronic device provided in the present disclosure helps improve user experience.

Abstract: A method for forming flash memory units is provided. After a logic gate in a select gate PMOS transistor area is separated from a logic gate in a control gate PMOS transistor area, P-type impurities implanted into the logic gate in the select gate PMOS transistor area are diffused into an N-type floating gate polysilicon layer to convert the N-type floating gate into a P-type floating gate by a subsequent high temperature heating process, so that it is possible to successfully form a select gate PMOS transistor having a small surface channel threshold value in a 55 nm process flash memory unit, and achieve mass production. Further, a two-step growth process of the logic gate and a process for separating the logic gate can form a surface channel of the select gate PMOS transistor having a smaller threshold value without affecting the floating gate doping of the control gate PMOS transistor.

Abstract: A method for forming flash memory units is provided. After a logic gate in a select gate PMOS transistor area is separated from a logic gate in a control gate PMOS transistor area, P-type impurities implanted into the logic gate in the select gate PMOS transistor area are diffused into an N-type floating gate polysilicon layer to convert the N-type floating gate into a P-type floating gate by a subsequent high temperature heating process, so that it is possible to successfully form a select gate PMOS transistor having a small surface channel threshold value in a 55 nm process flash memory unit, and achieve mass production. Further, a two-step growth process of the logic gate and a process for separating the logic gate can form a surface channel of the select gate PMOS transistor having a smaller threshold value without affecting the floating gate doping of the control gate PMOS transistor.

Abstract: A capability for localization of a wireless tag based on wireless gateway association information uses a wireless tag supporting multiple states and wireless gateway association information associated with the wireless tag to control localization of the wireless tag. The wireless tag may support an unconnected state in which the wireless tag communicates location tracking information using a wireless beacon signal which may be detected by various wireless gateways and a connected state in which the wireless tag communicates location tracking information via one or more connections with one or more wireless gateways. The wireless gateway association information may include wireless gateway lists (e.g., whitelists, blacklists, or the like), association rules, notification rules, or the like. The wireless gateway association information may be used to control transitions of the wireless tag between the unconnected state and the connected state, to control notifications for the wireless tag, or the like.

Abstract: The present disclosure relates to semiconductor devices and discloses a method for operating a flash memory. When a read operation is performed on a flash memory unit, a potential of a first control line connected to gates of select gate PMOS transistors located in a same row is switched from a positive supply voltage to 0V. Since it is not required to switch the potential from a positive voltage to a negative voltage, the power consumption of the pump circuit is significantly reduced. In addition, a read current of the flash memory unit selected for reading can accurately represent the status of the unit being read thanks to the appropriate settings of the gate oxide layer thickness and the threshold voltage of the select gate PMOS transistor. Furthermore, high-voltage devices are removed from the read path and only low-voltage devices are used, so that the reading speed can be significantly improved during the read operation.

Abstract: A capability for localization of a wireless tag based on wireless gateway association information uses a wireless tag supporting multiple states and wireless gateway association information associated with the wireless tag to control localization of the wireless tag. The wireless tag may support an unconnected state in which the wireless tag communicates location tracking information using a wireless beacon signal which may be detected by various wireless gateways and a connected state in which the wireless tag communicates location tracking information via one or more connections with one or more wireless gateways. The wireless gateway association information may include wireless gateway lists (e.g., whitelists, blacklists, or the like), association rules, notification rules, or the like. The wireless gateway association information may be used to control transitions of the wireless tag between the unconnected state and the connected state, to control notifications for the wireless tag, or the like.

Abstract: A motherboard is provided. The motherboard includes a main body, a notch formed at a side edge of the main body, and a fixing device formed adjacent to the notch to fix an auxiliary device. The function of the motherboard is expanded significantly while artistic of the appearance of the motherboard is improved.

Abstract: The present disclosure relates to semiconductor devices and discloses a method for operating a flash memory. When a read operation is performed on a flash memory unit, a potential of a first control line connected to gates of select gate PMOS transistors located in a same row is switched from a positive supply voltage to 0V. Since it is not required to switch the potential from a positive voltage to a negative voltage, the power consumption of the pump circuit is significantly reduced. In addition, a read current of the flash memory unit selected for reading can accurately represent the status of the unit being read thanks to the appropriate settings of the gate oxide layer thickness and the threshold voltage of the select gate PMOS transistor. Furthermore, high-voltage devices are removed from the read path and only low-voltage devices are used, so that the reading speed can be significantly improved during the read operation.