Patents by Inventor Chih-Kuang Lin

Chih-Kuang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210274419
    Abstract: A method of operating an access control system including a plurality of access controls each operating as a node including: receiving a node information from one or more nodes of the access control system, the one or more nodes including an origination node and a destination node; determining one or more routes between the origination node and the destination node in response to the node information or a minimum hop distance between the originating node and the head node and a minimum hop distance between any intermediate routing node and the head node; receiving a reroute message indicating a failed node between the destination node and the origination node; and determining an alternate path from the origination node to the destination node around the failed node in response to the one or more routes.
    Type: Application
    Filed: November 7, 2019
    Publication date: September 2, 2021
    Inventors: Chih-Kuang Lin, Adam Kuenzi, Michael Lang, Ankit Tiwari, Davide Villa
  • Publication number: 20210266814
    Abstract: A method of operating an access control system comprising a plurality of access controls, the method comprising: determining an energy metric of each of the plurality of access controls; determining a latency metric of each of the plurality of access controls; transmitting the energy metric of each of the plurality of access controls; transmitting the latency metric of each of the plurality of access controls; collecting the energy metric and the latency metric at a head node or collecting energy metric at each of the plurality of access controls from a 1-hop transmission distance; and determining a data route through the plurality of access controls in response to the energy metric of each of the plurality of access controls and the latency metric of each of the plurality of access controls.
    Type: Application
    Filed: September 26, 2019
    Publication date: August 26, 2021
    Inventors: Chih-Kuang LIN, Piyush AGRAWAL, Ankit TIWARI, Adam KUENZI, Michael LANG
  • Publication number: 20210250995
    Abstract: A method for implementing an image data communication protocol by a panel is provided. The panel is communicatively coupled over a wireless network to alarm sensors and image sensors. The panel requests, under the image data communication protocol, image data from the image sensor by sending an image request packet to the image sensor. The panel receives, under the image data communication protocol, image data as an image data packet from the image sensor.
    Type: Application
    Filed: October 4, 2019
    Publication date: August 12, 2021
    Inventors: Chih-Kuang LIN, Daniele CAMPANA, Ankit TIWARI, Michael RAMOUTAR
  • Publication number: 20210168903
    Abstract: A method for operating a wireless network including a plurality of nodes, the method including: each node generating a set of paths to a head node; initiating an adaptive failure recovery method in the event of a source node sending a message data packet upstream and a discovery node encountering a failed node, wherein the discovery node is a node on a path taken by the message data packet from the source node to a destination node, the adaptive recovery failure method including: collecting, at the discovery node, relevant data, the relevant data comprising: a hop-distance between the failed node and the source node; a count of estimated extra hops required to deliver the data packet using a hop-distance recovery method; a count of estimated extra hops required to deliver the data packet using a multipath recovery method; and a latency time for the hop-distance recovery method.
    Type: Application
    Filed: November 30, 2020
    Publication date: June 3, 2021
    Inventors: Chih-Kuang Lin, Davide Villa, Adam Kuenzi, Michael Lang
  • Publication number: 20210120373
    Abstract: A method for handling a broadcast data packet using a network (300) including a plurality of nodes (NH, N1, N2, N3, N4, N5, N6), the method including: receiving, at a sending node, the broadcast data packet; checking, at the sending node, whether the broadcast data packet has been received at the sending node on a previous occasion, wherein if the sending node has not previously received the broadcast data packet the sending node enters a broadcast delivery mode, the broadcast delivery mode including: switching to a scan mode to listen for advertisements from other nodes in the network; starting a timer; wherein upon receipt of an advertisement from a neighbouring node the sending node sends an instance of the broadcast data packet to the neighbouring node and resets the timer.
    Type: Application
    Filed: October 21, 2020
    Publication date: April 22, 2021
    Inventors: Adam Kuenzi, Michael Lang, Chih-Kuang Lin, Davide Villa
  • Publication number: 20210119905
    Abstract: A method for a network 300 including a plurality of nodes, the method including: detecting, at a first node (N2), that a second node (N1) is a failed node; recording, at the first node, that the second node is a failed node and that a first path is unavailable; switching, at the first node, to a second path, the second path including a third node (N6); checking, at the first node, the hop count of the third node, wherein the third node is the next hop on the second path; generating an information packet at the first node, wherein the information packet comprises a unique ID of the failed node and the hop count of the first node; broadcasting the information packet from the first node (N2) to one or more one-hop neighbouring nodes (N1, N3, N6) of the first node.
    Type: Application
    Filed: October 21, 2020
    Publication date: April 22, 2021
    Inventors: Adam Kuenzi, Michael Lang, Chih-Kuang Lin, Davide Villa
  • Publication number: 20200404473
    Abstract: A method for communicating data between Bluetooth Low Energy (BLE) devices in a network (100) including multiple nodes (200, 202). The method includes starting a scan mode at a first node (200) having data to send; and determining whether data to send has been transmitted to the first node from an upstream node or a downstream node. If the data to send was received from a downstream node, the first node begins a scan mode. If the data to send was received from an upstream node, the first node begins an ADV event.
    Type: Application
    Filed: June 19, 2020
    Publication date: December 24, 2020
    Inventors: Chih-Kuang Lin, Davide Villa, Adam Kuenzi, Michael Lang, Ankit Tiwari
  • Publication number: 20200403736
    Abstract: A method for communicating data between Bluetooth Low Energy (BLE) devices (200, 202) in a network (100) comprising multiple nodes, the method comprising: broadcasting data from a broadcasting node (200); receiving the data at multiple receiving nodes (202); transmitting an acknowledgement (ACK) packet from each of the receiving nodes (202) to the broadcasting node (200), wherein each receiving node (202) waits for a waiting period before transmitting the ACK packet, and wherein the waiting period is a varying length of time for each receiving node (202).
    Type: Application
    Filed: June 19, 2020
    Publication date: December 24, 2020
    Inventors: Chih-Kuang Lin, Davide Villa, Adam Kuenzi, Michael Lang, Ankit Tiwari
  • Patent number: 10560893
    Abstract: There is provided a communications system comprising an access network node and a plurality of resource limited nodes. The access network node comprises: a control unit operable to estimate a belief on a network condition for a resource limited node of the plurality of resource limited nodes based on network observations and a history profile of the network observations; dynamically update the belief for the resource limited node in the access network node; determine that the severity of the updated belief in the network condition is indicative that a change in sleep duty cycle of the resource limited node is required; determine that correlation between the resource limited nodes within the plurality of resource limited nodes is indicative that a change in sleep duty cycle of the resource limited node is required; and update the sleep duty cycle of the resource limited node to optimize the overall energy consumed in the resource limited nodes while achieving a specific detection threshold.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: February 11, 2020
    Assignee: ALCATEL LUCENT
    Inventors: Chih-Kuang Lin, Vijay Venkateswaran
  • Patent number: 10552648
    Abstract: A capability for localization of a wireless tag based on wireless gateway association information uses a wireless tag supporting multiple states and wireless gateway association information associated with the wireless tag to control localization of the wireless tag. The wireless tag may support an unconnected state in which the wireless tag communicates location tracking information using a wireless beacon signal which may be detected by various wireless gateways and a connected state in which the wireless tag communicates location tracking information via one or more connections with one or more wireless gateways. The wireless gateway association information may include wireless gateway lists (e.g., whitelists, blacklists, or the like), association rules, notification rules, or the like. The wireless gateway association information may be used to control transitions of the wireless tag between the unconnected state and the connected state, to control notifications for the wireless tag, or the like.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: February 4, 2020
    Assignees: Alcatel Lucent, Nokia of America Corporation
    Inventors: Howard Huang, Irwin Kennedy, Surya Mattu, Richard Abbot, Jonathan Ling, Chih-Kuang Lin
  • Patent number: 10539982
    Abstract: The present disclosure provides a housing assembly, and the housing assembly is applied to an electronic device. The housing assembly includes a first part and a second part. The first part includes at least one opening. The second part includes at least one mesh area. The mesh area deformably connects to the first part, and covers the opening.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: January 21, 2020
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chih-Kuang Lin, Szu-Tang Chiu, Wai-Tong Chan, Sin-Fei Lai
  • Patent number: 10539983
    Abstract: The present disclosure provides an electronic device. The electronic device includes a casing and a detachable unit. The casing includes an opening. The detachable unit is selectively disposed in the opening. The detachable unit includes a recognizing element. The detachable unit is provided for the electronic device provided in the present disclosure. In addition to having an electromagnetic shielding effect, the detachable unit can further provide various different functions, such as cooling, storage, display, communication, and accommodation. A user selects different detachable units according to needs. Therefore, the electronic device provided in the present disclosure helps improve user experience.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: January 21, 2020
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Szu-Tang Chiu, Sin-Fei Lai, Chih-Kuang Lin, Wai-Tong Chan
  • Patent number: 10314170
    Abstract: A motherboard of a computer is provided. The motherboard of a computer includes a main body, a notch formed at a side edge of the main body, an auxiliary device, and a fixing device formed adjacent to the notch to fix the auxiliary device in the notch, wherein the auxiliary device is a light guiding device including patterns.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: June 4, 2019
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Bing-Min Lin, Teng-Liang Ng, Ji-Kuang Tan, Ming-Fang Tsai, Chih-Kuang Lin
  • Publication number: 20190018456
    Abstract: The present disclosure provides an electronic device. The electronic device includes a casing and a detachable unit. The casing includes an opening. The detachable unit is selectively disposed in the opening. The detachable unit includes a recognizing element. The detachable unit is provided for the electronic device provided in the present disclosure. In addition to having an electromagnetic shielding effect, the detachable unit can further provide various different functions, such as cooling, storage, display, communication, and accommodation. A user selects different detachable units according to needs. Therefore, the electronic device provided in the present disclosure helps improve user experience.
    Type: Application
    Filed: July 10, 2018
    Publication date: January 17, 2019
    Inventors: Szu-Tang CHIU, Sin-Fei LAI, Chih-Kuang LIN, Wai-Tong CHAN
  • Publication number: 20190018455
    Abstract: The present disclosure provides a housing assembly, and the housing assembly is applied to an electronic device. The housing assembly includes a first part and a second part. The first part includes at least one opening. The second part includes at least one mesh area. The mesh area deformably connects to the first part, and covers the opening.
    Type: Application
    Filed: July 10, 2018
    Publication date: January 17, 2019
    Inventors: Chih-Kuang LIN, Szu-Tang CHIU, Wai-Tong CHAN, Sin-Fei LAI
  • Patent number: 10170597
    Abstract: A method for forming flash memory units is provided. After a logic gate in a select gate PMOS transistor area is separated from a logic gate in a control gate PMOS transistor area, P-type impurities implanted into the logic gate in the select gate PMOS transistor area are diffused into an N-type floating gate polysilicon layer to convert the N-type floating gate into a P-type floating gate by a subsequent high temperature heating process, so that it is possible to successfully form a select gate PMOS transistor having a small surface channel threshold value in a 55 nm process flash memory unit, and achieve mass production. Further, a two-step growth process of the logic gate and a process for separating the logic gate can form a surface channel of the select gate PMOS transistor having a smaller threshold value without affecting the floating gate doping of the control gate PMOS transistor.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: January 1, 2019
    Assignee: Integrated Silicon Solution (Shanghai), Inc.
    Inventors: Anxing Shen, Chih-Kuang Lin
  • Publication number: 20180276422
    Abstract: A capability for localization of a wireless tag based on wireless gateway association information uses a wireless tag supporting multiple states and wireless gateway association information associated with the wireless tag to control localization of the wireless tag. The wireless tag may support an unconnected state in which the wireless tag communicates location tracking information using a wireless beacon signal which may be detected by various wireless gateways and a connected state in which the wireless tag communicates location tracking information via one or more connections with one or more wireless gateways. The wireless gateway association information may include wireless gateway lists (e.g., whitelists, blacklists, or the like), association rules, notification rules, or the like. The wireless gateway association information may be used to control transitions of the wireless tag between the unconnected state and the connected state, to control notifications for the wireless tag, or the like.
    Type: Application
    Filed: May 21, 2018
    Publication date: September 27, 2018
    Inventors: Howard Huang, Irwin Kennedy, Surya Mattu, Richard Abbot, Jonathan Ling, Chih-Kuang Lin
  • Publication number: 20180277664
    Abstract: A method for forming flash memory units is provided. After a logic gate in a select gate PMOS transistor area is separated from a logic gate in a control gate PMOS transistor area, P-type impurities implanted into the logic gate in the select gate PMOS transistor area are diffused into an N-type floating gate polysilicon layer to convert the N-type floating gate into a P-type floating gate by a subsequent high temperature heating process, so that it is possible to successfully form a select gate PMOS transistor having a small surface channel threshold value in a 55 nm process flash memory unit, and achieve mass production. Further, a two-step growth process of the logic gate and a process for separating the logic gate can form a surface channel of the select gate PMOS transistor having a smaller threshold value without affecting the floating gate doping of the control gate PMOS transistor.
    Type: Application
    Filed: January 17, 2018
    Publication date: September 27, 2018
    Inventors: Anxing Shen, Chih-Kuang LIN
  • Patent number: D832834
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: November 6, 2018
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Zuo-Wen Wang, Tong-Shen Hsiung, Ming-Chih Huang, Meng-Chu Huang, Sin-Fei Lai, Fu-Yu Tsai, Szu-Tang Chiu, Chih-Kuang Lin, Chen-Chun Shiang, Wai Tong Chan
  • Patent number: D871392
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: December 31, 2019
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Zuo-Wen Wang, Tong-Shen Hsiung, Ming-Chih Huang, Meng-Chu Huang, Sin-Fei Lai, Fu-Yu Tsai, Szu-Tang Chiu, Chih-Kuang Lin, Chen-Chun Shiang, Wai Tong Chan