Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a first via disposed on a first side of a substrate. A second via is disposed on the first side of the substrate and is laterally separated from the first via. An interconnect wire vertically contacts the second via. A through-substrate via (TSV) extends through the substrate to physically contact one or more of the second via and the interconnect wire. The first via has a first width and the second via has a second width. The second width is between approximately 2,000% and approximately 5,000% larger than the first width.

Abstract: A target droplet source for an extreme ultraviolet (EUV) source includes a droplet generator configured to generate target droplets of a given material. The droplet generator includes a nozzle configured to supply the target droplets in a space enclosed by a chamber. The target droplet source further includes a sleeve disposed in the chamber distal to the nozzle. The sleeve is configured to provide a path for the target droplets in the chamber.

Abstract: A semiconductor structure and a method for forming a semiconductor structure are provided. The semiconductor structure includes: a substrate; a doped region within the substrate; a pair of source/drain regions extending along a first direction on opposite sides of the doped region; a gate electrode disposed in the doped region, wherein the gate electrode has a plurality of first segments between the pair of source/drain regions; and a protection structure overlapping the gate electrode.

Abstract: Disclosed are systems, apparatuses, processes, and computer-readable media for processing image data. One illustrative method of processing image data includes: capturing a first image of a subject using a variable aperture lens configured with a first aperture and a first exposure value; capturing a second image of the subject using the variable aperture lens configured with a second aperture and a second exposure value, wherein the second aperture is smaller than the first aperture and the second exposure value is smaller than the first exposure value; and generating a high dynamic range (HDR) image at least in part by fusing the first image and the second image fusing the first image and the second image.

Abstract: Techniques for a unified relational database framework for hybrid vector search are provided. In one technique, multiple documents are accessed and a vector table and a text table are generated. For each accessed document, data within the document is converted to plaintext, multiple chunks are generated based on the plaintext, an embedding model generates a vector for each of the chunks, the vectors are stored in the vector table along with a document identifier that identifies the accessed document, tokens are generated based on the plaintext, the tokens are stored in the text table along with the document identifier. Such processing may be performed in a database system in response to a single database statement to create a hybrid index. In response to receiving a hybrid query, a vector query and a text query are generated and executed and the respective results may be combined.

Abstract: A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first package component, and performing a pre-bonding to bond the first package component to a second package component.

Abstract: The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed directly on an upper surface of the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.

Abstract: A redundant system and a redundancy method of a fronthaul network are provided. The redundant system includes a first fronthaul multiplexer. The first fronthaul multiplexer includes a first group port, a second group port, a first cascade port, a first protect port, a first active port, and a first uplink circuit. The first uplink circuit includes a first summation circuit and a second summation circuit. A plurality of input terminals of the first summation circuit are coupled to the first group port and the second group port respectively, and an output terminal of the first summation circuit is coupled to the first protect port. A plurality of input terminals of the second summation circuit are coupled to the first cascade port and the output terminal of the first summation circuit respectively, and an output terminal of the second summation circuit is coupled to the first active port.

Abstract: In some embodiments, the present disclosure relates to an integrated device, including a substrate comprising a channel region; a gate structure disposed on the substrate over the channel region; a first doped region of a first doping type on a first side of the gate structure; a second doped region of the first doping type on a second side of the gate structure; a shallow trench isolation (STI) structure disposed on an opposite side of the first doped region from the gate structure and having a bottom surface at a first depth beneath a top surface of the substrate; a shallow-shallow trench isolation (SSTI) structure extending from the second doped region to the gate structure, the SSTI structure having a bottom surface at a second depth beneath the top surface of the substrate, where the second depth is less than the first depth.

Abstract: A memory control method includes a processor initiating a memory access instruction to a cache controller to search a cache memory, an address detector checking if the memory access instruction is corresponding to predetermined conditions if a cache miss occurs, the address detector transmitting a signal to inform a replacement mask logic unit if the memory access instruction is corresponding to the predetermined conditions, and the replacement mask logic unit providing predetermined data to store the predetermined data into the cache memory.

Abstract: A gate oxide layer for a high voltage transistor is formed using methods that avoid thinning in the corners of the gate oxide layer. A recess is formed in a silicon substrate. The exposed surfaces of the recess are thermally oxidized to form a thermal oxide layer of the gate oxide layer. A high temperature oxide layer of the gate oxide layer is then formed within the exposed surfaces of the recess by chemical vapor deposition. The combination of the thermal oxide layer and the high temperature oxide layer results in a gate oxide layer that does not exhibit the double hump phenomenon in the drain current vs. gate voltage curve. The high temperature oxide layer may include a rim that extends out of the recess.

Abstract: In one example in accordance with the present disclosure, an example computing device is disclosed. The example computing device includes a housing. The example computing device also includes a rotatable antenna disposed within the housing. The rotatable antenna is to rotate such that a direction of radiation is maintained in a single direction as the housing is to rotate.

Abstract: A composite antenna and an electronic device are proposed. The electronic device includes the composite antenna, and the composite antenna includes a substrate, a first antenna structure, two contact springs, an antenna holder and a second antenna structure. The first antenna structure is disposed on the substrate, and two ends of the first antenna structure are coupled to a feeding point and a grounding point, respectively. The two contact springs are disposed on the first antenna structure, and electrically connected to the feeding point and the grounding point, respectively. The antenna holder is removably disposed on the substrate. The second antenna structure is disposed on the antenna holder and electrically connected to the two contact springs.

Abstract: An electronic device and a processing method for locating wireless signals are provided here. The electronic device for locating wireless signals comprises: a plurality of antenna units, providing a plurality of antenna patterns; a switching control circuit, connected to the antenna units, wherein the switching control circuit is selectively electrically connected to at least one of the antenna units, so as to select one of the antenna patterns correspondingly; a communication module, electrically connected to the switching control circuit; and a processing circuit, electrically connected to the switching control circuit and the communication module and configured to control the switching control circuit to be electrically connected to the communication module and at least one of the antenna units.

Abstract: An antenna structure is provided. The antenna structure includes a conductor substrate, a coupling feed-in element and a shielding element. The conductor substrate has a slot. The coupling feed-in element, partly overlapping the slot, is disposed on the conductor substrate. The shielding element, partly overlapping the slot, is separated from the coupling feed-in element and disposed on the conductor substrate, wherein the shielding element is movable along the slot.

Abstract: An electronic device is disclosed. The electronic device includes a first electronic component and a first interposer. The first electronic component is disposed under the interposer and includes a logic circuit and a power delivery circuit disposed between the interposer and the logic circuit. The interposer and the power delivery circuit are collectively configured to function as a power delivery structure which is electrically connected to the logic circuit.

Abstract: A radio frequency (RF) tamper detector of an electronic device can offer improved chassis intrusion monitoring to protect the device from software and hardware-based tampering. The tamper detector can monitor RF noise levels in a first frequency band and in a second frequency band to calculate an RF noise level moving average for each frequency band. If the moving averages in both frequency bands exceed a RF noise threshold, the tamper detector can set a cover removal flag to indicate that a cover of the device housing has been removed. The tamper detector can cause the electronic device to lock or disable a system BIOS when cover removal is detected. Additionally, the electronic device can notify remote monitoring systems (e.g., operated by an IT administrator or warranty support center) to receive additional instructions to secure the device.

Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.

Abstract: An additive compound for dyeing an aluminum or aluminum alloy substrate after anodic oxidation to provide better uniformity in dyeing and hence a better finished appearance includes a main agent, an auxiliary agent, a pH stabilizer, an antibacterial agent, and a moderating agent. The antibacterial agent includes at least one of sorbic acid, fluconazole, itraconazole, artemisia argyi, benzyl alcohol, benzoic acid, salicylic acid, and boric acid. The moderating agent includes at least one of amino acid, amino salt, sulfate, nitrate, and chloride. An additive solution and a dyeing method are also provided, the use of the compound also allows for a more rapid dyeing process.

Abstract: In a semiconductor manufacturing method, a mask is disposed on a semiconductor layer or semiconductor substrate. The semiconductor layer or semiconductor substrate is etched in an area delineated by the mask to form a cavity. With the mask disposed on the semiconductor layer or semiconductor substrate, the cavity is lined to form a containment structure. With the mask disposed on the semiconductor layer or semiconductor substrate, the containment structure is filled with a base semiconductor material. After filling the containment structure with the base semiconductor material, the mask is removed. At least one semiconductor device is fabricated in and/or on the base semiconductor material deposited in the containment structure.