Abstract: This disclosure provides systems, methods, and devices for image processing that support enhanced white balancing operations. In a first aspect, a method of image processing includes receiving first image data obtained at a first aperture; determining a first output image frame based on the first image data by applying a first white balancing to at least a portion of the first image data; receiving second image data obtained at a second aperture; and determining a second output image frame based on the second image data by applying a second white balancing based on the first aperture and the second aperture to at least a portion of the second image data. The second white balancing may be based on a first compensation factor based on the first aperture and the second aperture used to adjust the first white balancing. Other aspects and features are also claimed and described.

Abstract: A display apparatus is provided. The display apparatus includes a display module and multiple light-emitting driving circuits. Each of the light-emitting driving circuits includes a timing control circuit and a driving circuit. The timing control circuit receives multiple clock signals and a previous light-emitting timing signal to provide a light-emitting timing signal and an internal voltage. The driving circuit receives a first phase signal among multiple phase signals and the internal voltage to provide a light-emitting driving signal to the display module based on the first phase signal and the internal voltage. The phase signals all present disabled levels during a vertical blank period.

Abstract: A socket of a testing tool is configured to provide testing signals. A device-under-test (DUT) board is configured to provide electrical routing. An integrated circuit (IC) die is disposed between the socket and the DUT board. The testing signals are electrically routed to the IC die through the DUT board. The IC die includes a substrate in which plurality of transistors is formed. A first structure contains a plurality of first metallization components. A second structure contains a plurality of second metallization components. The first structure is disposed over a first side of the substrate. The second structure is disposed over a second side of the substrate opposite the first side. A trench extends through the DUT board and extends partially into the IC die from the second side. A signal detection tool is configured to detect electrical or optical signals generated by the IC die.

Abstract: Disclosed are systems, apparatuses, processes, and computer-readable media for processing image data. One illustrative method of processing image data includes: capturing a first image of a subject using a variable aperture lens configured with a first aperture and a first exposure value; capturing a second image of the subject using the variable aperture lens configured with a second aperture and a second exposure value, wherein the second aperture is smaller than the first aperture and the second exposure value is smaller than the first exposure value; and generating a high dynamic range (HDR) image at least in part by fusing the first image and the second image fusing the first image and the second image.

Abstract: In one example in accordance with the present disclosure, an example computing device is disclosed. The example computing device includes a housing. The example computing device also includes a rotatable antenna disposed within the housing. The rotatable antenna is to rotate such that a direction of radiation is maintained in a single direction as the housing is to rotate.

Abstract: A semiconductor package structure includes a frontside redistribution layer, a first semiconductor die, a first capacitor, a conductive terminal, and a backside redistribution layer. The first semiconductor die is disposed over the frontside redistribution layer. The first capacitor is disposed over the frontside redistribution layer and electrically coupled to the first semiconductor die. The conductive terminal is disposed below the frontside redistribution layer and electrically coupled to the frontside redistribution layer. The backside redistribution layer is disposed over the first semiconductor die.

Abstract: Some implementations are directed to a wireless receiver. In some implementations, the wireless receiver may include a receiver body encompassing one or more antenna elements, a cover removably coupled to the receiver body, and a mounting bracket removably coupled to the receiver body. In some implementations, at least one of the one or more antenna elements, the cover, or the mounting bracket is movable with respect to the receiver body in order to align the wireless receiver with a signal path.

Abstract: A solid-state storage device is provided. The solid-state storage device is electrically connected to a host. The solid-state storage device includes a controller, a non-volatile memory, and a volatile memory. The non-volatile memory is electrically connected to the controller. The volatile memory is electrically connected to the controller. The volatile memory includes a submission queue and a completion queue. The controller is configured to fetch an access command from the host, and record the access command in the submission queue. The access command corresponds to a first logical address. The controller is configured to determine whether a first write command is in the submission queue to generate a determination result. The first write command corresponds to a second logical address identical to the first logical address. The controller is configured to decide a processing method of the access command according to the determination result.

Abstract: An integrated circuit (IC) chip assembly includes an integrated circuit (IC) die that includes a first substrate in which plurality of transistors is formed, a first structure that contains a plurality of first metallization components, and a second structure that contains a plurality of second metallization components. The first structure is disposed over a first side of the first substrate. The second structure is disposed over a second side of the first substrate opposite the first side. The chip assembly includes a second substrate bonded to the IC die through the second side. The chip assembly includes a trench that extends through the second substrate and through the second structure of the IC die. Sidewalls of the trench are defined at least in part by one or more protective layers.

Abstract: A fulldome display framework with a movable assembly adapted to dispose a plurality of display screens or projection screens to constitute a fulldome display includes a fixed frame engaged with a base surface and a movable frame disposed on the base surface and being movable relative to the fixed frame between an assembling position and a disassembling position along a predetermined route. The fulldome display is constituted when the movable frame is located at the assembling position to match with the fixed frame. In this way, after an LED fulldome display structure is installed on the present invention for example, the movable frame could be pulled out relative to the fixed frame along the predetermined route when a circuit board of a part of the fulldome display requires to be repaired, providing a certain working area for a repair worker to carry out repair and maintenance.

Abstract: A semiconductor package includes a first package having a first side and a second side opposing the first side. The first package comprises a first electronic component and a second electronic component arranged in a side-by-side manner on the second side. A second package is mounted on the first side of the first package. The second package comprises a radiative antenna element. A connector is configured to electrically couple to a 5G modem through a flex cable and is disposed on the second side.

Abstract: A multi-point measurement of a scene captured in an image frame may be used to process the image frame, such as by applying white balance corrections to the image frame. In some examples, the image frame may be segmented into portions that are illuminated by different illumination sources. Different portions of the image frame may be white balanced differently based on the color temperature of the illumination source for the corresponding portion. Infrared measurements of multiple points in the scene may be used to determine a characteristic of the illumination source of different portions of the scene. For example, a picture that includes indoor and outdoor portions may be illuminated by at least two illumination sources that produce different infrared measurements values. White balancing may be applied differently to these two portions to correct for color temperature of the different sources.

Abstract: A power transmission chip is coupled between an external converter circuit and a controller chip and includes a first transmitting interface, an internal converter circuit, a second transmitting interface, and a processing circuit. The first transmitting interface is coupled to the external converter circuit to receive a conversion voltage. The internal converter circuit processes the conversion voltage to generate an analog signal. The second transmitting interface transmits the analog signal to the controller chip and receives a control command from the controller chip. The processing circuit generates an adjustment signal based on the control command and provides the first adjustment signal to the external converter circuit via the first transmitting interface. The external converter circuit adjusts the conversion voltage based on the adjustment signal.

Abstract: A control chip providing power to a sink device and including a connection port, an encoder, a decoder, and a control circuit is provided. The connection port provides an output voltage and an inquiry signal to the sink device, and receives an acknowledgement signal provided by the sink device. The encoder generates the inquiry signal. The decoder decodes the acknowledgement signal to generate a decoded result. In a compensation mode, the control circuit obtains an actual voltage received by the sink device according to the decoded result and adjusts the output voltage according to the actual voltage received by the sink device. In a setting mode, the control circuit obtains a protect-point voltage of the sink device according to the decoded result and adjusts the output voltage according to the protect-point voltage of the sink device to prevent the output voltage from being higher than the protect-point voltage.

Abstract: An electronic device includes a light scattering switching element, a light absorbing switching element and a thermal insulation layer. The light absorbing switching element is disposed opposite to the light scattering switching element. The thermal insulation layer is disposed between the light scattering switching element and the light absorbing switching element, wherein the thermal conductivity of the thermal insulation layer is less than 50×10?3 W·m?1·K?1.

Abstract: A dynamic protection circuit including an adjustment circuit, a detection circuit, a control circuit, and a counter circuit is provided. The adjustment circuit adjusts an output voltage based on a predetermined value. The detection circuit detects whether the output voltage is higher than an upper-limit value or lower than a lower-limit value. The control circuit changes the predetermined value and disables the detection circuit while the predetermined value is being changed. The counter circuit starts to adjust a count value in response to the detection circuit being disabled. In response to the counter circuit adjusting the count value, the control circuit adjusts the upper-limit value and the lower-limit value to be proportional to the output voltage. In response to the count value being equal to a target value, the counter circuit enables the detection circuit.

Abstract: A detachable device includes a base, an object, and a latching structure. The object is detachably disposed over the base and has a fastening part. The latching structure is for detachably connecting the base and the object and includes a main body disposed on the base with a distance from the base. The main body includes a buckle part and a release part. The buckle part is for detachably buckling with the fastening part of the object. The release part is connected to the buckle part and is arranged on a side of the buckle part away from the fastening part. When being pushed by an external force, the release part drives the buckle part away from the fastening part, and the object is detached from the base.

Abstract: A semiconductor package structure having a frontside redistribution layer, a stacking structure disposed over the frontside redistribution layer and having a first semiconductor die and a second semiconductor die over the first semiconductor die. A backside redistribution layer is disposed over the stacking structure, a first intellectual property (IP) core is disposed in the stacking structure and electrically coupled to the frontside redistribution layer through a first routing channel. A second IP core is disposed in the stacking structure and is electrically coupled to the backside redistribution layer through a second routing channel, wherein the second routing channel is different from the first routing channel and electrically insulated from the frontside redistribution layer.

Abstract: A solid state die such as an LED (or OLED) die that is fitted in a hole such as a through hole in a carrier substrate such as a PCB. The die is to be connected to the PCB e.g. to tracks on the PCB. The electrical contacts on the die are arranged to be (e.g. substantially) in the same plane as the contacts on the carrier substrate such as the PCB. This is achieved by the holes in the substrate such as the PCB being adapted so that the dies fit into the holes or openings, i.e. are each taken up into an opening before electrical contacts are made.

Abstract: A semiconductor package includes a first package having a first side and a second side opposing the first side. The first package comprises a first electronic component and a second electronic component arranged in a side-by-side manner on the second side. A second package is mounted on the first side of the first package. The second package comprises a radiative antenna element. A connector is disposed on the second side.