Abstract: A thin film transistor comprises a substrate, a gate electrode formed on the substrate, an electrically insulating layer covering the gate electrode, a channel layer made of a semiconductor material and formed on the electrically insulating layer, a source electrode formed on a first lateral side of the electrically insulating layer, and a drain electrode formed on an opposite second lateral side of the electrically insulating layer. The source electrode has an inner end covering a first outer end of the channel layer and electrically connecting therewith. The drain electrode has an inner end covering an opposite second outer end of the channel layer and electrically connecting therewith. An area of the channel layer adjacent to and not covered by one of the source electrode and the drain electrode has an electrical conductivity lower than the electrical conductivity of other area of the channel layer.

Abstract: A method for forming a TFT includes providing a substrate, and forming a gate electrode, an electrically insulating layer, a semiconductor layer, an etch stop layer and a photoresist layer successively on the substrate. A photolithographic process is performed to the photoresist layer by using a half-tone mask to thereby configure the photoresist layer to have two recesses in a top thereof. Two lateral ends of the etch stop layer are etched away to form an etch stop pattern. The photoresist layer is heated to flow downwardly. Two lateral ends of the semiconductor channel are etched away to become a channel layer. An ashing is performed to the photoresist layer to have the recesses thereof communicate atmosphere with the etch stop pattern. The etch stop pattern is etched to define first and second through holes. Source and drain electrodes are formed to electrically connect with the channel layer.

Abstract: A thin film transistor (TFT) includes a substrate, a TFT formed on the substrate, and a passivation layer formed on the TFT. The TFT includes a gate, a source, a drain, and a channel layer. The source and the drain are respectively located at opposite sides of the channel layer. The channel layer includes oxygen ions which are implanted into the channel layer by an oxygen implanting process performed in an environment having an air pressure greater than a standard atmospheric pressure.

Abstract: A method for forming a TFT includes providing a substrate, a gate electrode on the substrate, an electrically insulating layer on the substrate to totally cover the gate electrode, a channel layer on the electrically insulating layer, a first photoresist pattern on the channel layer, a metal layer on the electrically insulating layer, the channel layer and the first photoresist layer, and a second photoresist pattern on the metal layer. A middle portion of the metal layer is then removed to form a source electrode and a drain electrode and to expose the first photoresist pattern and a portion of the channel layer between the first and second photoresist patterns. The exposed portion of the channel layer is then processed to have its electrical conductivity be lowered to thereby reduce a hot-carrier effect of the channel layer.

Abstract: A thin film transistor includes a first gate electrode located on a base, a second gate electrode located on the base, an insulating layer, a source electrode, a drain electrode, and a channel layer. The insulating layer covers the base, the first gate electrode, and the second gate electrode. The second gate electrode is insulated from the first gate electrode. The channel layer includes a first portion and a second portion sandwiched between the first portion and the insulating layer. A conductivity of the second portion is larger than a conductivity of the first portion. The first portion includes a first region facing the first gate electrode and a second region facing the second gate electrode. The source electrode is electrically connected to the first region, and the drain electrode is electrically connected to the second region.

Abstract: A method for forming a TFT includes providing a substrate, a gate electrode on the substrate, an electrically insulating layer on the substrate to totally cover the gate electrode, a channel layer on the electrically insulating layer, a first photoresist pattern on the channel layer, a metal layer on the electrically insulating layer, the channel layer and the first photoresist layer, and a second photoresist pattern on the metal layer. A middle portion of the metal layer is then removed to form a source electrode and a drain electrode and to expose the first photoresist pattern and a portion of the channel layer between the first and second photoresist patterns. The exposed portion of the channel layer is then processed to have its electrical conductivity be lowered to thereby reduce a hot-carrier effect of the channel layer.

Abstract: A thin film transistor can include a substrate, a gate electrode on the substrate, a first electrode located on the substrate and surrounded by the gate electrode, a second electrode located on the first electrode and surrounded by the gate electrode, and a channel layer located between the first electrode and the second electrode. The gate electrode can include a first margin metal layer on the substrate and a second metal layer located on the first margin metal layer. A method for manufacturing the thin film transistor is also provided.

Abstract: A thin film transistor includes a gate, a source, a drain, a channel layer, and a shielding layer. The shielding layer, the source, and the drain are located on a same layer. The shielding layer is located on the channel layer and is between the source and the drain to prevent light from being transmitted to the channel layer.

Abstract: A method of manufacturing a thin film transistor substrate is provided, including a first photoresist pattern covers a channel during a process of etching a second photoresist pattern and protects the channel. Thus, an etching stop layer is not required.

Abstract: A TFT array substrate includes a plurality of scan lines, a plurality of date lines, a plurality of pixels, a first TFT, and a second TFT. The number of scan lines includes a first scan line. The date lines are insulated with the scan lines include a first date line and a second date line. The first date line is insulated and at least partly covering the second date line. The pixels are defined by two adjacent scan lines and two adjacent date lines. The first TFT is configured to drive a first pixel at the first side of the first scan line and being coupled with the first scan line and the first date line. The second TFT is configured to drive a second pixel at the second side of the first scan line and being coupled with the first scan line and the second date line.

Abstract: A thin film transistor (TFT) includes a gate, a drain, a source, an insulating layer, a metal oxide layer, and an etch stopper layer. The metal oxide layer includes a source area, a drain area, and a channel area. The source is electrically coupled to the source area and the drain is electrically coupled to the drain area. Oxygen ions are implanted into the channel area via a surface treatment process to make an oxygen concentration of the channel area be greater than an oxygen concentration of each of the source area and the drain area.

Abstract: An array substrate for a liquid crystal display device includes a first storage capacitor and a second storage capacitor for increased capacitance. The first storage capacitor is formed by a first common electrode and a pixel electrode. The second storage capacitor is formed by a second common electrode and the pixel electrode.

Abstract: A thin film transistor (TFT) includes a gate, a drain, a source, an insulating layer, a metal oxide layer, and an etch stopper layer. The metal oxide layer includes a source area, a drain area, and a channel area. The source is electrically coupled to the source area and the drain is electrically coupled to the drain area. Oxygen ions are implanted into the channel area via a surface treatment process to make an oxygen concentration of the channel area be greater than an oxygen concentration of each of the source area and the drain area.

Abstract: A single stage electronic ballast with power factor correction is provided. The single stage electronic ballast can work under the present intensity discharge lamp without any change and provide higher efficient, lower power consumption of lighting system, and better lighting quality of lamps. The single stage electronic ballast can also provide a stable current to load (lamp) for a long time. The single stage electronic ballast includes a first switch and a second switch that are controlled with complementary switching so as to provide an output voltage in response to the input power source and the variation of the load.

Abstract: A single stage electronic ballast with power factor correction is provided. The single stage electronic ballast can work under the present intensity discharge lamp without any change and provide higher efficient, lower power consumption of lighting system, and better lighting quality of lamps. The single stage electronic ballast can also provide a stable current to load (lamp) for a long time. The single stage electronic ballast includes a first switch and a second switch that are controlled with complementary switching so as to provide an output voltage in response to the input power source and the variation of the load.

Abstract: The invention relates to 1,2,4 oxadiazole compounds and analogs thereof, represented by formula (II), and compositions and methods of use thereof.