Patents by Inventor Chih-Lung Lin

Chih-Lung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140226718
    Abstract: Techniques and tools are described for scalable video encoding and decoding. In some embodiments, an encoding tool encodes base layer video and outputs encoded base layer video in a base layer bit stream. The encoding tool encodes inter-layer residual video (representing differences between input video and reconstructed base layer video) using motion compensation relative to previously reconstructed inter-layer residual video. For the inter-layer residual video, the encoding tool outputs motion information and motion-compensated prediction residuals in an enhancement layer bit stream. A decoding tool receives the base layer bit stream and enhancement layer bit stream, reconstructs base layer video, reconstructs inter-layer residual video, and combines the reconstructed base layer video and reconstructed inter-layer residual video.
    Type: Application
    Filed: April 22, 2014
    Publication date: August 14, 2014
    Applicant: MICROSOFT CORPORATION
    Inventors: Chengjie Tu, Sridhar Srinivasan, Shankar Regunathan, Shijun Sun, Chih-Lung Lin
  • Publication number: 20140186894
    Abstract: Isolated DNA polymerase and the mutant DNA polymerases thereof are provided. The DNA polymerases have good thermostability.
    Type: Application
    Filed: December 23, 2013
    Publication date: July 3, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Tseng-Huang Liu, Pei-Shin Jiang, Chih-Lung Lin, Su-Jan Lee, Chao-Hung Kao
  • Publication number: 20140161191
    Abstract: Techniques and tools for encoding and decoding motion vector information for video images are described. For example, a video encoder yields an extended motion vector code by jointly coding, for a set of pixels, a switch code, motion vector information, and a terminal symbol indicating whether subsequent data is encoded for the set of pixels. In another aspect, an encoder/decoder selects motion vector predictors for macroblocks. In another aspect, a video encoder/decoder uses hybrid motion vector prediction. In another aspect, a video encoder/decoder signals a motion vector mode for a predicted image. In another aspect, a video decoder decodes a set of pixels by receiving an extended motion vector code, which reflects joint encoding of motion information together with intra/inter-coding information and a terminal symbol. The decoder determines whether subsequent data exists for the set of pixels based on e.g., the terminal symbol.
    Type: Application
    Filed: February 13, 2014
    Publication date: June 12, 2014
    Applicant: MICROSOFT CORPORATION
    Inventors: Sridhar Srinivasan, Pohsiang Hsu, Thomas W. Holcomb, Kunal Mukerjee, Bruce Chih-Lung Lin
  • Patent number: 8743949
    Abstract: Techniques and tools for video coding/decoding with sub-block transform coding/decoding and re-oriented transforms are described. For example, a video encoder adaptively switches between 8×8, 8×4, and 4×8 DCTs when encoding 8×8 prediction residual blocks; a corresponding video decoder switches between 8×8, 8×4, and 4×8 inverse DCTs during decoding. The video encoder may determine the transform sizes as well as switching levels (e.g., frame, macroblock, or block) in a closed loop evaluation of the different transform sizes and switching levels. When a video encoder or decoder uses spatial extrapolation from pixel values in a causal neighborhood to predict pixel values of a block of pixels, the encoder/decoder can use a re-oriented transform to address non-stationarity of prediction residual values.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: June 3, 2014
    Assignee: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Thomas W. Holcomb, Chih-Lung Lin, Pohsiang Hsu, Ming-Chieh Lee
  • Publication number: 20140139774
    Abstract: An embodiment of the invention provides a thin-film transistor substrate including: a substrate; a gate electrode disposed on the substrate; a gate insulating layer disposed on the substrate and covering the gate electrode; an active layer disposed on the gate insulating layer and above the gate electrode; an etching stop layer disposed on the active layer; a source electrode disposed on the etching stop layer and electrically connecting the active layer; a first insulating layer disposed on the etching stop layer and covering the source electrode; and a transparent electrode including a drain electrode and a pixel electrode connected thereto, wherein the drain electrode passes through the first insulating layer and the etching stop layer and directly contacts the active layer to electrically connect the active layer, and the pixel electrode is disposed the first insulating layer.
    Type: Application
    Filed: November 13, 2013
    Publication date: May 22, 2014
    Applicant: InnoLux Corporation
    Inventors: Chia-Hao TSAI, Chih-Lung LIN
  • Publication number: 20140133583
    Abstract: Various new and non-obvious apparatus and methods for using frame caching to improve packet loss recovery are disclosed. One of the disclosed embodiments is a method for using periodical and synchronized frame caching within an encoder and its corresponding decoder. When the decoder discovers packet loss, it informs the encoder which then generates a frame based on one of the shared frames stored at both the encoder and the decoder. When the decoder receives this generated frame it can decode it using its locally cached frame.
    Type: Application
    Filed: January 17, 2014
    Publication date: May 15, 2014
    Applicant: Microsoft Corporation
    Inventors: Chih-Lung Lin, Minghui Xia, Pohsiang Hsu, Shankar Regunathan, Thomas W. Holcomb
  • Publication number: 20140122913
    Abstract: A debugging device includes a power detection unit used for detecting a power supply status of a power supply unit of a server to generate a power detection signal, a boot status detection unit, a control unit, a first display unit and a second display unit. The boot status detection unit is coupled to a control chip, for receiving a boot inspection signal to generate a boot status detection signal. The control unit is coupled to the power detection unit and the boot status detection unit, for receiving the power detection signal and the boot status detection signal to generate a plurality of first control signals and a second control signal. The first display unit is coupled to the control unit, for receiving and displaying the first control signals. The second display unit is coupled to the control unit, for receiving and displaying the second control signal.
    Type: Application
    Filed: March 11, 2013
    Publication date: May 1, 2014
    Applicants: INVENTEC CORPORATION, INVENTEC (PUDONG) TECHNOLOGY CORPORATION
    Inventor: Chih-Lung Lin
  • Patent number: 8711948
    Abstract: Techniques and tools are described for scalable video encoding and decoding. In some embodiments, an encoding tool encodes base layer video and outputs encoded base layer video in a base layer bit stream. The encoding tool encodes inter-layer residual video (representing differences between input video and reconstructed base layer video) using motion compensation relative to previously reconstructed inter-layer residual video. For the inter-layer residual video, the encoding tool outputs motion information and motion-compensated prediction residuals in an enhancement layer bit stream. A decoding tool receives the base layer bit stream and enhancement layer bit stream, reconstructs base layer video, reconstructs inter-layer residual video, and combines the reconstructed base layer video and reconstructed inter-layer residual video.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: April 29, 2014
    Assignee: Microsoft Corporation
    Inventors: Chengjie Tu, Sridhar Srinivasan, Shankar Regunathan, Shijun Sun, Chih-Lung Lin
  • Patent number: 8687697
    Abstract: Techniques and tools for encoding and decoding motion vector information for video images are described. For example, a video encoder yields an extended motion vector code by jointly coding, for a set of pixels, a switch code, motion vector information, and a terminal symbol indicating whether subsequent data is encoded for the set of pixels. In another aspect, an encoder/decoder selects motion vector predictors for macroblocks. In another aspect, a video encoder/decoder uses hybrid motion vector prediction. In another aspect, a video encoder/decoder signals a motion vector mode for a predicted image. In another aspect, a video decoder decodes a set of pixels by receiving an extended motion vector code, which reflects joint encoding of motion information together with intra/inter-coding information and a terminal symbol. The decoder determines whether subsequent data exists for the set of pixels based on e.g., the terminal symbol.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: April 1, 2014
    Assignee: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Pohsiang Hsu, Thomas W. Holcomb, Kunal Mukerjee, Bruce Chih-Lung Lin
  • Patent number: 8687709
    Abstract: An encoder/decoder obtains pixel data from one or more field lines associated with a first block in an interlaced frame coded picture comprising plural macroblocks each having an equal number of top and bottom field lines. The encoder/decoder obtains pixel data from one or more field lines associated with a second block and performs in-loop deblocking filtering across a boundary. The in-loop deblocking filtering comprises filter operations performed on pixel data from field lines of same polarity only. In another aspect, an encoder/decoder obtains transform size information for plural blocks of macroblock, obtains field/frame type information for the macroblock and selects one or more boundaries for in-loop deblocking based at least in part on the transform size information and the field/frame type information. In-loop deblocking can be performed on horizontal block boundaries prior to vertical block boundaries.
    Type: Grant
    Filed: September 4, 2004
    Date of Patent: April 1, 2014
    Assignee: Microsoft Corporation
    Inventors: Pohsiang Hsu, Chih-Lung Lin, Sridhar Srinivasan, Thomas W. Holcomb
  • Publication number: 20140063677
    Abstract: This disclosure provides a protection device for a display having a panel. The protection device includes a voltage generator coupled to the panel, configured for generating at least one common voltage; and a discharge unit coupled to the voltage generator, configured for discharging charges on the voltage generator when the display is turned off.
    Type: Application
    Filed: July 25, 2013
    Publication date: March 6, 2014
    Applicant: INNOLUX CORPORATION
    Inventors: BO-FENG CHEN, CHIH-LUNG LIN
  • Patent number: 8634413
    Abstract: Various new and non-obvious apparatus and methods for using frame caching to improve packet loss recovery are disclosed. One of the disclosed embodiments is a method for using periodical and synchronized frame caching within an encoder and its corresponding decoder. When the decoder discovers packet loss, it informs the encoder which then generates a frame based on one of the shared frames stored at both the encoder and the decoder. When the decoder receives this generated frame it can decode it using its locally cached frame.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: January 21, 2014
    Assignee: Microsoft Corporation
    Inventors: Chih-Lung Lin, Minghui Xia, Pohsiang Hsu, Shankar Regunathan, Thomas W. Holcomb
  • Publication number: 20140014961
    Abstract: A display device and a display panel thereof are provided. The display panel includes a plurality of pixels, a first adjacent zone and a plurality of gate lines. The pixels include a first pixel and a second pixel adjacent to the first pixel. Each pixel includes one of the gate lines. The gate lines include a first gate line and a second gate line. The first pixel includes the first gate line. The second pixel includes the second gate line. The first gate line and the second gate line are located at the first adjacent zone.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 16, 2014
    Inventors: Chia-Hao TSAI, Chih-Lung LIN
  • Publication number: 20140016057
    Abstract: An embodiment of the present invention provides a display including: a first substrate; gate lines and data lines; transistors respectively located in pixel areas, wherein each of the transistors includes: an active layer on the first substrate and having a first end portion, a second end portion, and a necked-down portion connecting the first and the second end portions; a second substrate on the first substrate; and a display medium between the first substrate and the second substrate.
    Type: Application
    Filed: July 11, 2013
    Publication date: January 16, 2014
    Inventors: Chia-Hao TSAI, Chih-Lung LIN
  • Patent number: 8625680
    Abstract: Techniques and tools for bitstream-controlled filtering are described. For example, a video encoder puts control information into a bitstream for encoded video. A video decoder decodes the encoded video and, according to the control information, performs post-processing filtering on the decoded video with a de-ringing and/or de-blocking filter. Typically, a content author specifies the control information to the encoder. The control information itself is post-processing filter levels, filter selections, and/or some other type of information. In the bitstream, the control information is specified for a sequence, scene, frame, region within a frame, or at some other syntax level.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: January 7, 2014
    Assignee: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Chih-Lung Lin, Pohsiang Hsu, Thomas W. Holcomb, Ming-Chieh Lee, Jordi Ribas-Corbera
  • Publication number: 20140002333
    Abstract: An embodiment of the present invention provides a display including: a first substrate; gate lines and data lines defining a first color, second color, and third color pixel area; a first color, second color, and third color pixel transistor located in the first color, second color, and third color pixel area respectively; a second substrate; and a black matrix, wherein the black matrix has a first portion and a second portion, and the first portion extends from an edge of a first color pixel active layer for a first shading distance, the second portion extends from an edge of a third pixel active layer for a second shading distance larger than the first shading distance.
    Type: Application
    Filed: June 26, 2013
    Publication date: January 2, 2014
    Inventors: Chia-Hao TSAI, Chih-Lung LIN
  • Publication number: 20130301732
    Abstract: Techniques and tools for video coding/decoding with motion resolution switching and sub-block transform coding/decoding are described. For example, a video encoder adaptively switches the resolution of motion estimation and compensation between quarter-pixel and half-pixel resolutions; a corresponding video decoder adaptively switches the resolution of motion compensation between quarter-pixel and half-pixel resolutions. For sub-block transform sizes, for example, a video encoder adaptively switches between 8×8, 8×4, and 4×8 DCTs when encoding 8×8 prediction residual blocks; a corresponding video decoder switches between 8×8, 8×4, and 4×8 inverse DCTs during decoding.
    Type: Application
    Filed: July 16, 2013
    Publication date: November 14, 2013
    Inventors: Pohsiang Hsu, Chih-Lung Lin, Ming-Chieh Lee, Thomas W. Holcomb, Sridhar Srinivasan
  • Publication number: 20130301704
    Abstract: Techniques and tools for video coding/decoding with sub-block transform coding/decoding and re-oriented transforms are described. For example, a video encoder adaptively switches between 8×8, 8×4, and 4×8 DCTs when encoding 8×8 prediction residual blocks; a corresponding video decoder switches between 8×8, 8×4, and 4×8 inverse DCTs during decoding. The video encoder may determine the transform sizes as well as switching levels (e.g., frame, macroblock, or block) in a closed loop evaluation of the different transform sizes and switching levels. When a video encoder or decoder uses spatial extrapolation from pixel values in a causal neighborhood to predict pixel values of a block of pixels, the encoder/decoder can use a re-oriented transform to address non-stationarity of prediction residual values.
    Type: Application
    Filed: July 16, 2013
    Publication date: November 14, 2013
    Inventors: Sridhar Srinivasan, Thomas W. Holcomb, Chih-Lung Lin, Pohsiang Hsu, Ming-Chieh Lee
  • Patent number: 8582903
    Abstract: The coded block parameters used to code blocks of image samples into structures called macroblocks are compressed more efficiently by exploiting the correlation between chrominance and luminance blocks in each macroblock. In particular, the coded block pattern for chrominance and luminance are combined into a single parameter for the macroblock and jointly coded with a single variable length code. To further enhance coding efficiency, the spatial coherence of coded block patterns can be exploited by using spatial prediction to compute predicted values for coded block pattern parameters.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: November 12, 2013
    Assignee: Microsoft Corporation
    Inventors: Chih-Lung Lin, Ming-Chieh Lee
  • Patent number: 8576908
    Abstract: Quality settings established by an encoder are adjusted based on information associated with regions of interest (“ROIs”). For example, quantization step sizes can be reduced (to improve quality) or increased (to reduce bit rate). ROIs can be identified and quality settings can be adjusted based on input received from a user interface. An overlap setting can be determined for a portion of a picture that corresponds to an ROI overlap area. For example, an overlap setting is chosen from step sizes corresponding to a first overlapping ROI and a second overlapping ROI, or from relative reductions in step size corresponding to the first ROI and the second ROI. ROIs can be parameterized by information (e.g., using data structures) that indicates spatial dimensions of the ROIs and quality adjustment information (e.g., dead zone information, step size information, and quantization mode information).
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: November 5, 2013
    Assignee: Microsoft Corporation
    Inventors: Chih-Lung Lin, Ming-Chieh Lee, Stacey Spears, Philip Lawrence Garrett, Anil Madhav Murching, Amy Jennifer Beauford, Thomas W. Holcomb, Xiping Zuo