Abstract: The battery pack with the plurality of batteries is determined to have been fully charged and set in a stationary state, the discharge operation proceeds according to specified relationships of the voltage of each battery, a first predetermined voltage difference, and a discharge starting voltage, or the balance operation proceeds according to specified relationships of the voltage of each battery, the first predetermined voltage difference, a balance starting voltage and a second predetermined voltage difference.

Abstract: Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.

Abstract: Display cover glass includes a glass substrate. The glass substrate has a first panel and a second panel. An angle formed between the first panel and the second panel. The first panel has a first display area provided with an arbitrary first point. The second panel has a second display area provided with an arbitrary second point. The color difference value ?E between the first point and the second point is less than or equal to 17 when the viewing angle difference between the first point and the second point is 10-60 degrees. The first panel and the second panel make it possible to display driving information, such as a navigation interface, and an operation interface in the two display areas respectively so that the driver of a means of transport can read the information clearly and use the operation interface with ease.

Abstract: Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.

Abstract: Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.

Abstract: Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.

Abstract: Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations.

Abstract: In some embodiments, a semiconductor device package may include a semiconductor device package on package assembly. The package on package assembly may include a first package, a second package, and a shield. The first package may include a first surface, a second surface substantially opposite the first surface, a first die, and a first set of electrical conductors coupled to the first surface and configured to electrically connect the package on package assembly. The second package may include a third surface and a fourth surface substantially opposite the third surface, and a second die. The third surface may be coupled to the second surface. The first package may be electrically coupled to the second package. The shield may be applied to the fourth surface of the semiconductor device package assembly. In some embodiments, the shield may transfer, during use, heat from the first die.

Abstract: Packages and methods of formation are described. In an embodiment, a system in package (SiP) includes first and second redistribution layers (RDLs), stacked die between the first and second RDLs, and conductive pillars extending between the RDLs. A molding compound may encapsulate the stacked die and conductive pillars between the first and second RDLs.

Abstract: A tempered glass screen protector includes a substrate structure, a protection structure, and an adhesion structure. The substrate structure has a transparent portion and a non-planar decorative portion extended from the transparent portion. The protection structure includes a first transparent adhesive layer disposed on the bottom surface of the transparent portion and a transparent protective layer disposed on the first transparent adhesive layer. The adhesion structure includes a first adhesive layer disposed on the bottom surface of the non-planar decorative portion, a base layer disposed on the first adhesive layer, and a second adhesive layer disposed on the base layer. The thickness of the protection structure is smaller than the thickness of the adhesion structure, so that there is no any watermark or Newton ring formed between the transparent protective layer and the display area of the portable electronic device when pressing the transparent portion.

Abstract: Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations.

Abstract: Packages and methods of formation are described. In an embodiment, a system in package (SiP) includes first and second redistribution layers (RDLs), stacked die between the first and second RDLs, and conductive pillars extending between the RDLs. A molding compound may encapsulate the stacked die and conductive pillars between the first and second RDLs.

Abstract: Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations.

Abstract: A tempered glass screen protector includes a substrate structure, a protection structure, and an adhesion structure. The substrate structure has a transparent portion and a non-planar decorative portion extended from the transparent portion. The protection structure includes a first transparent adhesive layer disposed on the bottom surface of the transparent portion and a transparent protective layer disposed on the first transparent adhesive layer. The adhesion structure includes a first adhesive layer disposed on the bottom surface of the non-planar decorative portion, a base layer disposed on the first adhesive layer, and a second adhesive layer disposed on the base layer. The thickness of the protection structure is smaller than the thickness of the adhesion structure, so that there is no any watermark or Newton ring formed between the transparent protective layer and the display area of the portable electronic device when pressing the transparent portion.

Abstract: A PoP (package-on-package) package includes a bottom package coupled to a top package. Terminals on the top of the bottom package are coupled to terminals on the bottom of the top package with an electrically insulating material located between the upper surface of the bottom package and the lower surface of the top package. The bottom package and the top package are coupled during a process that applies force to bring the packages together while heating the packages.

Abstract: Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations.

Abstract: In some embodiments, a semiconductor device package may include a semiconductor device package on package assembly. The package on package assembly may include a first package, a second package, and a shield. The first package may include a first surface, a second surface substantially opposite the first surface, a first die, and a first set of electrical conductors coupled to the first surface and configured to electrically connect the package on package assembly. The second package may include a third surface and a fourth surface substantially opposite the third surface, and a second die. The third surface may be coupled to the second surface. The first package may be electrically coupled to the second package. The shield may be applied to the fourth surface of the semiconductor device package assembly. In some embodiments, the shield may transfer, during use, heat from the first die.

Abstract: In some embodiments, a system and/or method may include forming a semiconductor device package assembly. The method may include forming a substrate including a first surface and a second surface substantially opposite the first surface. The substrate may include an opening in the second surface. The first surface may include a first set of electrical conductors. The method may include positioning a first die in the opening. The first die may include a second set of electrical conductors. The method may include forming a third set of electrical conductors on a second die. The third set of conductors may include a first width and a first height. The method may include forming a fourth set of electrical conductors on the second die. The fourth set of conductors may include a second width and a second height. The second width may be less than the first width. The second height may be greater than the first height.

Abstract: A forming mold made from a polyporous refractory material is provided for forming a glass piece. The forming mold includes an outer surface and a plurality of forming structures provided on the outer surface. Each of the forming structures includes a forming surface matching with a shape of the glass piece. The forming mold is structured and arranged to be pumped down from the outer surface to generated an absorption force on molten glass material provided at the at least one forming surface for sucking the molten glass material on the forming structure to form the glass piece.

Abstract: A PoP (package-on-package) package includes a bottom package coupled to a top package. Terminals on the top of the bottom package are coupled to terminals on the bottom of the top package with an electrically insulating material located between the upper surface of the bottom package and the lower surface of the top package. The bottom package and the top package are coupled during a process that applies force to bring the packages together while heating the packages.