Patents by Inventor Chih-Ping Chung

Chih-Ping Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12284837
    Abstract: A backside illuminated image sensor, including a semiconductor layer, a first gate structure, and a light sensing device, is provided. The semiconductor layer has a first surface and a second surface opposite to each other. The first gate structure is disposed on the second surface. The light sensing device is located in the semiconductor layer. The light sensing device extends from the first surface to the second surface.
    Type: Grant
    Filed: May 7, 2024
    Date of Patent: April 22, 2025
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Jun-Ming Su, Chih-Ping Chung, Ming-Yu Ho
  • Publication number: 20250006757
    Abstract: An image sensor includes a substrate, a global shutter component, a ground doped region, and a light-shielding layer. The substrate at least has a pixel array region and a border region adjacent to each other. The global shutter component is located on the pixel array region, and the global shutter component includes a storage node. The ground doped region is located on the border region. The light-shielding layer is located on the pixel array region and the border region and is electrically connected to the ground doped region. The light-shielding layer includes a first light-shielding layer and a second light-shielding layer. The first light-shielding layer is located on the pixel array region and covers the storage node, and the second light-shielding layer is located on the border region and surrounds the global shutter component. A manufacturing method of an image sensor is also provided.
    Type: Application
    Filed: July 25, 2023
    Publication date: January 2, 2025
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Peng-Tse Chen, Chih-Ping Chung
  • Patent number: 12094905
    Abstract: Provided are an image sensor and a manufacturing method thereof. In the image sensor, an insulating layer and a first silicon layer are sequentially on a silicon base. A first isolation structure is in the first silicon layer to define an active area (AA). A doped region is in a part of the first silicon layer in the AA and in a part of the silicon base thereunder. A second silicon layer is in a part of the first silicon layer in the AA and extends into the silicon base. An interconnection structure is on the first silicon layer and electrically connected with a transistor. A second isolation structure is in the silicon base under the first isolation structure and connected to the insulating layer. A passivation layer surrounds the silicon base and is connected to the doped region. A microlens is on the silicon base.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: September 17, 2024
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Chih-Ping Chung, Ming-Yu Ho, Saysamone Pittikoun
  • Publication number: 20240290815
    Abstract: A backside illuminated image sensor, including a semiconductor layer, a first gate structure, and a light sensing device, is provided. The semiconductor layer has a first surface and a second surface opposite to each other. The first gate structure is disposed on the second surface. The light sensing device is located in the semiconductor layer. The light sensing device extends from the first surface to the second surface.
    Type: Application
    Filed: May 7, 2024
    Publication date: August 29, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Jun-Ming Su, Chih-Ping Chung, Ming-Yu Ho
  • Patent number: 12040343
    Abstract: A backside illuminated image sensor, including a semiconductor layer, a first gate structure, and a light sensing device, is provided. The semiconductor layer has a first surface and a second surface opposite to each other. The first gate structure is disposed on the second surface. The light sensing device is located in the semiconductor layer. The light sensing device extends from the first surface to the second surface.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: July 16, 2024
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Jun-Ming Su, Chih-Ping Chung, Ming-Yu Ho
  • Publication number: 20240170526
    Abstract: A back side illumination (BSI) image sensor includes an epitaxial substrate, a deep trench isolation (DTI) structure from one surface to the other surface of the epitaxial substrate, a buried oxide layer on the epitaxial substrate, an epitaxial layer, a well region, a floating diffusion (FD) region, a shallow trench isolation (STI) structure, and vertical transfer gates (VTGs). The buried oxide layer has openings exposing the epitaxial substrate, and the epitaxial layer is formed on the epitaxial substrate and covers the buried oxide layer. The well region is in the epitaxial layer and the epitaxial substrate. The FD region is in the well region above the buried oxide layer, and a width of the buried oxide layer is larger than that of the FD region. The STI structure is in the epitaxial layer. The VTGs are in the epitaxial layer and through the openings of the buried oxide layer.
    Type: Application
    Filed: January 9, 2023
    Publication date: May 23, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Chih-Ping Chung, Saysamone Pittikoun, Chih-Hao Peng, Ming-Yu Ho
  • Patent number: 11949190
    Abstract: An electrical connector includes: an insulating body; and a first row of terminals and a second row of terminals housed in the insulating body, each terminal in the first row of terminals having a tail portion, a contact portion, and a body portion, the first row of terminals including a signal terminal pair having a pair of signal terminals and a ground terminal arranged on one side of the signal terminal pair, wherein a first center distance between the contact portions of the signal terminal pair is different from a second center distance between the contact portion of the ground terminal and the contact portion of an adjacent signal terminal.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: April 2, 2024
    Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Chih-Ping Chung, Chun-Hsiung Hsu, Kuei-Chung Tsai
  • Publication number: 20240105749
    Abstract: An image sensor structure including a substrate, a pixel structure, and a deep trench isolation (DTI) structure is provided. The substrate includes a first side and a second side opposite to each other. The pixel structure includes a transfer transistor, a light sensing device, and a floating diffusion region. The transfer transistor includes a first gate. The first gate is disposed on the first side of the substrate. The light sensing device is disposed in the substrate and is located on one side of the first gate. The floating diffusion region is disposed in the substrate and is located on another side of the first gate. The DTI structure extends into the substrate from the second side of the substrate. The top-view pattern of the floating diffusion region does not overlap the top-view pattern of the DTI structure.
    Type: Application
    Filed: October 26, 2022
    Publication date: March 28, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Chih-Ping Chung, Jhih Fan Tu
  • Publication number: 20240072083
    Abstract: A 3D CMOS image sensor is provided in the present invention, including a semiconductor substrate, a photodiode and a well formed in the semiconductor substrate, a shallow trench isolation (STI) layer formed on a front surface of the semiconductor substrate, a fin protruding upwardly from the semiconductor substrate through the STI layer, wherein the fin is composed of the photodiode and the well, a first gate spanning the photodiode portion and the well portion abutting the photodiode portion of the fin to constitute a transfer transistor, a second gate spanning in the middle of the well portion of the fin to constitute a reset transistor, and a floating diffusion region in the well portion of the fin between the first gate and the second gate electrically connecting the transfer transistor and the reset transistor.
    Type: Application
    Filed: January 3, 2023
    Publication date: February 29, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Chih-Ping Chung, Ming-Yu Ho, Saysamone Pittikoun
  • Publication number: 20230223417
    Abstract: Provided are an image sensor and a manufacturing method thereof. In the image sensor, an insulating layer and a first silicon layer are sequentially on a silicon base. A first isolation structure is in the first silicon layer to define an active area (AA). A doped region is in a part of the first silicon layer in the AA and in a part of the silicon base thereunder. A second silicon layer is in a part of the first silicon layer in the AA and extends into the silicon base. An interconnection structure is on the first silicon layer and electrically connected with a transistor. A second isolation structure is in the silicon base under the first isolation structure and connected to the insulating layer. A passivation layer surrounds the silicon base and is connected to the doped region. A microlens is on the silicon base.
    Type: Application
    Filed: March 22, 2022
    Publication date: July 13, 2023
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Chih-Ping Chung, Ming-Yu Ho, Saysamone Pittikoun
  • Publication number: 20230043664
    Abstract: A backside illuminated image sensor, including a semiconductor layer, a first gate structure, and a light sensing device, is provided. The semiconductor layer has a first surface and a second surface opposite to each other. The first gate structure is disposed on the second surface. The light sensing device is located in the semiconductor layer. The light sensing device extends from the first surface to the second surface.
    Type: Application
    Filed: August 27, 2021
    Publication date: February 9, 2023
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Jun-Ming Su, Chih-Ping Chung, Ming-Yu Ho
  • Patent number: 11527844
    Abstract: An electrical connector includes an insulating body, a first terminal group having a signal terminal pair and a ground terminal arranged on one side of the signal terminal pair, each signal terminal having a tail portion, a contact portion, and a body portion, the body portion having a covering portion and a free portion exposed to air, wherein there is a first center distance between the contact portions of the signal terminal pair, there is a second center distance between the free portions, and there is a third center distance between the covering parts, and a second terminal group forming a first mating port with the first terminal group, wherein the second center distance is smaller than the first center distance, and the third center distance is greater than the second center distance.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: December 13, 2022
    Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Chih-Ping Chung, Kuei-Chung Tsai, Chun-Hsiung Hsu
  • Patent number: 11349262
    Abstract: An electrical connector assembly comprising: an insulative housing with a front mating slot and a rear receiving cavity; a combo contact module assembly received within the receiving cavity and including a sideband contact module sandwiched between a pair of high speed contact modules; each high speed contact module including an upper unit and a lower unit assembled with each other in a vertical direction; the upper unit and the lower unit being essentially symmetrically arranged with each other in the vertical direction with a half of pitch offset in a transverse direction; and a metallic shell; wherein each of the upper unit and the lower unit including a front subunit and a rear subunit stacked with each other in the vertical direction and retained together.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: May 31, 2022
    Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Chih-Ping Chung, Chun-Hsiung Hsu, Kuei-Chung Tsai, Terrance F. Little
  • Publication number: 20220158388
    Abstract: An electrical connector includes: an insulating body; and a first row of terminals and a second row of terminals housed in the insulating body, each terminal in the first row of terminals having a tail portion, a contact portion, and a body portion, the first row of terminals including a signal terminal pair having a pair of signal terminals and a ground terminal arranged on one side of the signal terminal pair, wherein a first center distance between the contact portions of the signal terminal pair is different from a second center distance between the contact portion of the ground terminal and the contact portion of an adjacent signal terminal.
    Type: Application
    Filed: November 12, 2021
    Publication date: May 19, 2022
    Inventors: CHIH-PING CHUNG, CHUN-HSIUNG HSU, KUEI-CHUNG TSAI
  • Publication number: 20210351536
    Abstract: An electrical connector assembly comprising: an insulative housing with a front mating slot and a rear receiving cavity; a combo contact module assembly received within the receiving cavity and including a sideband contact module sandwiched between a pair of high speed contact modules; each high speed contact module including an upper unit and a lower unit assembled with each other in a vertical direction; the upper unit and the lower unit being essentially symmetrically arranged with each other in the vertical direction with a half of pitch offset in a transverse direction; and a metallic shell; wherein each of the upper unit and the lower unit including a front subunit and a rear subunit stacked with each other in the vertical direction and retained together.
    Type: Application
    Filed: August 5, 2020
    Publication date: November 11, 2021
    Inventors: CHIH-PING CHUNG, CHUN-HSIUNG HSU, KUEI-CHUNG TSAI, TERRANCE F. LITTLE
  • Publication number: 20210320448
    Abstract: An electrical connector includes an insulating body, a first terminal group having a signal terminal pair and a ground terminal arranged on one side of the signal terminal pair, each signal terminal having a tail portion, a contact portion, and a body portion, the body portion having a covering portion and a free portion exposed to air, wherein there is a first center distance between the contact portions of the signal terminal pair, there is a second center distance between the free portions, and there is a third center distance between the covering parts, and a second terminal group forming a first mating port with the first terminal group, wherein the second center distance is smaller than the first center distance, and the third center distance is greater than the second center distance.
    Type: Application
    Filed: April 6, 2021
    Publication date: October 14, 2021
    Inventors: CHIH-PING CHUNG, KUEI-CHUNG TSAI, CHUN-HSIUNG HSU
  • Patent number: 10629644
    Abstract: An image sensor includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a microlens disposed over the photodiode, a first transfer transistor, a second transfer transistor and a capacitor. The first transfer transistor and the second transfer transistor are formed on the semiconductor substrate, and a memory node is formed in the semiconductor substrate between the first transfer transistor and the second transfer transistor, wherein the first transfer transistor is coupled to the photodiode. The capacitor is formed between the first transfer transistor and the second transfer transistor, and the capacitor includes a first electrode coupled to the memory node, a second electrode on the first electrode and extending to an edge of the photodiode, and a dielectric layer between the first and the second electrodes.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: April 21, 2020
    Assignee: Powerchip Technology Corporation
    Inventors: Chih-Ping Chung, Ming-Yu Ho, Wen-Hao Huang, Saysamone Pittikoun
  • Publication number: 20200105816
    Abstract: An image sensor includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a microlens disposed over the photodiode, a first transfer transistor, a second transfer transistor and a capacitor. The first transfer transistor and the second transfer transistor are formed on the semiconductor substrate, and a memory node is formed in the semiconductor substrate between the first transfer transistor and the second transfer transistor, wherein the first transfer transistor is coupled to the photodiode. The capacitor is formed between the first transfer transistor and the second transfer transistor, and the capacitor includes a first electrode coupled to the memory node, a second electrode on the first electrode and extending to an edge of the photodiode, and a dielectric layer between the first and the second electrodes.
    Type: Application
    Filed: November 19, 2018
    Publication date: April 2, 2020
    Applicant: Powerchip Technology Corporation
    Inventors: Chih-Ping Chung, Ming-Yu Ho, Wen-Hao Huang, Saysamone Pittikoun
  • Patent number: 10008796
    Abstract: A connector structure includes an upper connecting component, a lower connecting component, a shielding plate, a metal housing, an upper insulating component, an upper grounding component, a lower insulating component and a lower grounding component. The upper/lower connecting component includes an upper/lower main body and a plurality of upper/lower terminals. The shielding plate is disposed between the upper connecting component and the lower connecting component. The metal housing covers the upper main body, the shielding plate and the lower main body and covers the plurality of upper/lower terminals to form a docking space. A docking opening is formed on a side of the docking space, and the metal housing includes a stopping portion disposed around the docking opening. The upper/lower insulating component is disposed in the docking space and restrained between the stopping portion and the upper/lower main body. The upper/lower grounding component is disposed on the upper/lower insulating component.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: June 26, 2018
    Assignee: P-TWO INDUSTRIES INC.
    Inventors: Chien-Chun Wang, Chih-Ping Chung
  • Publication number: 20180175529
    Abstract: A connector structure includes an upper connecting component, a lower connecting component, a shielding plate, a metal housing, an upper insulating component, an upper grounding component, a lower insulating component and a lower grounding component. The upper/lower connecting component includes an upper/lower main body and a plurality of upper/lower terminals. The shielding plate is disposed between the upper connecting component and the lower connecting component. The metal housing covers the upper main body, the shielding plate and the lower main body and covers the plurality of upper/lower terminals to form a docking space. A docking opening is formed on a side of the docking space, and the metal housing includes a stopping portion disposed around the docking opening. The upper/lower insulating component is disposed in the docking space and restrained between the stopping portion and the upper/lower main body. The upper/lower grounding component is disposed on the upper/lower insulating component.
    Type: Application
    Filed: September 21, 2017
    Publication date: June 21, 2018
    Inventors: Chien-Chun Wang, Chih-Ping Chung