Patents by Inventor Chih Wang

Chih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250256443
    Abstract: A device for venting and ejection, and an injection mold for plastic injection are provided. The device includes a gas permeable layer and a gas storage chamber. The gas permeable layer is arranged at the end of a filling area in the injection mold, is made of porous metal materials used for the gas to pass through. The gas storage chamber is arranged on the side of the gas permeable layer opposite the mold cavity, and a cavity which only communicates with the pores is arranged in the gas storage chamber. During injection molding, after raw materials enter the mold cavity, gas in the mold cavity is compressed by the raw materials and passes through the gas permeable layer to achieve exhaust, to facilitate filling of the raw materials. The compressed gas layer can be stored in the cavity, and then released after the injection is completed.
    Type: Application
    Filed: February 5, 2025
    Publication date: August 14, 2025
    Applicant: voestalpine Technology Institute (Asia) Co. Ltd.
    Inventors: Kuan-Ying Chen, Shang-Chih Wang
  • Publication number: 20250239449
    Abstract: A manufacturing method for a semiconductor device structure and the semiconductor device structure are disclosed. The method includes forming backside connection structures by sequentially forming heat transfer layers stacked upon one another and backside metallization structures sandwiched between the heat transfer layers. The formation of at least one heat transfer layer involves performing an annealing process to turn an insulating material layer into an insulating nanostructured material layer with nano grains and dopants distributed along grain boundaries of the nano grains.
    Type: Application
    Filed: January 24, 2024
    Publication date: July 24, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kun-Yen Liao, Ming-Hsien Lin, Yung-Chih Wang, Hsin-Ping Chen, Tsu-Chun Kuo, Meng-Pei Lu, Cheng-Chin Lee
  • Patent number: 12369022
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive, from a network node, a network assistant information (NAI) message identifying a set of characteristics of a network connection. The UE may communicate with the network node using a communication configuration associated with the set of characteristics of the network connection. Numerous other aspects are described.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: July 22, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Kai-Chun Cheng, Jen-Chun Chang, Kuhn-Chang Lin, Wen-Hsin Hsia, Chia-Jou Lu, Sheng-Chih Wang, Chenghsin Lin, Yu-Chieh Huang, Chun-Hsiang Chiu, ChihHung Hsieh, Chung Wei Lin, Leong Yeong Choo
  • Patent number: 12367909
    Abstract: A data processing device includes a base plate and an electronic module. The base plate includes N driving portions. The electronic module includes an electronic component, a tray and a recognition mechanism. The tray is configured to support the electronic component and includes N slots. The tray is disposed on the base plate, such that an i-th driving portion of the N driving portions is disposed in an i-th slot of the N slots. The recognition mechanism is disposed on the tray. The recognition mechanism includes N interfering portions and N receiving recesses. When the tray moves with respect to the base plate toward a first direction, the i-th driving portion moves within the i-th slot toward a second direction to push an i-th interfering portion of the N interfering portions to move, such that the i-th interfering portion extends into an i-th receiving recess of the N receiving recesses.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: July 22, 2025
    Assignee: Wiwynn Corporation
    Inventors: Fu-Sheng Cheng, Kuan-Chih Wang, Po-Han Huang, Hung-Chien Wu
  • Publication number: 20250233582
    Abstract: An electronic circuit applied to communication between a controller and a memory array includes a timer and a delay-locked loop. The timer counts a counting time based on a selection signal generated by the controller to generate a first enable signal. The delay-locked loop delays an output clock signal by a delay time based on a clock signal generated by the controller and the first enable signal to generate the delay clock signal. When the controller performs a read operation on the memory array, the memory array outputs the output clock signal and a data signal. The controller samples the data signal using the delay clock signal.
    Type: Application
    Filed: September 10, 2024
    Publication date: July 17, 2025
    Inventor: Cheng-Chih WANG
  • Patent number: 12362160
    Abstract: A method for forming a layer includes following operations. A workpiece is received in an apparatus for deposition. The apparatus for deposition includes a chamber, a pedestal disposed in the chamber to accommodate the workpiece, and a ring disposed on the pedestal. The ring includes a ring body having a first top surface and a second top surface and a barrier structure disposed between the first top surface and the second top surface. A vertical distance is defined by a top surface of the barrier structure and a top surface of the workpiece. The vertical distance is between approximately 0 mm and approximately 50 mm. A target disposed in the apparatus for deposition is sputtered. A sputtered material is deposited onto a top surface of the workpiece to form a layer. The barrier structure alters an electrical density distribution during the depositing the sputter material.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: July 15, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsin-Liang Chen, Wen-Chih Wang, Chia-Hung Liao, Cheng-Chieh Chen, Yi-Ming Yeh, Hung-Ting Lin, Yung-Yao Lee
  • Patent number: 12361993
    Abstract: A memory chip includes a first decoding device and a memory device. The first decoding device is configured to generate multiple word line signals. The memory device is configured to generate a third data signal based on a first data signal and a second data signal. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit is configured to generate the first data signal at a first node according to the word line signals during a first period. The second memory circuit is configured to generate the second data signal at a second node different from the first node according to the word line signals during a second period after the first period. A method of operating a memory chip is also disclosed herein.
    Type: Grant
    Filed: April 15, 2024
    Date of Patent: July 15, 2025
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsiang-Chi Cheng, Shyh-Bin Kuo, Yi-Cheng Lai, Chung-Hung Chen, Shih-Hsien Yang, Yu-Chih Wang, Kuo-Hsiang Chen
  • Patent number: 12349337
    Abstract: A memory structure of the present disclosure includes a source/drain region on a substrate, a first dielectric layer covering the source/drain region, a second dielectric layer on the first dielectric layer, and a contact contacting the source/drain region. The contact includes a first contact portion extending into the source/drain region, a second contact portion extending into the first dielectric layer, and a third contact portion extending into the second dielectric layer. A bottom surface of the first contact portion is lower than a top surface of the source/drain region. The second contact portion is between the first contact portion and the third contact portion. A distance between a sidewall of the first contact portion and a sidewall of the source/drain region is 30% to 60% of a width of the source/drain region.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: July 1, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wei-Chih Wang
  • Publication number: 20250210485
    Abstract: A communication device includes a plurality of dies, a composite substrate and at least one antenna. The composite substrate includes a PCB, a redistribution layer and a connecting layer. The connecting layer is configured to electrically connect the redistribution layer and the PCB. Each die is electrically connected to the redistribution layer. The distribution layer corresponding to each die is formed integrally. The PCB is disposed between the antenna and the redistribution layer. The antenna is electrically connected to the dies through the composite substrate. A manufacturing method of the composite substrate is also provided.
    Type: Application
    Filed: December 29, 2023
    Publication date: June 26, 2025
    Applicant: AUO Corporation
    Inventors: Shih-Hsien Yang, Yi-Cheng Lai, Chung-Hung Chen, Yu-Chih Wang, Yi-Hui Lin, Shuo-Yang Sun, Zong-Long Jhang
  • Patent number: 12340928
    Abstract: A transformer device includes a first coil, a second coil, and a third coil. The first coil includes first segments and at least one first connecting portion, in which the first segments are coupled to each other through the at least one first connecting portion. The second coil includes second segments and second connecting portions, in which the of second segments are coupled to each other through the second connecting portions. The third coil is configured to couple the first coil and the second coil. The third coil includes third segments and third connecting portions, a part of the plurality of third segments are coupled in parallel with each other through the third connecting portions, and at least one part of the first segments and at least one part of the second segments are arranged between the part of the third segments.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: June 24, 2025
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Po-Chih Wang
  • Publication number: 20250188031
    Abstract: A composition comprising a first compound and a second compound, wherein the first compound has a formula selected from the group consisting of and wherein the second compound has the formula is disclosed.
    Type: Application
    Filed: February 12, 2025
    Publication date: June 12, 2025
    Applicant: Universal Display Corporation
    Inventors: Bin MA, Ting-Chih WANG, Vadim ADAMOVICH
  • Publication number: 20250192434
    Abstract: An antenna device includes a transparent substrate and a plurality of antenna units disposed on the transparent substrate. The transparent substrate has a first surface and a second surface opposite to the first surface. A light-transmitting area is provided between adjacent antenna units. Each antenna unit includes an antenna electrode, a ground electrode, a redistribution structure, and a chip. The antenna electrode is disposed on the first surface of the transparent substrate. The ground electrode is disposed on the second surface of the transparent substrate. A width of the ground electrode in a first direction is greater than a width of the antenna electrode in a first direction. The redistribution structure is coupled to the antenna electrode. The ground electrode is located between the redistribution structure and the transparent substrate. The chip is bonded to the redistribution structure.
    Type: Application
    Filed: October 13, 2024
    Publication date: June 12, 2025
    Applicant: AUO Corporation
    Inventors: Shih-Hsien Yang, Chung-Hung Chen, Yi-Cheng Lai, Yu-Chih Wang, Yi-Hui Lin, Shuo-Yang Sun, Zong-Long Jhang
  • Publication number: 20250192428
    Abstract: An antenna device includes a transparent substrate and a plurality of antenna units arranged on the transparent substrate. Each antenna unit includes an antenna electrode, a ground electrode, a thin-film circuit structure, a redistribution structure and a chip. The redistribution structure includes a digital signal pad, an analog signal pad, a radio frequency (RF) signal pad, and an antenna signal pad. The chip is bonded to the digital signal pad, the analog signal pad, the RF signal pad, and the antenna signal pad. The digital signal pad and the analog signal pad are disposed in a first bonding area. The RF signal pad and the antenna signal pad are disposed in a second bonding area.
    Type: Application
    Filed: November 4, 2024
    Publication date: June 12, 2025
    Applicant: AUO Corporation
    Inventors: Yu-Chih Wang, Chung-Hung Chen, Yi-Cheng Lai, Shih-Hsien Yang
  • Publication number: 20250192079
    Abstract: An antenna device includes a transparent substrate, a thin film circuit structure, a redistribution structure, multiple chips, and multiple antenna electrodes. The thin film circuit structure is located above a first surface of the transparent substrate and includes a first thin film conductive layer. The redistribution structure is located on the thin film circuit structure and includes a first redistribution layer. A thickness of the first thin film conductive layer is less than a thickness of the first redistribution layer. The chips are bonded to the redistribution structure. The antenna electrodes are located above a second surface of the transparent substrate opposite to the first surface. Each of the antenna electrodes overlaps a corresponding one of the chips.
    Type: Application
    Filed: December 6, 2024
    Publication date: June 12, 2025
    Applicant: AUO Corporation
    Inventors: Yi-Cheng Lai, Chung-Hung Chen, Yu-Chih Wang, Shih-Hsien Yang
  • Patent number: 12327825
    Abstract: A package structure includes a package substrate, a first die, a second die, a first underfill, and a second underfill. The first die and a second die are disposed on the package substrate. The first underfill is between the first die and the package substrate, and the first underfill includes a first extension portion extending from a first sidewall of the first die toward the second die. The second underfill is between the second die and the package substrate, and the second underfill includes a second extension portion extending from a second sidewall of the second die toward the first die, the second extension portion overlapping the first extension portion on the package substrate.
    Type: Grant
    Filed: October 6, 2023
    Date of Patent: June 10, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jen-Yuan Chang, Sheng-Chih Wang
  • Patent number: 12319653
    Abstract: A composition comprising a first compound and a second compound, wherein the first compound has a formula selected from the group consisting of wherein the second compound has the formula is disclosed.
    Type: Grant
    Filed: February 2, 2024
    Date of Patent: June 3, 2025
    Inventors: Bin Ma, Ting-Chih Wang, Vadim Adamovich
  • Publication number: 20250176081
    Abstract: A light-emitting diode (LED) control system includes a LED array composed of a plurality of LED channels each being composed of a plurality of LEDs; a plurality of LED drivers connected in sequence each being configured to drive a corresponding LED channel, the LED channels being controlled in sequence by the LED drivers; and a LED controller that sends brightness data to the LED drivers, which in turn control brightness of the LEDs. After brightness data input has been transferred to an associated LED driver, the brightness data input is then replaced with status data returned by the associated LED driver, and the replaced status data is finally read by the LED controller via other LED drivers.
    Type: Application
    Filed: November 29, 2023
    Publication date: May 29, 2025
    Inventor: Ming-Chih Wang
  • Publication number: 20250139464
    Abstract: The present application provides a method for predicting energy consumption and an electronic device. The electronic device obtains energy efficiency data of a target device within a preset time period, and determines a plurality of influencing factors from the energy efficiency data according to a preset energy efficiency indicator and a feature extraction algorithm. The electronic device further determines a regression prediction model according to the plurality of influencing factors and the preset energy efficiency indicator, inputs the plurality of influencing factors into the regression prediction model and generates a first prediction value at each moment within the preset time period, and generates a trend graph of energy consumption corresponding to the preset time period according to a first predicted value at each moment. The present application is able to improve an efficiency of predicting energy consumption.
    Type: Application
    Filed: April 19, 2024
    Publication date: May 1, 2025
    Inventors: YU-CHIH WANG, Ting-Yu LIN
  • Publication number: 20250130508
    Abstract: A method includes treating a burled surface of an object using radiation or heat and setting parameters of the radiation or heat to effectuate a predetermined surface strength, hardness, roughness, coefficient of friction, chemical resistance, wear resistance, and/or corrosion of the burled surface.
    Type: Application
    Filed: June 13, 2022
    Publication date: April 24, 2025
    Applicant: ASML Netherlands B.V.
    Inventors: Hao-Chih WANG, Samira FARSINEZHAD, Sotrios SYRINTZIS, Keane Michael LEVY
  • Publication number: 20250132733
    Abstract: A self-protection circuitry is configured to receive a first power source. The self-protection circuitry includes a first transistor circuit, a first switch circuit, and a control circuit. The first transistor circuit includes a first input terminal, a first output terminal, and a first control terminal. The first output terminal is electrically connected to a ground terminal, and the first input terminal is configured to receive the first power source. The first switch circuit is electrically connected to the first control terminal and the first input terminal. The control circuit is electrically connected to the first switch circuit, and is configured to: before the first power source supplies power to the first transistor circuit, control the first switch circuit to be 10 conducted, and after the first power source continuously supplies power to the first transistor circuit, control the first switch circuit to be cut off.
    Type: Application
    Filed: October 17, 2024
    Publication date: April 24, 2025
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Kuan-Hao Tseng, Hung-Yu Tsai, Po-Chih Wang