Patents by Inventor Chih Wang

Chih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240363450
    Abstract: Provided is a method of detecting photoresist scums and photoresist residues. A carrier is provided. The carrier has a photoresist layer with opening patterns therein. A plasma etching process is performed to the opening patterns of the photoresist layer. Charges are injected to the opening patterns of the photoresist layer. Whether a photoresist scum or residue is present in at least one of the opening patterns is detected.
    Type: Application
    Filed: July 8, 2024
    Publication date: October 31, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, Hui-Jung Tsai, Chih Wang
  • Patent number: 12080609
    Abstract: Provided is a method of detecting photoresist scums and photoresist residues. A carrier is provided. The carrier has a photoresist layer with opening patterns therein. A plasma etching process is performed to the opening patterns of the photoresist layer. Charges are injected to the opening patterns of the photoresist layer. Whether a photoresist scum or residue is present in at least one of the opening patterns is detected.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: September 3, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, Hui-Jung Tsai, Chih Wang
  • Patent number: 11823936
    Abstract: An alignment holder for holding a composite specimen includes a holder body and a positioning mechanism. The holder body is configured to clamp a first side of the composite specimen therein. The positioning mechanism is movably engaged with the holder body. The positioning mechanism is configured to lean against a second side of the composite specimen and move relatively to the holder body for adjusting a clamping position of the composite specimen clamped by the holder body.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: November 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih Wang, Hung-Jui Kuo, Hui-Jung Tsai
  • Publication number: 20230153651
    Abstract: An enterprise management system and an execution method thereof are provided. The enterprise management system includes a storage device, storing multiple modules, and a processor, coupled to the storage device and used to execute the modules. The processor obtains user operation behavior data and executes a data collection module according to the user operation behavior data to obtain user organization information, a user operation behavior record, and a user operation time record. The data collection module generates inference data according to the user organization information, the user operation behavior record, and the user operation time record. The processor executes a model inference module, and inputs the inference data to a task inference model in the model inference module, so that the task inference model generates inference result data.
    Type: Application
    Filed: February 17, 2022
    Publication date: May 18, 2023
    Applicants: Digiwin Software Co., Ltd, DATA SYSTEMS CONSULTING CO., LTD.
    Inventors: Wenliang Bi, Chih Wang, Shih-Hung Liu, Guoxin Sun
  • Patent number: 11508671
    Abstract: A manufacturing method of a semiconductor package includes at least the following steps. A rear surface of a semiconductor die is attached to a patterned dielectric layer of a first redistribution structure through a die attach material, where a thickness of a portion of the die attach material filling a gap between the rear surface of the semiconductor die and a recessed area of the patterned dielectric layer is greater than a thickness of another portion of the die attach material interposed between the rear surface of the semiconductor die and a non-recessed area of the patterned dielectric layer. An insulating encapsulant is formed on the patterned dielectric layer of the first redistribution structure to cover the semiconductor die and the die attach material. Other methods for forming a semiconductor package are also provided.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: November 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yuan Teng, Hao-Yi Tsai, Tin-Hao Kuo, Ching-Yao Lin, Teng-Yuan Lo, Chih Wang
  • Publication number: 20220238364
    Abstract: An alignment holder for holding a composite specimen includes a holder body and a positioning mechanism. The holder body is configured to clamp a first side of the composite specimen therein. The positioning mechanism is movably engaged with the holder body. The positioning mechanism is configured to lean against a second side of the composite specimen and move relatively to the holder body for adjusting a clamping position of the composite specimen clamped by the holder body.
    Type: Application
    Filed: April 13, 2022
    Publication date: July 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih Wang, Hung-Jui Kuo, Hui-Jung Tsai
  • Patent number: 11335579
    Abstract: A method for manufacturing a semiconductor package includes the following steps. A semiconductor process is performed to form an encapsulated semiconductor device, wherein the encapsulated semiconductor device comprises an encapsulating material and a semiconductor device encapsulated by the encapsulating material. A testing apparatus including a holder body, a positioning mechanism and a force applying bar is provided. The encapsulated semiconductor device is clamed by the holder body. A clamping position of the encapsulated semiconductor device is adjusted by the positioning mechanism. The positioning mechanism is removed. A predetermined force is applied to a part of the encapsulated semiconductor device exposed by the holder body by the force applying bar. If the encapsulated semiconductor device is failed by the predetermined force, a process parameter of the semiconductor process is modified to form a modified encapsulated semiconductor device.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: May 17, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih Wang, Hung-Jui Kuo, Hui-Jung Tsai
  • Publication number: 20210118752
    Abstract: Provided is a method of detecting photoresist scums and photoresist residues. A carrier is provided. The carrier has a photoresist layer with opening patterns therein. A plasma etching process is performed to the opening patterns of the photoresist layer. Charges are injected to the opening patterns of the photoresist layer. Whether a photoresist scum or residue is present in at least one of the opening patterns is detected.
    Type: Application
    Filed: November 23, 2020
    Publication date: April 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, Hui-Jung Tsai, Chih Wang
  • Patent number: 10985115
    Abstract: A semiconductor package includes a first redistribution structure, a semiconductor die electrically coupled to the first redistribution structure, a die attach material interposed between the first redistribution structure and the semiconductor die, and an insulating encapsulant disposed on the first redistribution structure and covering the semiconductor die and the die attach material. A bottom of the semiconductor die is embedded in the die attach material, and a thickness of a portion of the die attach material disposed over a spacing of conductive traces of the first redistribution structure is greater than a thickness of another portion of the die attach material disposed over the conductive traces of the first redistribution structure and underlying the bottom of the semiconductor die.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: April 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yuan Teng, Hao-Yi Tsai, Tin-Hao Kuo, Ching-Yao Lin, Teng-Yuan Lo, Chih Wang
  • Publication number: 20210098277
    Abstract: A method for manufacturing a semiconductor package includes the following steps. A semiconductor process is performed to form an encapsulated semiconductor device, wherein the encapsulated semiconductor device comprises an encapsulating material and a semiconductor device encapsulated by the encapsulating material. A testing apparatus including a holder body, a positioning mechanism and a force applying bar is provided. The encapsulated semiconductor device is clamed by the holder body. A clamping position of the encapsulated semiconductor device is adjusted by the positioning mechanism. The positioning mechanism is removed. A predetermined force is applied to a part of the encapsulated semiconductor device exposed by the holder body by the force applying bar. If the encapsulated semiconductor device is failed by the predetermined force, a process parameter of the semiconductor process is modified to form a modified encapsulated semiconductor device.
    Type: Application
    Filed: December 14, 2020
    Publication date: April 1, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih Wang, Hung-Jui Kuo, Hui-Jung Tsai
  • Publication number: 20200402927
    Abstract: A manufacturing method of a semiconductor package includes at least the following steps. A rear surface of a semiconductor die is attached to a patterned dielectric layer of a first redistribution structure through a die attach material, where a thickness of a portion of the die attach material filling a gap between the rear surface of the semiconductor die and a recessed area of the patterned dielectric layer is greater than a thickness of another portion of the die attach material interposed between the rear surface of the semiconductor die and a non-recessed area of the patterned dielectric layer. An insulating encapsulant is formed on the patterned dielectric layer of the first redistribution structure to cover the semiconductor die and the die attach material. Other methods for forming a semiconductor package are also provided.
    Type: Application
    Filed: September 9, 2020
    Publication date: December 24, 2020
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yuan Teng, Hao-Yi Tsai, Tin-Hao Kuo, Ching-Yao Lin, Teng-Yuan Lo, Chih Wang
  • Patent number: 10867827
    Abstract: An alignment holder for holding and testing a composite specimen includes a holder body, a supporter, and a positioning mechanism. The holder body is configured to clamp a first side of the composite specimen. The supporter is detachably connected to a lower part of the holder body for supporting a lower surface of the composite specimen. The positioning mechanism is configured to lean against a second side of the composite specimen and move relatively to the holder body for adjusting a clamping position of the composite specimen clamped by the holder body.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih Wang, Hung-Jui Kuo, Hui-Jung Tsai
  • Patent number: 10847429
    Abstract: Provided is a method of detecting photoresist scums and photoresist residues. A carrier is provided. The carrier has a photoresist layer with opening patterns therein. A plasma etching process is performed to the opening patterns of the photoresist layer. Charges are injected to the opening patterns of the photoresist layer. Whether a photoresist scum or residue is present in at least one of the opening patterns is detected.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: November 24, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, Hui-Jung Tsai, Chih Wang
  • Publication number: 20200321290
    Abstract: A semiconductor package includes a first redistribution structure, a semiconductor die electrically coupled to the first redistribution structure, a die attach material interposed between the first redistribution structure and the semiconductor die, and an insulating encapsulant disposed on the first redistribution structure and covering the semiconductor die and the die attach material. A bottom of the semiconductor die is embedded in the die attach material, and a thickness of a portion of the die attach material disposed over a spacing of conductive traces of the first redistribution structure is greater than a thickness of another portion of the die attach material disposed over the conductive traces of the first redistribution structure and underlying the bottom of the semiconductor die.
    Type: Application
    Filed: June 19, 2020
    Publication date: October 8, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yuan Teng, Hao-Yi Tsai, Tin-Hao Kuo, Ching-Yao Lin, Teng-Yuan Lo, Chih Wang
  • Patent number: 10797008
    Abstract: A manufacturing method of a semiconductor package includes at least the following steps. A dielectric layer is formed on a conductive pattern and in a space between the conductive pattern, where a concave area of the dielectric layer is formed corresponding to the space between the conductive pattern. A semiconductor die is disposed on the concave area of the dielectric layer with a die attach material interposed therebetween. A pressure is applied to the die attach material so that the concave area of the dielectric layer is filled with the die attach material, and a portion of the die attach material is extruded from the concave area to expand wider than an area of the semiconductor die. An insulating encapsulant is formed on the dielectric layer to cover the semiconductor die. Other methods for forming a semiconductor package are also provided.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yuan Teng, Hao-Yi Tsai, Tin-Hao Kuo, Ching-Yao Lin, Teng-Yuan Lo, Chih Wang
  • Patent number: 10734328
    Abstract: A semiconductor package includes a first redistribution structure, a semiconductor die disposed on the first redistribution structure, a die attach material disposed between the first redistribution structure and the semiconductor die, and an insulating encapsulant disposed on the first redistribution structure. A first shortest distance from a midpoint of a bottom edge of the semiconductor die to a midpoint of an bottom edge of an extruded region of the die attach material in a width direction of the semiconductor die is greater than a second shortest distance between an endpoint of the bottom edge of the semiconductor die to an endpoint of the bottom edge of the extruded region of the die attach material. The insulating encapsulant encapsulates the semiconductor die and the die attach material. An inclined interface is between the insulating encapsulant and the extruded region of the die attach material.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: August 4, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yuan Teng, Hao-Yi Tsai, Tin-Hao Kuo, Ching-Yao Lin, Teng-Yuan Lo, Chih Wang
  • Publication number: 20200118945
    Abstract: A semiconductor package includes a first redistribution structure, a semiconductor die disposed on the first redistribution structure, a die attach material disposed between the first redistribution structure and the semiconductor die, and an insulating encapsulant disposed on the first redistribution structure. A first shortest distance from a midpoint of a bottom edge of the semiconductor die to a midpoint of an bottom edge of an extruded region of the die attach material in a width direction of the semiconductor die is greater than a second shortest distance between an endpoint of the bottom edge of the semiconductor die to an endpoint of the bottom edge of the extruded region of the die attach material. The insulating encapsulant encapsulates the semiconductor die and the die attach material. An inclined interface is between the insulating encapsulant and the extruded region of the die attach material.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yuan Teng, Hao-Yi Tsai, Tin-Hao Kuo, Ching-Yao Lin, Teng-Yuan Lo, Chih Wang
  • Publication number: 20200105567
    Abstract: An alignment holder for holding and testing a composite specimen includes a holder body, a supporter, and a positioning mechanism. The holder body is configured to clamp a first side of the composite specimen. The supporter is detachably connected to a lower part of the holder body for supporting a lower surface of the composite specimen. The positioning mechanism is configured to lean against a second side of the composite specimen and move relatively to the holder body for adjusting a clamping position of the composite specimen clamped by the holder body.
    Type: Application
    Filed: April 23, 2019
    Publication date: April 2, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih Wang, Hung-Jui Kuo, Hui-Jung Tsai
  • Publication number: 20200091091
    Abstract: A manufacturing method of a semiconductor package includes at least the following steps. A dielectric layer is formed on a conductive pattern and in a space between the conductive pattern, where a concave area of the dielectric layer is formed corresponding to the space between the conductive pattern. A semiconductor die is disposed on the concave area of the dielectric layer with a die attach material interposed therebetween. A pressure is applied to the die attach material so that the concave area of the dielectric layer is filled with the die attach material, and a portion of the die attach material is extruded from the concave area to expand wider than an area of the semiconductor die. An insulating encapsulant is formed on the dielectric layer to cover the semiconductor die. Other methods for forming a semiconductor package are also provided.
    Type: Application
    Filed: November 21, 2019
    Publication date: March 19, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yuan Teng, Hao-Yi Tsai, Tin-Hao Kuo, Ching-Yao Lin, Teng-Yuan Lo, Chih Wang
  • Patent number: 10575120
    Abstract: Method for location-centric social network and provide means for users to interact with each other over the Internet more private and effective through location correlated information content, and, more particularly, to a method and system for autonomous social media system that based upon location-reference rather than on user-centered process.
    Type: Grant
    Filed: February 27, 2016
    Date of Patent: February 25, 2020
    Inventors: Ray Wang, Chih Wang