Abstract: The present invention provides a method for fabricating patterned cellulose nanocrystal (CNC) composite nanofibers and thin films for optical and electromagnetic sensor and actuator application, comprising the following steps of: selecting materials for fabricating patterned cellulose nanocrystal (CNC) composite nanofibers; and fabricating patterned CNCs composite nanofibers by incorporating secondary phases either during electrospinning or post-processing, wherein the secondary phases may include dielectrics, electrically or magnetically activated nanoparticles or polymers and biological cells in mechanically reinforced by CNCs.

Abstract: A method includes etching a first portion and a second portion of a dummy gate stack to form a first opening and a second opening, respectively, and depositing a silicon nitride layer to fill the first opening and the second opening. The deposition of the silicon nitride layer comprises a first process selected from treating the silicon nitride layer using hydrogen radicals, implanting the silicon nitride layer, and combinations thereof. The method further includes etching a third portion of the dummy gate stack to form a trench, etching a semiconductor fin underlying the third portion to extend the trench down into a bulk portion of a semiconductor substrate underlying the dummy gate stack, and depositing a second silicon nitride layer into the trench.

Abstract: A wireless charger may include a transmitting coil to induce charging of a target device, a printed circuit board, a charger casing to include the transmitting coil and the printed circuit board, and a thermally conductive coating to dissipate heat. The transmitting coil may include at least one electrically conducting coil. The thermally conductive coating may be in direct contact with at least one of the transmitting coil, the printed circuit board, and the charger casing.

Abstract: The invention discloses a NOR-type memory device and a method of fabricating such NOR-type memory device. The NOR-type memory device according to a preferred embodiment of the invention includes a semiconductor substrate, a plurality of bit lines formed on the semiconductor substrate, a plurality of first isolation stripes, a plurality of second isolation stripes, a plurality of multi-layer stripes, a plurality of memory cells, a plurality of first sub-bit lines, a plurality of second sub-bit line, a plurality of word lines, an insulating layer, a plurality of grounded via contacts, and a grounding layer. The first isolation stripes and the second isolation stripes extend in a longitudinal direction defined by the semiconductor substrate. Each memory cell corresponds to one of the columns and one of the rows defined by the semiconductor substrate. The memory cells on one side of each first isolation stripe and the memory cells on the other side of said one first isolation stripe are staggeredly arranged.

Abstract: The invention discloses a dynamic random access memory (DRAM) device and a method of fabricating such DRAM device. The DRAM device according to the invention includes a plurality of bit lines formed on a semiconductor substrate, a plurality of first isolation stripes, a plurality of second isolation stripes, a plurality of transistors formed between the first isolation stripes and the second isolation stripes, a plurality of word lines, and a plurality of capacitors formed above the first isolation stripes and the second isolation stripes. The semiconductor substrate defines a longitudinal direction, a transverse direction, a normal direction, a plurality of columns in the longitudinal direction, and a plurality of rows in the transverse direction. The first isolation stripes and the second isolation stripes extend in the longitudinal direction. Each transistor corresponds to one of the columns and one of the rows.

Abstract: An ultrasound system includes an ultrasound probe, N switch elements and a processing unit, wherein the N switch elements are electrically connected to the ultrasound probe, the processing unit is electrically connected to the ultrasound probe and the N switch elements, and N is a positive integer. The ultrasound probe transmits and receives an ultrasound signal by a scanning frequency. Each of the switch elements has a main output frequency. The processing unit converts the ultrasound signal into an ultrasound image. The processing unit determines whether a noise exists in the ultrasound image. When the processing unit determines that the noise exists in the ultrasound image, the processing unit adjusts the main output frequency of at least one of the N switch elements.

Abstract: A composition formed of a mixture of two compounds having similar thermal evaporation properties that are pre-mixed into an evaporation source that can be used to co-evaporate the two compounds into an emission layer in OLEDs via vacuum thermal evaporation process is disclosed.

Abstract: Systems and methods are provided for facilitating fabrication of a composite part. An illustrative method includes loading a Numerical Control (NC) program that directs layup of tows by a fiber placement machine to create a laminate for curing into a composite part, identifying tow information recited in the NC program, applying inputs based on the tow information to a neural network that has been trained with measurements describing tow placement within other laminates that have been laid-up, and reporting likelihood of a fabrication discrepancy that is out of tolerance, based on an output of the neural network.

Abstract: A blower housing is provided, including: two housing bodies and a positioning mechanism. Each of the two housing bodies includes a peripheral flange extending annularly. Two said peripheral flanges are detachably attached to and peripherally abutted against each other. One of the two said peripheral flanges has a lip protruding laterally therefrom, and the other of the two said peripheral flanges is at least partially overlapped with the lip. The positioning mechanism includes a first positioning portion which is disposed on one of the two housing bodies, and the first positioning portion is configured to be embeddedly engaged with a base.

Abstract: A shuttle vector is provided which can be manipulated in various kinds of host cells, thereby providing a novel tool for the field of genetic engineering. Also provided are a prokaryotic host cell and a kit including said shuttle vector, so as to construct expression vectors which contain the target gene using the shuttle vector, thereby producing proteins in various host cells with one single vector.

Abstract: A semiconductor processing station includes first and second chambers, and a cooling stage. The second chamber includes a cooling pipe disposed inside the second chamber, and an external pipe. The cooling pipe includes a first segment disposed along a sidewall of the second chamber, and a second segment disposed perpendicular to the first segment and located above a wafer carrier in the second chamber. An end of the second segment is connected to an end of the first segment. The external pipe is connected to the second segment distal from the end of the second segment to provide a fluid to flow through the cooling pipe from an exterior to an interior of the second chamber. The fluid discharges toward the wafer carrier through the first segment. The first chamber is surrounded by the second chamber and the cooling stage, and communicates between the cooling stage and the second chamber.

Abstract: A semiconductor package includes a first redistribution structure, a semiconductor die electrically coupled to the first redistribution structure, a die attach material interposed between the first redistribution structure and the semiconductor die, and an insulating encapsulant disposed on the first redistribution structure and covering the semiconductor die and the die attach material. A bottom of the semiconductor die is embedded in the die attach material, and a thickness of a portion of the die attach material disposed over a spacing of conductive traces of the first redistribution structure is greater than a thickness of another portion of the die attach material disposed over the conductive traces of the first redistribution structure and underlying the bottom of the semiconductor die.

Abstract: A manufacturing method of a semiconductor package includes at least the following steps. A dielectric layer is formed on a conductive pattern and in a space between the conductive pattern, where a concave area of the dielectric layer is formed corresponding to the space between the conductive pattern. A semiconductor die is disposed on the concave area of the dielectric layer with a die attach material interposed therebetween. A pressure is applied to the die attach material so that the concave area of the dielectric layer is filled with the die attach material, and a portion of the die attach material is extruded from the concave area to expand wider than an area of the semiconductor die. An insulating encapsulant is formed on the dielectric layer to cover the semiconductor die. Other methods for forming a semiconductor package are also provided.

Abstract: A fan failure backup apparatus includes a first fan module and a second fan module. When a second control unit of the second fan module realizes that the first fan module is failed through a first control unit of the first fan module, and the second control unit realizes that the second fan module is not failed, the second control unit controls the second fan module to additionally enhance a pressure-flow characteristic of a second fan unit of the second fan module.

Abstract: A keyswitch with adjustable tactile feedback is adjusted by an adjusting method. The keyswitch includes a baseplate, an upper housing, an upper bushing component, a lower bushing component, a keycap and a recovering component. The baseplate has an electrode module, the upper housing is disposed on the baseplate, the upper bushing component is movably disposed on the upper housing, the lower bushing component is movably located between the baseplate and the upper housing, and the keycap is connected to a connecting portion of the upper bushing component. The lower bushing component can rotate relative to the baseplate to switch between a first position and a second position. The lower bushing component has a first lateral surface and a second lateral surface with different shapes. The recovering component is disposed between the baseplate and the lower bushing component to upwardly push the lower bushing component.

Abstract: The disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first and a second polysilicon layers on the substrate, a third polysilicon layer between the first and the second polysilicon layers, a first isolation layer adjacent with the first to the third polysilicon layers, a gate dielectric layer and a gate conductive layer in the third polysilicon layer, a second isolation layer on the gate conductive layer and the third polysilicon layer, a third isolation layer on the first the second isolation layers, a bit line via contact through the first and the third isolation layers, and a conductive layer on the bit line via contact and the third isolation layer. The third polysilicon layer has a concave portion between the first and the second polysilicon layers.

Abstract: A method for fabricating an OLED using a mixture that is an evaporation source for a vacuum deposition process includes providing a container that contains the mixture, providing a substrate having a first electrode disposed thereon, depositing an organic layer over the first electrode by evaporating the mixture in the container in a high vacuum deposition tool, and depositing a second electrode over the organic layer.

Abstract: A method for correcting an angle sensor is applied to a step motor including an angle sensor, where the angle sensor rotates with the step motor, and the method for correcting an angle sensor includes the following steps: rotating the step motor by a preset angle to a first position; reading a first voltage of the angle sensor when the angle sensor is rotated to the first position; determining whether the first voltage deviates from a preset voltage curve; if yes, recording a first offset of the first voltage relative to the preset voltage curve; and compensating for a sensing angle of the angle sensor according to the first offset. A device for correcting an angle sensor is further provided.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first metal wire arranged within an inter-level dielectric (ILD) layer over a substrate. A second metal wire is arranged within the ILD layer and is laterally separated from the first metal wire by an air-gap. A dielectric layer is arranged over the first metal wire and the second metal wire. The dielectric layer has a curved surface along a top of the air-gap. The curved surface of the dielectric layer is a smooth curved surface that continuously extends between opposing sides of the air-gap. A via is disposed on and over the second metal wire.

Abstract: A semiconductor processing station including a central transfer chamber, a load lock chamber disposed adjacent to the central transfer chamber, and a cooling stage disposed adjacent to the load lock chamber and the central transfer chamber is provided. The load lock chamber is adapted to contain a wafer carrier including a plurality of wafers. The central transfer chamber communicates between the cooling stage and the load lock chamber to transfer a wafer of the plurality of wafers between the cooling stage and the load lock chamber.