Patents by Inventor Chih-Wei Chao
Chih-Wei Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9246053Abstract: A light-emitting device of little aging electric leakage and high luminous efficiency and fabrication thereof, in which, the light-emitting device includes: a semiconductor epitaxial laminated layer that comprises an N-type semiconductor layer, a P-type semiconductor layer and a light-emitting layer between the N-type semiconductor layer and the P-type semiconductor layer, the surface of which has deflected dislocation; electromigration resistant metal that fills into the deflected dislocation over the N-type or/and P-type semiconductor layer surface through pretreatment to block the electromigration channel formed over the semiconductor epitaxial laminated layer due to deflected dislocation to eliminate electric leakage.Type: GrantFiled: June 24, 2015Date of Patent: January 26, 2016Assignee: Xiamen Sanan Optoelectronics Technology Co., Ltd.Inventors: Xinghua Liang, Te-Ling Hsia, Chenke Hsu, Chih-Wei Chao, Shuiqing Li
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Publication number: 20160020373Abstract: A light-emitting device includes a base having an insulating part and a metal block; a light-emitting diode (LED) chip over the base; a water soluble paste between the LED chip and the base metal block for chip fixing and heat conduction; packaging glue covering the LED chip; and the LED chip bottom, water soluble paste and the base metal block form an all-metal thermal conducting path to achieve low a thermal resistance.Type: ApplicationFiled: May 29, 2015Publication date: January 21, 2016Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: JUNPENG SHI, PEI-SONG CAI, HAO HUANG, ZHENDUAN LIN, CHIH-WEI CHAO, CHEN-KE HSU
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Patent number: 9202974Abstract: A double-sided LED has a double-sided light emitting structure formed by electroplating or electrocasting without the need for wire bonding. The double-sided light emitting gives the chip a light-emitting angle of 150 degrees or higher. In addition, the device has good light extraction and heat dissipation characteristics.Type: GrantFiled: May 14, 2015Date of Patent: December 1, 2015Assignee: Xiamen Sanan Optoelectronics Technology Co., Ltd.Inventors: Shaohua Huang, Chih-Wei Chao
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Publication number: 20150341257Abstract: A device receives traffic; identifies an address associated with the traffic; determines whether the address is associated with an aggregate interface, the aggregate interface being associated with a first port and a second port. The first port corresponds to a first node in a first state, that indicates that the first node is available to forward the traffic, and the second port corresponds to a second node in a second state, that indicates that that the second node is not available to forward the traffic. The device transmits the traffic to the first node via the first port and to the second node, via the second port, when the address is associated with the aggregate interface. Transmitting the traffic enables the second node to forward the traffic when the first node changes from the first state to the second state.Type: ApplicationFiled: July 31, 2015Publication date: November 26, 2015Inventors: Dongyi JIANG, Jin SHANG, David YU, Tsai-Zong LIN, Chih-Wei CHAO
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Publication number: 20150318444Abstract: An integrated LED light-emitting device includes: at least two mutually-isolated LED light-emitting epitaxial units having an upper and a lower surface, in which, the upper surface is a light-emitting surface; an electrode pad layer over the lower surface of the LED light-emitting epitaxial unit, with sufficient thickness for supporting the LED epitaxial unit and connecting to each LED light-emitting epitaxial unit to form a connection circuit plane with no height difference; and the electrode pad layer is divided into a P electrode region and an N electrode region. The LED light-emitting epitaxial units constitute a series, parallel or series-parallel circuit. Embodiments disclosed herein can effectively improve the problems of package welding, electrode shading and poor wiring stability.Type: ApplicationFiled: June 24, 2015Publication date: November 5, 2015Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: SHAOHUA HUANG, XIAOQIANG ZENG, CHIH-WEI CHAO
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Publication number: 20150295142Abstract: A surface-mounted light-emitting device includes: a LED epitaxial structure having two opposite surfaces, wherein the first surface is a light-emitting surface; P and N electrode pads over the second surface of the epitaxial structure, which have sufficient thickness to support the LED epitaxial structure, and the P and N electrode pads have two opposite surfaces respectively, in which, the first surface is approximate to the LED epitaxial structure; an insulator between the P and N pads to prevent the P and N electrode pads from short circuit; and the P and N electrode pads are directly applied in the SMT package. Some embodiments allow structural changes compared with conventional SMT package type by directly mounting the chip over the supporting substrate through an electrode pad. In addition, soldering is followed after the chip process without package step, which is mainly applicable to flip-chip LED device.Type: ApplicationFiled: June 24, 2015Publication date: October 15, 2015Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: SHAOHUA HUANG, XIAOQIANG ZENG, CHIH-WEI CHAO
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Publication number: 20150295130Abstract: A light-emitting device of little aging electric leakage and high luminous efficiency and fabrication thereof, in which, the light-emitting device includes: a semiconductor epitaxial laminated layer that comprises an N-type semiconductor layer, a P-type semiconductor layer and a light-emitting layer between the N-type semiconductor layer and the P-type semiconductor layer, the surface of which has deflected dislocation; electromigration resistant metal that fills into the deflected dislocation over the N-type or/and P-type semiconductor layer surface through pretreatment to block the electromigration channel formed over the semiconductor epitaxial laminated layer due to deflected dislocation to eliminate electric leakage.Type: ApplicationFiled: June 24, 2015Publication date: October 15, 2015Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: XINGHUA LIANG, TE-LING HSIA, CHENKE HSU, CHIH-WEI CHAO, SHUIQING LI
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Publication number: 20150287897Abstract: A packaging structure of a vertical LED chip includes at least a support system, a glue cup that connects to periphery of the support system, a LED chip with light absorption substrate over the support system and packaging glue distributed in periphery of the LED chip, wherein the packaging structure also comprises a baffle that surrounds the outer side wall of the light absorption substrate. Adding of a baffle structure in the support system of the packaging structure can effectively prevent light from being absorbed by the light absorption substrate and reflect such light out of the packaging structure, thus increasing probability of light emitting and improving light intensity of the vertical LED chip.Type: ApplicationFiled: June 17, 2015Publication date: October 8, 2015Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: CHIH-WEI CHAO, YEN-CHIH CHIANG
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Publication number: 20150249182Abstract: A double-sided LED has a double-sided light emitting structure formed by electroplating or electrocasting without the need for wire bonding. The double-sided light emitting gives the chip a light-emitting angle of 150 degrees or higher. In addition, the device has good light extraction and heat dissipation characteristics.Type: ApplicationFiled: May 14, 2015Publication date: September 3, 2015Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: SHAOHUA HUANG, CHIH-WEI CHAO
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Publication number: 20150243863Abstract: A package support including: metal frames connected together; one or more dielectric materials disposed in an inner gap of the metal frames; wherein: the package support has a frame region and a function region; wherein the function region has complete upper and lower surfaces configured to prevent leakage if at least one of the entire upper or lower surfaces is covered with an encapsulant material. A fabrication method allows for manufacturing the package support with a high cell density, relatively low price, high reflectivity, good heat dissipation, and high reliability. The LED package using the package support has a smaller size and improved dissipation properties.Type: ApplicationFiled: January 27, 2015Publication date: August 27, 2015Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: JUN-PENG SHI, PEI-SONG CAI, HAO HUANG, XING-HUA LIANG, ZHEN-DUAN LIN, CHIH-WEI CHAO, CHEN-KE HSU
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Patent number: 9100329Abstract: A device receives traffic; identifies an address associated with the traffic; determines whether the address is associated with an aggregate interface, the aggregate interface being associated with a first port and a second port. The first port corresponds to a first node in a first state, that indicates that the first node is available to forward the traffic, and the second port corresponds to a second node in a second state, that indicates that that the second node is not available to forward the traffic. The device transmits the traffic to the first node via the first port and to the second node, via the second port, when the address is associated with the aggregate interface. Transmitting the traffic enables the second node to forward the traffic when the first node changes from the first state to the second state.Type: GrantFiled: June 28, 2012Date of Patent: August 4, 2015Assignee: Juniper Networks, Inc.Inventors: Dongyi Jiang, Jin Shang, David Yu, Tsai-Zong Lin, Chih-Wei Chao
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Publication number: 20150179889Abstract: An electrode structure for effectively improving the stability of a semiconductor LED includes a reflecting layer capable of current spreading. In such an electrode structure, the current injects from the side surface of the reflecting layer to form a certain potential gradient over the contact surface between the electrode and the LED contact surface, thereby inhibiting the metal ion of the reflecting layer from migration due to electric field during usage, thereby improving device stability. In addition, the electrode portion for current injection can include a high-reflectivity material yet not vulnerable to ion migration, thereby increasing the entire reflecting area and improving luminous efficiency.Type: ApplicationFiled: March 8, 2015Publication date: June 25, 2015Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: LIXUN YANG, JUNPENG SHI, XINGHUA LIANG, GAOLIN ZHENG, ZHIBAI ZHONG, SHAOHUA HUANG, CHIH-WEI CHAO
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Publication number: 20150156223Abstract: A system and method for providing a network proxy layer are disclosed. The network proxy layer may receive a connection establishment event for a client connection of an application session and send the client connection event to an application proxy for the application session, the application proxy being associated with an application of a server. Upon establishment of the client connection, the network proxy layer may receive one or more data packets from the client connection. The network proxy layer may further receive a connection establishment event for a server connection of the application session of the server, and receive one or more data packets from the server connection.Type: ApplicationFiled: December 2, 2013Publication date: June 4, 2015Inventors: Feilong Xu, Chih-Wei Chao, Lee Chen
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Patent number: 9021547Abstract: This disclosure is directed toward an integrated switching and routing security device that provides zone-based security directly between layer two (L2) interfaces of L2 bridge domains and/or layer three (L3) interfaces of L3 routing instances within the security device. The integrated switching and routing security device supports both switching and routing functionalities for packets on L2 and L3 interfaces, and supports security within and between L2 bridge domains and L3 routing instances. The integrated switching and routing security device configures L2 security zones for one or more L2 interfaces and configures L3 security zones for one or more L3 interfaces. The integrated switching and routing security device then applies security policies to incoming packets according to the L2 security zones and/or the L3 security zones associated with the incoming interface and an outgoing interface for the packets to provide end-to-end security within the security device.Type: GrantFiled: December 21, 2011Date of Patent: April 28, 2015Assignee: Juniper Networks, Inc.Inventors: Tsai-Zong Lin, Chih-Wei Chao, Jin Shang, Dongyi Jiang, Anchung Chung
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Publication number: 20150108534Abstract: A vertical LED with current blocking structure and its associated fabrication method involve an anisotropic conductive material and a conductive substrate with concave-convex structure. The anisotropic conductive material forms a bonding layer with vertical conduction and horizontal insulation between the concave-convex substrate and the light-emitting epitaxial layer, thereby forming a vertical LED with current blocking function.Type: ApplicationFiled: December 31, 2014Publication date: April 23, 2015Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: XIAOQIANG ZENG, CHIH-WEI CHAO, SHUNPING CHEN, JIANJIAN YANG, DAQUAN LIN
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Publication number: 20150034959Abstract: A light emitting diode structure includes a patterned substrate, an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer. Plural protruding portions are formed on a surface of the substrate. A horizontal projection of each of the protruding portions on the surface of the substrate has a projection width W1. An interval width W2 is formed between every two adjacent protruding portions. A vertical height h is formed between a peak of each of the protruding portions and the horizontal surface of the surface of the substrate. The value of {[(W1)/2+W2]/h} is substantially equal to tan 46°. The N-type semiconductor layer is located on the substrate and covers the protruding portions. The light emitting layer is located on the N-type semiconductor layer. The P-type semiconductor layer is located on the light emitting layer.Type: ApplicationFiled: April 7, 2014Publication date: February 5, 2015Applicant: Lextar Electronics CorporationInventors: Yi-Ju CHEN, Der-Ling HSIA, Chih-Wei CHAO, Cheng-Ta KUO
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Publication number: 20150004761Abstract: A thin film transistor array substrate includes a substrate, a plurality of poly-silicon islands and a plurality of gates. The substrate has a display region, a gate driver region and a source driver region. Each poly-silicon island disposed on the substrate has a source region, a drain region and a channel region disposed therebetween. The poly-silicon islands include several first poly-silicon islands and several second poly-silicon islands. The first poly-silicon islands having main grain boundaries and sub grain boundaries are only disposed within the display region and the gate driver region. The main grain boundaries of the first poly-silicon islands are only disposed within the source regions and/or the drain regions. The second poly-silicon islands are disposed in the source driver region. Grain sizes of the first poly-silicon islands are substantially different from those of the second poly-silicon islands. Gates corresponding to the channel regions are disposed on the substrate.Type: ApplicationFiled: September 17, 2014Publication date: January 1, 2015Inventors: Ming-Wei Sun, Chih-Wei Chao
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Patent number: 8884304Abstract: A thin film transistor array substrate includes a substrate, a plurality of poly-silicon islands and a plurality of gates. The substrate has a display region, a gate driver region and a source driver region. Each poly-silicon island disposed on the substrate has a source region, a drain region and a channel region disposed therebetween. The poly-silicon islands include several first poly-silicon islands and several second poly-silicon islands. The first poly-silicon islands having main grain boundaries and sub grain boundaries are only disposed within the display region and the gate driver region. The main grain boundaries of the first poly-silicon islands are only disposed within the source regions and/or the drain regions. The second poly-silicon islands are disposed in the source driver region. Grain sizes of the first poly-silicon islands are substantially different from those of the second poly-silicon islands. Gates corresponding to the channel regions are disposed on the substrate.Type: GrantFiled: December 17, 2008Date of Patent: November 11, 2014Assignee: Au Optronics CorporationInventors: Ming-Wei Sun, Chih-Wei Chao
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Patent number: 8879734Abstract: A light-weight resilient mechanism is used to synchronize server secure keying data with member devices in a highly-scalable distributed group virtual private network (VPN). A server device generates an initial secure keying data set, for the VPN, that includes a first version identifier, and sends, to member devices and via point-to-point messages, the secure keying data set. The server device sends, to the member devices, heartbeat push messages including the first version identifier. The server device generates an updated secure keying data set with a second version identifier and sends, to the member devices, a key push message that includes the updated data set. The server device sends, to the member devices, heartbeat push messages including the second version identifier. Member devices may use the first and second version identifiers to confirm that secure keying data sets are current and quickly identify if updates are missed.Type: GrantFiled: April 30, 2013Date of Patent: November 4, 2014Assignee: Juniper Networks, Inc.Inventors: Anthony Ng, Chih-Wei Chao, Nagavenkata Suresh Melam, Nilesh Kumar Maheshwari
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Patent number: 8634560Abstract: A server device initiates a traffic encapsulation key (TEK) re-key sequence for a group virtual private network (VPN), based on an upcoming expiration time for an existing TEK. The server device sends, via a push message during a first time period immediately after the initiating, a new TEK to members of the group VPN. The server device receives, during a second time period that immediately follows the first time period, a pull request, for the new TEK, from one of the members of the group VPN, and sends, to the one of the members, the new TEK, where the re-key sequence transitions all the members of the group VPN from the existing TEK key to the new TEK key before the expiration time for the existing TEK.Type: GrantFiled: September 10, 2010Date of Patent: January 21, 2014Assignee: Juniper Networks, Inc.Inventors: Anthony Ng, Chih-Wei Chao, Suresh Melam, I-Wen Michelle Hsiung