Abstract: A method for fabricating a light emitting diode chip is provided. Firstly, a semiconductor device layer is formed on a substrate. Afterwards, a current spreading layer is formed on a portion of the semiconductor device layer. Then, a current blocking layer and a passivation layer are formed on a portion of the semiconductor device layer not covered by the current spreading layer. Finally, a first electrode is formed on the current blocking layer and the current spreading layer. Moreover, a second electrode is formed on the semiconductor device layer.

Abstract: A method for manufacturing a non-volatile memory and a structure thereof are provided. The manufacturing method comprises the following steps. Firstly, a substrate is provided. Next, a semiconductor layer is formed on the substrate. Then, a Si-rich dielectric layer is formed on the semiconductor layer. After that, a plurality of silicon nanocrystals is formed in the Si-rich dielectric layer by a laser annealing process to form a charge-storing dielectric layer. Last, a gate electrode is formed on the charge-storing dielectric layer.

Abstract: A TFT substrate includes a substrate and at least a TFT disposed thereon. The TFT includes a semiconductor island and at least a gate. The semiconductor island has a source region, a drain region, and a channel region interposed therebetween. The semiconductor island has sub-grain boundaries. The gate corresponds to the channel region. A first included angle between an extending direction of the gate and a line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 90 degrees. A second included angle between the sub-grain boundaries in the channel region and the line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 0 degree or 90 degrees. Additionally, a method of fabricating a TFT substrate, an electronic apparatus, and a method of fabricating the electronic apparatus are also provided.

Abstract: A method for fabricating a light emitting diode chip is provided. Firstly, a semiconductor device layer is formed on a substrate. Afterwards, a current spreading layer is formed on a portion of the semiconductor device layer. Then, a current blocking layer and a passivation layer are formed on a portion of the semiconductor device layer not covered by the current spreading layer. Finally, a first electrode is formed on the current blocking layer and the current spreading layer. Moreover, a second electrode is formed on the semiconductor device layer.

Abstract: A method for fabricating a light emitting diode chip is provided. Firstly, a semiconductor device layer is formed on a substrate. Afterwards, a current spreading layer is formed on a portion of the semiconductor device layer. Then, a current blocking layer and a passivation layer are formed on a portion of the semiconductor device layer not covered by the current spreading layer. Finally, a first electrode is formed on the current blocking layer and the current spreading layer. Moreover, a second electrode is formed on the semiconductor device layer.

Abstract: A photo detector is disclosed. The photo detector has a substrate, a semiconductor layer disposed on the substrate, an insulating layer covered on the semiconductor layer, an interlayer dielectric layer covered on the insulating layer, and two electrodes formed on a portion of the interlayer dielectric layer. The semiconductor layer has a first doping region, a second doping region, and an intrinsic region located between the first doping region and the second doping region. The interlayer dielectric layer has at least three holes to expose a portion of the insulating layer, a portion of the first doping region, and the second doping region. The electrodes are connected to the first doping region and the second doping region through two of the holes.

Abstract: In this pixel structure, a metal layer/a dielectric layer/a heavily doped silicon layer constitutes a bottom electrode/a capacitor dielectric layer/a top electrode of a storage capacitor. At the same time, a metal shielding layer is formed under the thin film transistor to decrease photo-leakage-current.

Abstract: A method for fabricating a light emitting diode chip is provided. Firstly, a semiconductor device layer is formed on a substrate. Afterwards, a current spreading layer is formed on a portion of the semiconductor device layer. Then, a current blocking layer and a passivation layer are formed on a portion of the semiconductor device layer not covered by the current spreading layer. Finally, a first electrode is formed on the current blocking layer and the current spreading layer. Moreover, a second electrode is formed on the semiconductor device layer.

Abstract: A ubiquitous proxy mobile service method and system is disclosed. When a mobile device is near a dissemination medium, group data and individual data transmitted by at least one ubiquitous proxy transmission interface of the dissemination medium are read by a ubiquitous proxy receiving interface of the mobile device. A screen of the mobile device displays an interaction icon corresponding to the ubiquitous proxy according to the group data and the individual data. Uniform resource locator data in the individual data of the ubiquitous proxy corresponding to the interaction icon is read when the interaction icon is activated. A redirect operation is performed according to the uniform resource locator data to obtain a corresponding network service.

Abstract: A LED chip including a substrate, a semiconductor device layer, a current blocking layer, a current spread layer, a first electrode and a second electrode is provided. The semiconductor device layer is disposed on the substrate. The current blocking layer is disposed on a part of the semiconductor device layer and includes a current blocking segment and a current distribution adjusting segment. The current spread layer is disposed on a part of the semiconductor device layer and covers the current blocking layer. The first electrode is disposed on the current spread layer, wherein a part of the current blocking segment is overlapped with the first electrode. Contours of the current blocking segment and the first electrode are similar figures. Contour of the first electrode and is within contour of the current blocking segment. The current distribution adjusting segment is not overlapped with the first electrode.

Abstract: An LED chip includes a substrate, a semiconductor device layer, a wall structure, and a number of electrodes. The semiconductor device layer is disposed on the substrate and includes a first-type doped semiconductor layer disposed on the substrate, an active layer disposed on a portion of the first-type doped semiconductor layer, and a second-type doped semiconductor layer disposed on the active layer and having a first top surface. The wall structure is disposed on the first-type doped semiconductor layer that is not covered by the active layer and surrounds the active layer. Besides, the wall structure has a second top surface higher than the first top surface of the second-type doped semiconductor layer. Additionally, the electrodes are disposed on and electrically connected with the first-type doped semiconductor layer and the second-type doped semiconductor layer.

Abstract: A semiconductor structure includes a substrate, a first polysilicon (polysilicon) region, a second polysilicon region, an insulating layer and a third polysilicon region. The first and second polysilicon regions are formed on the substrate and spaced apart by a gap. The insulating layer formed on the substrate covers the first and second polysilicon regions. The third polysilicon region is formed on the insulating layer and disposed above the gap. When the semiconductor structure is applied to a display panel, a grain boundary of the third polysilicon region in a displaying region and a channel of an active layer intersect at an angle, and the grain boundary of the third polysilicon region in a circuit driving region is substantially parallel to the channel of the active layer.

Abstract: A LED chip including a substrate, a semiconductor device layer, a current blocking layer, a current spread layer, a first electrode and a second electrode is provided. The semiconductor device layer is disposed on the substrate. The current blocking layer is disposed on a part of the semiconductor device layer and includes a current blocking segment and a current distribution adjusting segment. The current spread layer is disposed on a part of the semiconductor device layer and covers the current blocking layer. The first electrode is disposed on the current spread layer, wherein a part of the current blocking segment is overlapped with the first electrode. Contours of the current blocking segment and the first electrode are similar figures. Contour of the first electrode and is within contour of the current blocking segment. The current distribution adjusting segment is not overlapped with the first electrode.

Abstract: A method of fabricating a photo sensor includes the following steps. First, a substrate is provided, having a conductive layer, a buffer dielectric layer, a patterned semiconductor layer, a dielectric layer, and a planarization layer disposed thereon from bottom to top, wherein the patterned semiconductor layer comprises a first doped region, an intrinsic region, and a second doped region disposed in order. Then, the planarization layer is patterned to form an opening in the planarization layer to expose a portion of the dielectric layer, wherein the opening is positioned on the intrinsic region and portions of the first and the second doped regions. Thereafter, at least a patterned transparent conductive layer is formed in the opening, covering the boundary of the intrinsic region and the first doped region and the boundary of the intrinsic region and the second doped region.

Abstract: A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

Abstract: A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

Abstract: A display device includes a first substrate, a heating layer formed on the first substrate, an insulating layer having a first opening formed on the heating layer, at least one switching device, two contact pads formed on the insulating layer, and respectively electrically connected to the scan line and the data line, a capacitor, a passivation layer covering the switching device and the capacitor, and a pixel electrode formed on the passivation layer and electrically connected to the drain of the switching device. The source of the switching device is connected to the data line. The passivation layer has a plurality of second openings exposing the contact pads.

Abstract: A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

Abstract: A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

Abstract: A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.