Patents by Inventor Chih-Wei Ho

Chih-Wei Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9230927
    Abstract: A method of fabricating a wafer-level chip package is provided. First, a wafer with two adjacent chips is provided, the wafer having an upper surface and a lower surface, and one side of each chip includes a conducting pad on the lower surface. A recess and an isolation layer extend from the upper surface to the lower surface, which the recess exposes the conducting pad. A part of the isolation layer is disposed in the recess with an opening to expose the conducting pad. A conductive layer is formed on the isolation layer and the conductive pad, and a photo-resist layer is spray coated on the conductive layer. The photo-resist layer is exposed and developed to expose the conductive layer, and the conductive layer is etched to form a redistribution layer. After stripping the photo-resist layer, a solder layer is formed on the isolation layer and the redistribution layer.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: January 5, 2016
    Assignee: XINTEC INC.
    Inventors: Chuan-Jin Shiu, Tsang-Yu Liu, Chih-Wei Ho, Shih-Hsing Chan, Ching-Jui Chuang
  • Publication number: 20150311175
    Abstract: A stacked chip package is provided. The stacked chip package includes a first substrate having a first side and a second side opposite thereto. The first substrate includes a recess therein. The recess adjoins a side edge of the first substrate. A plurality of redistribution layers is disposed on the first substrate and extends onto the bottom of the recess. A second substrate is disposed on the first side of the first substrate. A plurality of bonding wires is correspondingly disposed on the redistribution layers in the recess, and extends onto the second substrate. A device substrate is disposed on the second side of the first substrate. A method of forming the stacked chip package is also provided.
    Type: Application
    Filed: April 27, 2015
    Publication date: October 29, 2015
    Inventors: Yen-Shih HO, Chih-Wei HO, Tsang-Yu LIU
  • Patent number: 9153528
    Abstract: Embodiments of the present invention provide a chip package including: a semiconductor substrate having a first surface and a second surface; a device region formed in the semiconductor substrate; a dielectric layer disposed on the first surface; and a conducting pad structure disposed in the dielectric layer and electrically connected to the device region; a cover substrate disposed between the chip and the cover substrate, wherein the spacer layer, a cavity is created an surrounded by the chip and the cover substrate on the device region, and the spacer layer is in direct contact with the chip without any adhesion glue disposed between the chip and the spacer layer.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: October 6, 2015
    Assignee: XINTEC INC.
    Inventors: Po-Shen Lin, Tsang-Yu Liu, Yen-Shih Ho, Chih-Wei Ho, Yu-Min Liang
  • Patent number: 9146411
    Abstract: An exemplary liquid crystal display (LCD) includes a casing and a liquid crystal panel accommodated in the casing. The casing includes a frame and a window surrounded by an inner side of the frame. The liquid crystal panel includes an outside surface essentially serving as a display screen for displaying images and a peripheral wall. The liquid crystal panel is attached to the frame, with the inner side of the frame contacting the peripheral wall of the liquid crystal panel, and the display screen exposed outside of the casing.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: September 29, 2015
    Assignee: INNOLUX CORPORATION
    Inventors: Chih-Hao Chen, Chih-Wei Ho, Chao-Yi Hung, Tsau-Hua Hsieh
  • Patent number: 9104054
    Abstract: An exemplary liquid crystal display (LCD) includes a casing and a liquid crystal panel accommodated in the casing. The casing includes a frame and a window surrounded by an inner side of the frame. The liquid crystal panel includes an outside surface essentially serving as a display screen for displaying images and a peripheral wall. The liquid crystal panel is attached to the frame, with the inner side of the frame contacting the peripheral wall of the liquid crystal panel, and the display screen exposed outside of the casing.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: August 11, 2015
    Assignee: INNOLUX CORPORATION
    Inventors: Chih-Hao Chen, Chih-Wei Ho, Chao-Yi Hung, Tsau-Hua Hsieh
  • Publication number: 20150185536
    Abstract: An exemplary liquid crystal display (LCD) includes a casing and a liquid crystal panel accommodated in the casing. The casing includes a frame and a window surrounded by an inner side of the frame. The liquid crystal panel includes an outside surface essentially serving as a display screen for displaying images and a peripheral wall. The liquid crystal panel is attached to the frame, with the inner side of the frame contacting the peripheral wall of the liquid crystal panel, and the display screen exposed outside of the casing.
    Type: Application
    Filed: April 30, 2014
    Publication date: July 2, 2015
    Applicant: INNOLUX CORPORATION
    Inventors: CHIH-HAO CHEN, CHIH-WEI HO, CHAO-YI HUNG, TSAU-HUA HSIEH
  • Publication number: 20150185535
    Abstract: An exemplary liquid crystal display (LCD) includes a casing and a liquid crystal panel accommodated in the casing. The casing includes a frame and a window surrounded by an inner side of the frame. The liquid crystal panel includes an outside surface essentially serving as a display screen for displaying images and a peripheral wall. The liquid crystal panel is attached to the frame, with the inner side of the frame contacting the peripheral wall of the liquid crystal panel, and the display screen exposed outside of the casing.
    Type: Application
    Filed: March 19, 2014
    Publication date: July 2, 2015
    Applicant: INNOLUX CORPORATION
    Inventors: CHIH-HAO CHEN, CHIH-WEI HO, CHAO-YI HUNG, TSAU-HUA HSIEH
  • Publication number: 20150099357
    Abstract: A method of fabricating a wafer-level chip package is provided. First, a wafer with two adjacent chips is provided, the wafer having an upper surface and a lower surface, and one side of each chip includes a conducting pad on the lower surface. A recess and an isolation layer extend from the upper surface to the lower surface, which the recess exposes the conducting pad. A part of the isolation layer is disposed in the recess with an opening to expose the conducting pad. A conductive layer is formed on the isolation layer and the conductive pad, and a photo-resist layer is spray coated on the conductive layer. The photo-resist layer is exposed and developed to expose the conductive layer, and the conductive layer is etched to form a redistribution layer. After stripping the photo-resist layer, a solder layer is formed on the isolation layer and the redistribution layer.
    Type: Application
    Filed: October 7, 2014
    Publication date: April 9, 2015
    Inventors: Chuan-Jin SHIU, Tsang-Yu LIU, Chih-Wei HO, Shih-Hsing CHAN, Ching-Jui CHUANG
  • Patent number: 8922534
    Abstract: A system for displaying images including a display panel and a fabrication method thereof are provided. The method includes forming a first gate line and a second gate line at each row of pixels of the display panel, wherein the first gate lines and the second gate lines are separated and electrically isolated from each other. A first insulating layer is formed to cover the first gate lines and the second gate lines, and a plurality of via holes are formed in the first insulating layer to expose the first gate lines and the second gate lines. Then, a first conductive pattern is formed on the first insulating layer, such that the first gate line at each row of the pixels is electrically connected to the second gate line at an adjacent row of the pixels, by the first conductive pattern, through the via holes.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: December 30, 2014
    Assignee: Innolux Corporation
    Inventors: Ming-Chang Lin, Chih-Wei Ho, Ching-Hung Teng, Te-Hung Peng, Chao-Yi Hung
  • Publication number: 20140111737
    Abstract: An exemplary liquid crystal display (LCD) includes a casing and a liquid crystal panel accommodated in the casing. The casing includes a frame and a window surrounded by an inner side of the frame. The liquid crystal panel includes an outside surface essentially serving as a display screen for displaying images and a peripheral wall. The liquid crystal panel is attached to the frame, with the inner side of the frame contacting the peripheral wall of the liquid crystal panel, and the display screen exposed outside of the casing.
    Type: Application
    Filed: December 27, 2013
    Publication date: April 24, 2014
    Applicant: INNOLUX CORPORATION
    Inventors: CHIH-HAO CHEN, CHIH-WEI HO, CHAO-YI HUNG, TSAU-HUA HSIEH
  • Patent number: 8634037
    Abstract: An exemplary liquid crystal display (LCD) includes a casing and a liquid crystal panel accommodated in the casing. The casing includes a frame and a window surrounded by an inner side of the frame. The liquid crystal panel includes an outside surface essentially serving as a display screen for displaying images and a peripheral wall. The liquid crystal panel is attached to the frame, with the inner side of the frame contacting the peripheral wall of the liquid crystal panel, and the display screen exposed outside of the casing.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: January 21, 2014
    Assignee: Chimei InnoLux Corporation
    Inventors: Chih-Hao Chen, Chih-Wei Ho, Chao-Yi Hung, Tsau-Hua Hsieh
  • Publication number: 20130341747
    Abstract: An embodiment of the invention provides a chip package which includes: a chip including: a semiconductor substrate having a first surface; a device region formed in the semiconductor substrate; and a plurality of micro-lenses on the first surface and the device region; a cover substrate disposed on the chip, wherein the cover substrate is a transparent substrate; a spacer layer disposed between the chip and the cover substrate, wherein the spacer layer, the chip, and the cover substrate collectively surround a cavity in the device region; and at least one main lens on the cover substrate and in the cavity, wherein a width of the main lens is greater than that of each of the micro-lenses.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 26, 2013
    Inventors: Po-Shen LIN, Tsang-Yu LIU, Yen-Shih HO, Chih-Wei HO, Shih-Chin CHEN
  • Publication number: 20130307137
    Abstract: Embodiments of the present invention provide a chip package including: a semiconductor substrate having a first surface and a second surface; a device region formed in the semiconductor substrate; a dielectric layer disposed on the first surface; and a conducting pad structure disposed in the dielectric layer and electrically connected to the device region; a cover substrate disposed between the chip and the cover substrate, wherein the spacer layer, a cavity is created an surrounded by the chip and the cover substrate on the device region, and the spacer layer is in direct contact with the chip without any adhesion glue disposed between the chip and the spacer layer.
    Type: Application
    Filed: May 20, 2013
    Publication date: November 21, 2013
    Applicant: XINTEC INC.
    Inventors: Po-Shen LIN, Tsang-Yu LIU, Yen-Shih HO, Chih-Wei HO, Yu-Min LIANG
  • Publication number: 20130016077
    Abstract: A system for displaying images including a display panel and a fabrication method thereof are provided. The method includes forming a first gate line and a second gate line at each row of pixels of the display panel, wherein the first gate lines and the second gate lines are separated and electrically isolated from each other. A first insulating layer is formed to cover the first gate lines and the second gate lines, and a plurality of via holes are formed in the first insulating layer to expose the first gate lines and the second gate lines. Then, a first conductive pattern is formed on the first insulating layer, such that the first gate line at each row of the pixels is electrically connected to the second gate line at an adjacent row of the pixels, by the first conductive pattern, through the via holes.
    Type: Application
    Filed: July 6, 2012
    Publication date: January 17, 2013
    Applicants: CHIMEI INNOLUX CORPORATION, INNOCOM TECHNOLOGY(SHENZHEN) CO., LTD.
    Inventors: Ming-Chang LIN, Chih-Wei HO, Ching-Hung TENG, Te-Hung PENG, Chao-Yi HUNG
  • Publication number: 20120303976
    Abstract: A data storage apparatus includes a storage unit; a read/write console connected electrically to an external power supply source; a storage function unit; a power switch connected electrically to the power supply source, the storage unit and the storage function unit in such a manner that in a normal condition, the storage unit is charged electrically by the power supply source via the power switch, and that in an abnormal condition, the storage unit is supplied with electrical power from the power switch via the storage function unit so as to permit continuation of the read/write operation within the storage unit. A current detection unit detects current of the storage function unit in the abnormal condition and upon detecting current of the storage function unit reaching below a predetermined threshold value, the current detection unit generates and transmits a reset signal to the read/write console such that the read/write console orders a reset of the read/write operation.
    Type: Application
    Filed: June 23, 2011
    Publication date: November 29, 2012
    Applicant: ATP ELECTRONICS TAIWAN INC.
    Inventor: CHIH-WEI HO
  • Publication number: 20110109831
    Abstract: An exemplary liquid crystal display (LCD) includes a casing and a liquid crystal panel accommodated in the casing. The casing includes a frame and a window surrounded by an inner side of the frame. The liquid crystal panel includes an outside surface essentially serving as a display screen for displaying images and a peripheral wall. The liquid crystal panel is attached to the frame, with the inner side of the frame contacting the peripheral wall of the liquid crystal panel, and the display screen exposed outside of the casing.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 12, 2011
    Applicant: CHIMEI INNOLUX CORPORATION
    Inventors: CHIH-HAO CHEN, CHIH-WEI HO, CHAO-YI HUNG, TSAU-HUA HSIEH
  • Patent number: 7157269
    Abstract: The invention discloses an on-spot hydrophilic enhanced slide/microarray. The preparation method relates to a hydrophobic copolymer prepared by blending, grafting or co-polymerization of a hydrophobic material and a compound bearing functional groups such as anhydride, imide, cyclic amide, and cyclic ester, and application of the hydrophobic copolymer onto an organic or inorganic substrate. The resulting slide has the properties of on-spot hydrophilic/hydrophobic dynamic conversion, as well as on-spot hydrophilic enhancement for the preparation of high-density and high-efficiency bio-chip/microarray.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: January 2, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Bor-Iaun Jan, Jia-Huey Tsao, Chih-Wei Ho, Yu-Ching Liu, Chao-Chi Pan, Zu-Sho Chow, Yao-Sung Chang, Cheng-Tao Wu, Wen-Hsun Kuo
  • Patent number: 7150856
    Abstract: An on-spot selectively activated hydrophobic slide/microarray. The preparation method relates to a hydrophobic copolymer prepared by blending, grafting or co-polymerization of a hydrophobic material and a compound bearing a functional group protected by a protecting group, wherein the functional group is imide or cyclic amide, and the protecting group is a photo acid group such as a tosyloxy group. The hydrophobic copolymer coated on a substrate is then subjected to selective photolithographical activation so that the slide will have functional active copolymer spots separated by inactive copolymers. The resulting slide is suitable for the preparation of high-density and high-efficiency bio-chip/microarray.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: December 19, 2006
    Assignee: Industrial Technology Research Institute
    Inventors: Bor-Iuan Jan, Jia-Huey Tsao, Chih-Wei Ho, Chao-Chi Pan
  • Patent number: 7118908
    Abstract: An on-spot selectively activated hydrophobic slide/microarray. The preparation method relates to a hydrophobic copolymer prepared by blending, grafting or co-polymerization of a hydrophobic material and a compound bearing a functional group protected by a protecting group, wherein the functional group is imide or cyclic amide, and the protecting group is a photo acid group such as a tosyloxy group. The hydrophobic copolymer coated on a substrate is then subjected to selective photolithographical activation so that the slide will have functional active copolymer spots separated by inactive copolymers. The resulting slide is suitable for the preparation of high-density and high-efficiency bio-chip/microarray.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: October 10, 2006
    Inventors: Bor-Iuan Jan, Jia-Huey Tsao, Chih-Wei Ho, Chao-Chi Pan
  • Patent number: 7105340
    Abstract: An on-spot selectively activated hydrophobic slide/microarray. The preparation method relates to a hydrophobic copolymer prepared by blending, grafting or co-polymerization of a hydrophobic material and a compound bearing a functional group protected by a protecting group, wherein the functional group is imide or cyclic amide, and the protecting group is a photo acid group such as a tosyloxy group. The hydrophobic copolymer coated on a substrate is then subjected to selective photolithographical activation so that the slide will have functional active copolymer spots separated by inactive copolymers. The resulting slide is suitable for the preparation of high-density and high-efficiency bio-chip/microarray.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: September 12, 2006
    Inventors: Bor-Iuan Jan, Jia-Huey Tsao, Chih-Wei Ho, Chao-Chi Pan