Abstract: A semiconductor structure includes a first pair of source/drain features (S/D), a first stack of channel layers connected to the first pair of S/D, a second pair of S/D, and a second stack of channel layers connected to the second pair of S/D. The first pair of S/D each include a first epitaxial layer having a first dopant, a second epitaxial layer having a second dopant and disposed over the first epitaxial layer and connected to the first stack of channel layers, and a third epitaxial layer having a third dopant and disposed over the second epitaxial layer. The second pair of S/D each include a fourth epitaxial layer having a fourth dopant and connected to the second stack of channel layers, and a fifth epitaxial layer having a fifth dopant and disposed over the fourth epitaxial layer. The first dopant through the fourth dopant are of different species.

Abstract: A laptop computer including a circuit board, a connector, and a fan is provided. The circuit board has a plurality of first electrically conducting members. The connector has a body and a plurality of clamping terminals and pogo pin terminals extended from the body. The clamping terminals and the pogo pin terminals are electrically connected to each other and located at two opposite sides of the body. The clamping terminals clamp the circuit board and are electrically connected to the first electrically conductive members. The fan has a plurality of second electrically conducting members, and the pogo pin terminals are respectively abutted against abutting surfaces of the second electrically conducting members, such that the circuit board is electrically connected to the fan via the connector, wherein each of the abutting surfaces is tilted relative to a plane where the pogo pin terminals are arranged.

Abstract: In a semiconductor package having a redistribution structure, two or more semiconductor dies are connected to a first side of the redistribution structure and an encapsulant surrounds the two or more semiconductor dies. An integrated passive device (IPD) is connected on a second side of the redistribution structure. The second side is opposite to the first side and the IPD is electrically coupled to the redistribution structure. An interconnect device is connected on the second side of the redistribution structure and is electrically coupled to the redistribution structure. Two or more external connections are on the second side of the redistribution structure and are electrically coupled to the redistribution structure.

Abstract: A package structure is provided. The package structure comprises a package substrate, an electronic device, a thermal interface material (TIM), a lid and an insulating encapsulant. The electronic device is disposed on and electrically connected to the package substrate. The TIM is disposed on the electronic device. The lid is disposed on the TIM. The insulating encapsulant is disposed on the package substrate and laterally encapsulates the electronic device and the TIM. A lateral dimension of the TIM is greater than a lateral dimension of the electronic device.

Abstract: A process gas is flowed from an input metal gas line that is electrically grounded to an output metal gas line via a connecting tube which is electrically insulating. Couplings between the metal gas lines and the connecting tube are sealed with gas couplings. Each gas coupling includes a sealing gasket, and a clamp compressing the sealing gasket between an end of the respective metal gas line and a corresponding end of the connecting tube. The process gas is delivered to a semiconductor processing tool via the output metal gas line. At least one operation is performed at the semiconductor processing tool that utilizes both the process gas delivered to the process tool via the output metal gas line and an electrical voltage of at least 2 kilovolts. The connecting tube may be sapphire. The sealing gaskets may be polytetrafluoroethylene (PTFE) sealing gaskets.

Abstract: A laptop computer including a casing, an inner frame, and a plurality of electronic modules is provided. The inner frame is detachably assembled to the casing and forms a plurality of receiving zones separated from each other. The electronic modules are respectively disposed in the receiving zones and connected to each other via a plurality of flexible electrical conducting members, and the electrical conducting members pass through a recess structure of the inner frame.

Abstract: A vertical probe includes opposite first and third sides, and opposite second and fourth sides. The third and fourth sides extend in a planar manner from a body to a tip portion. The first and second sides include first and second upper plane segments at the body, first and second transition segments at the tip portion, and first and second lower plane segments closer to the third and fourth sides than the first and second upper plane segments are, respectively. The first and second transition segments gradually approach the third and fourth sides as they extend from the first and second upper plane segments to the first and second lower plane segments. The first transition and lower plane segments are realized by laser processing. The vertical probe can contact small conductive contacts with good current resistance, structural strength, lifespan, and processing accuracy. When applied to a probe head, breaking or shifting position of the tip portion due to vertical movement can be avoided.

Abstract: A laptop computer including a first body, a circuit board disposed in the first body, a second body, a display module disposed in the second body, a hinge connected to the first and the second bodies, and a mezzanine connector is provided. The first and the second bodies are pivoted to each other to be folded or unfolded via the hinge. The mezzanine connector is clamped between the hinge and the circuit board, and is electrically connected between the display module and the circuit board.

Abstract: A laptop computer including a first casing, a first sub-circuit board, an input module, a second casing, a motherboard, and a bridge circuit board is provided. The first sub-circuit board is disposed at the first casing. The input module is disposed at the first casing and electrically connected to the first sub-circuit board. The motherboard is disposed at the second casing. The first casing and the second casing are assembled together, such that the first sub-circuit board, the bridge circuit board, and the motherboard are partially overlapped, and the first sub-circuit board is electrically connected to the motherboard via the bridge circuit board.

Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A cleaning apparatus for cleaning a surface of a photomask includes a housing defining a chamber, a photomask holder disposed within the chamber, and a gas dispenser disposed within the chamber to direct gas toward the photomask holder. The gas dispenser has two or more gas dispensing outlets. A driver is coupled to at least one of the photomask holder or the gas dispenser to establish relative movement between the photomask holder and the gas dispenser.

Abstract: A device is disclosed. The device includes a plurality of pixels disposed over a first surface of a semiconductor layer. The device includes a device layer disposed over the first surface. The device includes metallization layers disposed over the device layer. One of the metallization layers, closer to the first surface than any of other ones of the metallization layers, includes at least one conductive structure. The device includes an oxide layer disposed over a second surface of the semiconductor layer, the second surface being opposite to the first surface, the oxide layer also lining a recess that extends through the semiconductor layer. The device includes a spacer layer disposed between inner sidewalls of the recess and the oxide layer. The device includes a pad structure extending through the oxide layer and the device layer to be in physical contact with the at least one conductive structure.

Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.

Abstract: A semiconductor structure according to the present disclosure includes a buried oxide layer, a first dielectric layer disposed over the buried oxide layer, a first waveguide feature disposed in the first dielectric layer, a second dielectric layer disposed over the first dielectric layer and the first waveguide feature, a third dielectric layer disposed over the second dielectric layer, and a second waveguide feature disposed in the second dielectric layer and the third dielectric layer. The second waveguide feature is disposed over the first waveguide feature and a portion of the second waveguide feature vertically overlaps a portion of the first waveguide feature.

Abstract: A generation method and generation apparatus of a medical report are provided. In the method, the writing style is analyzed from multiple historical texts, where the writing style includes multiple common words in the historical text and the contextual relationships that connect those common words; the medical data is converted into draft text that conforms to the template text, where the template text is a report that conforms to a preset style; and by using the draft text and writing style as input data of the language model, an output report that conforms to the writing style is generated, where the language model selects sentences that conform to the writing style.

Abstract: In an embodiment, a method includes: depositing a gate dielectric layer on a first fin and a second fin, the first fin and the second fin extending away from a substrate in a first direction, a distance between the first fin and the second fin decreasing along the first direction; depositing a sacrificial layer on the gate dielectric layer by exposing the gate dielectric layer to a self-limiting source precursor and a self-reacting source precursor, the self-limiting source precursor reacting to form an initial layer of a material of the sacrificial layer, the self-reacting source precursor reacting to form a main layer of the material of the sacrificial layer; annealing the gate dielectric layer while the sacrificial layer covers the gate dielectric layer; after annealing the gate dielectric layer, removing the sacrificial layer; and after removing the sacrificial layer, forming a gate electrode layer on the gate dielectric layer.

Abstract: A mouse device includes a multi-touch region on a button. The mouse device includes a touchpad, a press switch, a button cover and a control board. The touchpad triggers a corresponding touch signal when any one of a plurality of touch regions respectively corresponding to a plurality of input events is pressed. A switch signal is triggered when the press switch is pressed. The button cover is used to accept a pressing operation of pressing toward an inner side to press the touchpad, and to press the press switch through the touchpad. When receiving the touch signal and the switch signal, the control board triggers the input event of the pressed touch region.

Abstract: A pulse pressure measuring apparatus including a plurality of pressing elements, a plurality of pressure sensors, and a processing unit is provided. The pressing elements are used to press the site to be measured, and each pressing element has a position coordinate Pi (i=1, 2, 3 . . . ). The pressure sensors are configured to respectively measure pressure on the pressing elements to generate measured values of pressure intensity Ii (i=1, 2, 3 . . . ) at the position coordinates Pi (i=1, 2, 3 . . . ). The processing unit utilizes the position coordinates Pi (i=1, 2, 3 . . . ) and the measured values of pressure intensity Ii (i=1, 2, 3 . . . ) to determine the blood vessel locus.

Abstract: An optical sensor device for determining a hydration level information of an object includes a light-emitting element, a light-receiving element, and an analyzer. The light-emitting element is configured to emit a first light at a first wavelength and a second light at a second wavelength. The light-receiving element is configured to receive a first reflected light at the first wavelength and a second reflected light at the second wavelength from the object. The analyzer is configured to perform a hydration measurement to determine the hydration level information. The hydration level information is based on: a first reference signal strength at the first wavelength and a second reference signal strength at the second wavelength obtained from the light-receiving element when the object is not present; and a first signal strength of the first reflected light and a second signal strength of the second reflected light when the object is present.