Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A mouse device includes a multi-touch region on a button. The mouse device includes a touchpad, a press switch, a button cover and a control board. The touchpad triggers a corresponding touch signal when any one of a plurality of touch regions respectively corresponding to a plurality of input events is pressed. A switch signal is triggered when the press switch is pressed. The button cover is used to accept a pressing operation of pressing toward an inner side to press the touchpad, and to press the press switch through the touchpad. When receiving the touch signal and the switch signal, the control board triggers the input event of the pressed touch region.

Abstract: A pulse pressure measuring apparatus including a plurality of pressing elements, a plurality of pressure sensors, and a processing unit is provided. The pressing elements are used to press the site to be measured, and each pressing element has a position coordinate Pi (i=1, 2, 3 . . . ). The pressure sensors are configured to respectively measure pressure on the pressing elements to generate measured values of pressure intensity Ii (i=1, 2, 3 . . . ) at the position coordinates Pi (i=1, 2, 3 . . . ). The processing unit utilizes the position coordinates Pi (i=1, 2, 3 . . . ) and the measured values of pressure intensity Ii (i=1, 2, 3 . . . ) to determine the blood vessel locus.

Abstract: An optical sensor device for determining a hydration level information of an object includes a light-emitting element, a light-receiving element, and an analyzer. The light-emitting element is configured to emit a first light at a first wavelength and a second light at a second wavelength. The light-receiving element is configured to receive a first reflected light at the first wavelength and a second reflected light at the second wavelength from the object. The analyzer is configured to perform a hydration measurement to determine the hydration level information. The hydration level information is based on: a first reference signal strength at the first wavelength and a second reference signal strength at the second wavelength obtained from the light-receiving element when the object is not present; and a first signal strength of the first reflected light and a second signal strength of the second reflected light when the object is present.

Abstract: A method of handling a workpiece includes the following steps. A workpiece is placed on a chuck body, wherein the workpiece includes a tape carrier extending beyond a periphery of the chuck body and a workpiece body disposed on the tape carrier, and the chuck body includes a seal ring surrounding the periphery of the chuck body; the tape carrier is clamped outside the chuck body, wherein the tape carrier leans against the seal ring and an enclosed space is formed between the chuck body, the tape carrier and the seal ring; and a vacuum seal is formed by evacuating gas from the enclosed space to pull the periphery of the workpiece toward the chuck body.

Abstract: An electrostatic discharge protection device includes a P-type substrate, an N-type well, a first P-type heavily-doped area, an N-type doped area, and a first N-type heavily-doped area. The N-type well is formed in the P-type substrate. The first P-type heavily-doped area is formed in the N-type well. The N-type doped area and the first N-type heavily-doped area are formed in the P-type substrate. The N-type doped area is coupled to the N-type well through an external conductive wire decoupled to the first P-type heavily-doped area. Alternatively, the P-type substrate and the N-type well are respectively replaced with an N-type substrate and a P-type well.

Abstract: Embodiments provide a mouse device that includes with a plurality of touch areas on one or more mouse buttons. The mouse device includes a touch panel, a press switch, a button cover and a control panel. The touch panel triggers a corresponding touch signal when any one of the plurality of touch areas respectively corresponding to a plurality of input events is pressed. A switch signal is triggered when the press switch is pressed. The button cover is used to receive a pressing operation of pressing, toward inside, the touch panel, and press the press switch via the touch panel. When receiving the touch signal and the switch signal, the control panel triggers the input event of the pressed touch area.

Abstract: A method includes receiving a carrier, the carrier including a carrier body, a first filter, and a housing securing the first filter to the carrier body. The method further includes uninstalling the housing from the carrier, replacing the first filter with a second filter, reinstalling the housing on the carrier body, and inspecting the second filter. Inspecting the second filter includes using an automatic inspection mechanism to detect surface flatness of the second filter.

Abstract: A frequency locked loop circuit, comprising an operational circuit, a first impedance circuit, a second impedance circuit, a switching circuit and a frequency generation circuit. The operational circuit is configured to output an operational signal according to a voltage difference between a positive terminal and a negative terminal. The switching circuit is configured to periodically conduct the negative terminal to one of the first impedance node and the second impedance node, and periodically conduct the positive terminal to the other one of the first impedance node and the second impedance node. The frequency generation circuit is configured to periodically sample the operational signal to generate a sample signal to generate a clock signal. An operational frequency of the operational signal is an integer multiple of a sampling frequency of the frequency generation circuit.

Abstract: A device is disclosed. The device includes a plurality of pixels disposed over a first surface of a semiconductor layer. The device includes a device layer disposed over the first surface. The device includes metallization layers disposed over the device layer. One of the metallization layers, closer to the first surface than any of other ones of the metallization layers, includes at least one conductive structure. The device includes an oxide layer disposed over a second surface of the semiconductor layer, the second surface being opposite to the first surface, the oxide layer also lining a recess that extends through the semiconductor layer. The device includes a spacer layer disposed between inner sidewalls of the recess and the oxide layer. The device includes a pad structure extending through the oxide layer and the device layer to be in physical contact with the at least one conductive structure.

Abstract: In a semiconductor structure, a first conductive feature is formed in a trench by PVD and a glue layer is then deposited on the first conductive feature in the trench before CVD deposition of a second conductive feature there-over. The first conductive feature acts as a protection layer to keep silicide from being damaged by later deposition of metal or a precursor by CVD. The glue layer extends along the extent of the sidewall to enhance the adhesion of the second conductive features to the surrounding dielectric layer.

Abstract: A nano-FET and a method of forming is provided. In some embodiments, a nano-FET includes an epitaxial source/drain region contacting ends of a first nanostructure and a second nanostructure. The epitaxial source/drain region may include a first semiconductor material layer of a first semiconductor material, such that the first semiconductor material layer includes a first segment contacting the first nanostructure and a second segment contacting the second nanostructure, wherein the first segment is separated from the second segment. A second semiconductor material layer is formed over the first segment and the second segment. The second semiconductor material layer may include a second semiconductor material having a higher concentration of dopants of a first conductivity type than the first semiconductor material layer. The second semiconductor material layer may have a lower concentration percentage of silicon than the first semiconductor material layer.

Abstract: A method includes loading a wafer over a wafer chuck in a process chamber; performing a deposition process on the loaded wafer; supplying a fluid medium to a fluid guiding structure in the wafer chuck from a fluid inlet port on the wafer chuck, the fluid guiding structure comprising a plurality of arc-shaped channels fluidly communicated with each other; guiding the fluid medium from a first one of the arc-shaped channels of the fluid guiding structure to a second one of the arc-shaped channels of the fluid guiding structure. The second one of the arc-shaped channels of the fluid guiding structure is concentric with the first one of the arc-shaped channels of the fluid guiding structure from a top view.

Abstract: Disclosed is an optical module, including a lower housing, an upper housing covering the lower housing, a circuit board, a first metal base, a second metal base, a silicon photonic chip, and a light emission module including a laser chip and an optical path assembly. The first metal base is disposed on one side of the upper housing. The second metal base is disposed on one side of the lower housing. The circuit board with a hollow region is disposed on the second metal base. The silicon photonic chip is disposed on the second metal base exposed from the hollow region. The laser chip is disposed on the first metal base. The optical path assembly is disposed on the first metal base and/or on the second metal base exposed from the hollow region, and guides a third optical signal emitted by the laser chip to the silicon photonic chip.

Abstract: A method includes providing a substrate having a first region and a second region, forming a fin protruding from the first region, where the fin includes a first SiGe layer and a stack alternating Si layers and second SiGe layers disposed over the first SiGe layer and the first SiGe layer has a first concentration of Ge and each of the second SiGe layers has a second concentration of Ge that is greater than the first concentration, recessing the fin to form an S/D recess, recessing the first SiGe layer and the second SiGe layers exposed in the S/D recess, where the second SiGe layers are recessed more than the first SiGe layer, forming an S/D feature in the S/D recess, removing the recessed first SiGe layer and the second SiGe layers to form openings, and forming a metal gate structure over the fin and in the openings.

Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.

Abstract: A digital compute-in-memory (DCIM) macro includes a memory cell array and an arithmetic logic unit (ALU). The memory cell array stores weight data of a neural network. The ALU receives parallel bits of a same input channel in an activation input, and generates a convolution computation output of the parallel bits and target weight data in the memory cell array.

Abstract: The present invention provides a method for preparing an activated carbon, which includes impregnating a carbonaceous material with carbonated water; and exposing the carbonaceous material to microwave radiation to produce the activated carbon.

Abstract: A digital compute-in-memory (DCIM) system includes a first DCIM macro. The first DCIM macro includes a first memory cell array and a first arithmetic logic unit (ALU). The first memory cell array has N rows that are configured to store weight data of a neural network in a single weight data download session, wherein N is a positive integer not smaller than two. The first ALU is configured to receive a first activation input, and perform convolution operations upon the first activation input and a single row of weight data selected from the N rows of the first memory cell array to generate first convolution outputs.

Abstract: A solar cell module includes a first substrate, a second substrate, at least one cell unit, a first packaging film, a second packaging film, a first protective layer, a second protective layer, and a plurality of support members. The first substrate and the second substrate are disposed opposite to each other. The cell unit is disposed between the first substrate and the second substrate. The first packaging film is disposed between the cell unit and the first substrate. The second packaging film is disposed between the cell unit and the second substrate. The first protective layer is disposed between the cell unit and the first packaging film. The second protective layer is disposed between the cell unit and the second packaging film. The support members are respectively disposed between the first packaging film and the second packaging film and surround at least two opposite sides of the cell unit.