Patents by Inventor Chih-Wei Wu

Chih-Wei Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12261188
    Abstract: A device is disclosed. The device includes a plurality of pixels disposed over a first surface of a semiconductor layer. The device includes a device layer disposed over the first surface. The device includes metallization layers disposed over the device layer. One of the metallization layers, closer to the first surface than any of other ones of the metallization layers, includes at least one conductive structure. The device includes an oxide layer disposed over a second surface of the semiconductor layer, the second surface being opposite to the first surface, the oxide layer also lining a recess that extends through the semiconductor layer. The device includes a spacer layer disposed between inner sidewalls of the recess and the oxide layer. The device includes a pad structure extending through the oxide layer and the device layer to be in physical contact with the at least one conductive structure.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: March 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Ying Liao, Yu-Chu Lin, Chih Wei Sung, Shih Sian Wang, Chi-Chung Jen, Yu-chien Ku, Yen-Jou Wu, Huai-jen Tung, Po-Zen Chen
  • Publication number: 20250098373
    Abstract: A micro light-emitting element is provided. The micro light-emitting element includes a first-type semiconductor having a bottom surface and a light-emitting layer disposed on the first-type semiconductor. The micro light-emitting element also includes a second-type semiconductor disposed on the light-emitting layer and an intrinsic semiconductor disposed on the second-type semiconductor and made of the same material as the second-type semiconductor. The intrinsic semiconductor has a top surface relative to the bottom surface. The sidewalls of the first-type semiconductor, the light-emitting layer, the second-type semiconductor, and the intrinsic semiconductor form a continuous side surface, and the side surface connects the bottom surface to the top surface.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 20, 2025
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Yu-Yun Lo, Bo-Wei Wu, Yen-Yeh Chen, Chih-Ling Wu
  • Publication number: 20250096476
    Abstract: An antenna module includes a ground radiator, a first antenna, and a second antenna. The first antenna includes a first feeding end, a first segment, a second segment, a third segment, and a fourth segment. A first area of the first antenna and a second area including a part of the first antenna and a part of the ground radiator resonate at a first frequency band. A third area of the first antenna and the second area resonate at a second frequency band. An area including a part of the second antenna, the third segment, the first segment, and the second segment resonates at the first frequency band. An area of the second antenna and an area including the part of the second antenna, a part of the third segment, and another part of the ground radiator resonate at the second frequency band.
    Type: Application
    Filed: May 2, 2024
    Publication date: March 20, 2025
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Shao-Chi Wang, Hau Yuen Tan, Hung-Te Liao, Chao-Hsu Wu, Chih-Hung Cho, Tse-Hsuan Wang, I-Shu Lee, Jr-Wei Hsu
  • Patent number: 12255104
    Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
    Type: Grant
    Filed: August 2, 2023
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Chung-Chiang Wu, Hung-Chin Chung, Hsien-Ming Lee, Da-Yuan Lee, Jian-Hao Chen, Chien-Hao Chen, Kuo-Feng Yu, Chia-Wei Chen, Chih-Yu Hsu
  • Publication number: 20250087888
    Abstract: An antenna assembly includes a patch antenna, a metal layer, and a feed-in signal layer. The metal layer is disposed on a side of the patch antenna and includes a first slot and a second slot. The feed-in signal layer is disposed on a side of the metal layer opposite the second antenna and includes a transmitting port, a receiving port, a hybrid coupler, and two microstrips. The transmitting port and the receiving port are connected to the hybrid coupler, and the two microstrips are extended in the direction away from the hybrid coupler. Projections of two ends of the two microstrips onto the metal layer are overlapped with the first slot and the second slot. An antenna array is also mentioned.
    Type: Application
    Filed: May 30, 2024
    Publication date: March 13, 2025
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Tse-Hsuan Wang, Chih-Fu Chang, Hsin-Feng Hsieh, Wu-Hua Chen, Chih-Wei Liao, Chao-Hsu Wu
  • Publication number: 20250089140
    Abstract: An LED driving apparatus, a microcontroller, and a control method for an LED module are provided. The LED driving apparatus includes a power supply module, a switch module, and a control module. The power supply module is configured to supply power to the LED module, in which the power supply module determines whether to trigger an overcurrent protection based on whether an output current exceeds a threshold current. The control module is configured to receive an overcurrent detection signal to control a conduction state of the switch module, so as to affect the current amount of the LED module. When the overcurrent detection signal indicates the output current exceeds the threshold current, the control module outputs a first control signal based on the overcurrent detection signal to control the switch module, to prevent the overcurrent protection from being triggered.
    Type: Application
    Filed: January 8, 2024
    Publication date: March 13, 2025
    Inventors: Chun-Yi WU, Lian-Cheng TSAI, Chih-Wei TSAI
  • Publication number: 20250089334
    Abstract: A semiconductor includes a substrate. A gate structure is disposed on the substrate. A liner oxide contacts a side of the gate structure. A silicon oxide spacer contacts the liner oxide. An end of the silicon oxide spacer forms a kink profile. A silicon nitride spacer contacts the silicon oxide spacer and a tail of the silicon nitride spacer covers part of the kink profile. A stressor covers the silicon nitride spacer and the substrate.
    Type: Application
    Filed: October 13, 2023
    Publication date: March 13, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, Chen-Ming Wang, Po-Ching Su, Pei-Hsun Kao, Ti-Bin Chen, Chun-Wei Yu, Chih-Chiang Wu
  • Patent number: 12249649
    Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: March 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Han Wu, Hsin-Yu Chen, Chun-Hao Lin, Shou-Wei Hsieh, Chih-Ming Su, Yi-Ren Chen, Yuan-Ting Chuang
  • Patent number: 12245834
    Abstract: A medical device is provided. The medical device includes a shaft motor, a parallel manipulator, a receiving yoke, a runner and a transmission yoke. The shaft motor is configured to generate a mechanical force for manipulating a surgical tool. The parallel manipulator includes an end platform used to support the surgical tool, a base platform used to support the shaft motor and a plurality of limbs coupled between the end platform and the base platform. The limbs are configured to control movement of the end platform. The receiving yoke is coupled to the surgical tool. The runner is slidingly engaged to the shaft motor and configured to receive the mechanical force. The transmission yoke is coupled to the runner and the receiving yoke, and the transmission yoke is configured to transfer the mechanical force to the receiving yoke.
    Type: Grant
    Filed: August 16, 2023
    Date of Patent: March 11, 2025
    Assignee: POINT ROBOTICS (SINGAPORE) PTE. LTD.
    Inventors: Kun-Pin Huang, Chih-Hsiang Hsieh, Chao-Wei Wu, Ming-Chun Ho
  • Patent number: 12250002
    Abstract: A SAR ADC includes: a sample-hold (S/H) circuit sampling an input voltage to generate a S/H output signal; a DAC generating a DAC output signal; a comparator comparing the DAC output signal with the S/H output signal to generate a comparison output signal; a SAR combinational digital circuit group; a multiplexer circuit; and a plurality of registers for registering the comparison output signal as register output signals and outputting as an output signal of the SAR ADC. The SAR combinational digital circuit group generates a plurality of first and second SAR output signals based on the register output signals. The multiplexer circuit is controlled by on the register output signals to select among the first and the second SAR output signals as a plurality of multiplexer output signals for sending to the DAC. A capacitor coupling relationship of the DAC is controlled by the multiplexer output signals.
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: March 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Hua Chen, Yu-Yee Liow, Chih-Wei Wu, Wen-Hong Hsu, Hsuan-Chih Yeh, Pei-Wen Sun
  • Publication number: 20250081632
    Abstract: A solar cell module includes a first substrate, a second substrate, at least one cell unit, a first packaging film, a second packaging film, a first protective layer, a second protective layer, and a plurality of support members. The first substrate and the second substrate are disposed opposite to each other. The cell unit is disposed between the first substrate and the second substrate. The first packaging film is disposed between the cell unit and the first substrate. The second packaging film is disposed between the cell unit and the second substrate. The first protective layer is disposed between the cell unit and the first packaging film. The second protective layer is disposed between the cell unit and the second packaging film. The support members are respectively disposed between the first packaging film and the second packaging film and surround at least two opposite sides of the cell unit.
    Type: Application
    Filed: August 29, 2024
    Publication date: March 6, 2025
    Applicant: Industrial Technology Research Institute
    Inventors: Hsin-Chung Wu, Chun-Wei Su, Tzu-Ting Lin, En-Yu Pan, Yu-Tsung Chiu, Chih-Lung Lin, Teng-Yu Wang, Chiou-Chu Lai, Ying-Jung Chiang
  • Patent number: 12241740
    Abstract: Systems, apparatuses, and methods for improved reconfigurable optical sensing are provided. For instance, an example optical sensing apparatus can include a photodetector array including a plurality of photodetectors. The optical sensing apparatus can include circuitry or one or more processing devices configured to receive one or more electrical signals representing an optical signal received by a first subset of the plurality of photodetectors; determine, based on the one or more electrical signals, a region of interest in the photodetector array for optical measurements; and deactivate, based on the region of interest, a second subset of the plurality of photodetectors of the photodetector array.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: March 4, 2025
    Assignee: ARTILUX, INC.
    Inventors: Chih-Wei Yeh, Yun-Chung Na, Tsung-Ting Wu, Shu-Lu Chen
  • Publication number: 20250070064
    Abstract: An embodiment is a device including a first die and a substrate including a first surface and a second surface opposite the first surface. The device also includes an active device on the first surface of the substrate. The device also includes a first interconnect structure on the first surface of the substrate. The device also includes a through substrate via extending through the first interconnect structure and the substrate to the second surface of the substrate, the through substrate via being electrically coupled to metallization patterns in the first interconnect structure. The device also includes one or more material-filled trench structures extending from the second surface of the substrate into the substrate, the one or more material-filled trench structures being electrically isolated from the through substrate via.
    Type: Application
    Filed: January 3, 2024
    Publication date: February 27, 2025
    Inventors: Ke-Gang Wen, Yu-Bey Wu, Liang-Wei Wang, Hsin-Feng Chen, Tsung-Chieh Hsiao, Chih Chuan Su, Dian-Hau Chen
  • Publication number: 20250064478
    Abstract: A computer-assisted needle insertion method is provided. The computer-assisted needle insertion method includes the following steps. A first machine learning model and a second machine learning model are obtained. A computed tomography image and a needle insertion path are obtained, a suggested needle insertion path is generated according to the first machine learning model, the computed tomography image, and the needle insertion path, and the needle is instructed to approach a needle insertion point on a skin of a target. The needle insertion point is located on the suggested needle insertion path. A breath signal of the target is obtained, and whether a future breath state of the target is normal is estimated according to the second machine learning model and the breath signal. A suggested needle insertion period is output according to the breath signal in response to determining that the future breath state is normal.
    Type: Application
    Filed: November 11, 2024
    Publication date: February 27, 2025
    Applicant: Industrial Technology Research Institute
    Inventors: Po-An Hsu, Chih-Chi Chang, Chih-Wei Chien, Chia-Pin Li, Kun-Ta Wu, Wei-Zheng Lu
  • Patent number: 12237414
    Abstract: A method includes receiving a semiconductor substrate. The semiconductor substrate has a top surface and includes a semiconductor element. Moreover, the semiconductor substrate has a fin structure formed thereon. The method also includes recessing the fin structure to form source/drain trenches, forming a first dielectric layer over the recessed fin structure in the source/drain trenches, implanting a dopant element into a portion of the fin structure beneath a bottom surface of the source/drain trenches to form an amorphous semiconductor layer, forming a second dielectric layer over the recessed fin structure in the source/drain trenches, annealing the semiconductor substrate, and removing the first and second dielectric layers. After the annealing and the removing steps, the method further includes further recessing the recessed fin structure to provide a top surface. Additionally, the method includes forming an epitaxial layer from and on the top surface.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: February 25, 2025
    Assignee: TAIWAN SEMICONDCUTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Ching Wang, Wen-Yuan Chen, Wen-Hsing Hsieh, Kuan-Lun Cheng, Chung-Wei Wu, Zhiqiang Wu
  • Patent number: 12237402
    Abstract: In an embodiment, a method includes: forming a fin extending from a substrate; forming a first gate mask over the fin, the first gate mask having a first width; forming a second gate mask over the fin, the second gate mask having a second width, the second width being greater than the first width; depositing a first filling layer over the first gate mask and the second gate mask; depositing a second filling layer over the first filling layer; planarizing the second filling layer with a chemical mechanical polish (CMP) process, the CMP process being performed until the first filling layer is exposed; and planarizing the first filling layer and remaining portions of the second filling layer with an etch-back process, the etch-back process etching materials of the first filling layer, the second filling layer, the first gate mask, and the second gate mask at the same rate.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: February 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Shu-Wei Hsu, Yu-Jen Shen, Hao-Yun Cheng, Chih-Wei Wu, Ying-Tsung Chen, Ying-Ho Chen
  • Publication number: 20250062525
    Abstract: An antenna comprises a first radiation part, a second radiation part, a feed part, and a ground part. The first radiation part comprises a first radiator. The second radiation part comprises a second radiator. A first side of the feed part bends upward to form the first radiator, which is a part of the first radiation part. A second side of the feed part bends upward to form the second radiator, which is a part of the second radiation part. The first side is arranged relative to the second side. A height difference between the first radiator and the second radiator in the first direction is within a preset range. The first direction is perpendicular to a plane where the feed part is located. A vehicle is also provided.
    Type: Application
    Filed: October 9, 2023
    Publication date: February 20, 2025
    Inventors: CHING-LING WU, HSIANG-NENG WEN, YUNG-YU TAI, CHIH-WEI LIAO
  • Patent number: 12230605
    Abstract: A semiconductor package includes semiconductor bridge, first and second multilayered structures, first encapsulant, and a pair of semiconductor dies. Semiconductor dies of the pair include semiconductor substrate and conductive pads disposed at front surface of semiconductor substrate. Semiconductor bridge electrically interconnects the pair of semiconductor dies. First multilayered structure is disposed on rear surface of one semiconductor die. Second multilayered structure is disposed on rear surface of the other semiconductor die. First encapsulant laterally wraps first multilayered structure, second multilayered structure and the pair of semiconductor dies. Each one of first multilayered structure and second multilayered structure includes a top metal layer, a bottom metal layer, and an intermetallic layer. Each one of first multilayered structure and second multilayered structure has surface coplanar with surface of first encapsulant.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: February 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Ching Shih, Chih-Wei Wu, Szu-Wei Lu
  • Publication number: 20250052962
    Abstract: A photonic assembly includes a composite die. The composite die includes: a photonic integrated circuits (PIC) die including waveguides and photonic devices therein; an electronic integrated circuits (EIC) die including semiconductor devices therein; and an embedded optical connector die contacting a top surface of the PIC die and laterally spaced from the EIC die.
    Type: Application
    Filed: January 2, 2024
    Publication date: February 13, 2025
    Inventors: Chen-Hua Yu, Hsing-Kuo Hsia, Chih-Wei Tseng, Jiun Yi Wu
  • Patent number: 12225126
    Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a key generation circuitry and a key-error detection circuitry. The key generation circuitry is arranged operably to realize a key expansion operation for generating multiple round keys based on a root key in an encryption algorithm, where the encryption algorithm encodes plaintext or an intermediate encryption result with one round key in a corresponding round. The error detection circuitry is arranged operably to: calculate redundant data corresponding to each round key; and output an error signal to a processing unit when finding that any round key does not match corresponding redundant data at a check point during the key expansion operation.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: February 11, 2025
    Assignee: SILICON MOTION, INC.
    Inventors: Wun-Jhe Wu, Po-Hung Chen, Chiao-Wen Cheng, Jiun-Hung Yu, Chih-Wei Liu