Abstract: A method of secure compartmentalization for IoT application and a IoT gateway using the same are provided. The method is adapted to the IoT gateway and includes the following steps. A plurality of zones corresponding to a plurality of subnets are created by partitioning the subnets. An application installed in the IoT gateway is deployed to one of the zones. A conduit policy associated with at least one of the zones is configured. Packet transmission of the zones is managed based on the conduit policy.

Abstract: In a method of manufacturing a semiconductor device, a magnetic random access memory (MRAM) cell structure is formed. The MRAM cell structure includes a bottom electrode, a magnetic tunnel junction (MTJ) stack and a top electrode. A first insulating cover layer is formed over the MRAM cell structure. A second insulating cover layer is formed over the first insulating cover layer. An interlayer dielectric (ILD) layer is formed. A contact opening in the ILD layer is formed, thereby exposing the second insulating cover layer. A part of the second insulating cover layer and a part of the first insulating cover layer are removed, thereby exposing the top electrode. A conductive layer is formed in the opening contacting the top electrode.

Abstract: An electronic device includes a driving amplifier, a power amplifier, a power detector, and a bias circuit. The driving amplifier outputs a radio frequency (RF) signal. The power amplifier is electrically connected to the driving amplifier. The power amplifier includes an input end. The power amplifier receives the RF signal through the input end. The power amplifier amplifies the RF signal. The power detector is electrically coupled to the input end and detects the input power of the RF signal. The power detector outputs a driving voltage according to the input power. The bias circuit is electrically connected to the power amplifier and the power detector. The bias circuit outputs a first driving current to the power amplifier according to the driving voltage. The power amplifier amplifies the power of the RF signal from the input power to a target power according to the first driving current.

Abstract: A method and a computing device for proof-of-work (PoW) related to blockchain mining are provided by embodiments of the present invention. The method includes receiving a block; determining whether hash values of multiple nonces corresponding to the block meet the condition, including in response to a first hash value of a first nonce among the plurality of nonces corresponding to the block meeting the condition, continuing to determine whether a second hash value of a second nonce among the plurality of nonces corresponding to the block meets the condition; and verifying at least two nonces that meet the condition among the plurality of nonces. In this way, the energy consumption problem of the blockchain may be solved, and a complete and accurate mathematical model estimable by the blockchain may be established to apply to various applications that guarantee confidence levels using mathematics.

Abstract: A light diffusion plate is configured to be assembled with a blue light source module having blue Mini LEDs to form a white light backlight module. The light diffusion plate is added with organic dyes with light-emission wavelength of 490-650 nm in order to convert the blue light into white light. The light diffusion plate is made by a foaming extrusion process and contains a plurality of micro-bubbles with a size of 60-400 ?m and a weight-reduction ratio of 15-25% for improving the uniformity of white light and resolving the MURA problem. The size of micro-bubbles is controlled by reducing the temperature of at the exit end of the T-die head, such that the wavelength of the white light emitted from the light diffusion plate can be narrower to achieve the effect of wider color gamut display.

Abstract: Techniques are provided for implanting emovectors with virtual representatives. In one embodiment, the techniques involve generating a virtual representative based on visual data of a first user, generating an emovector of a second user of a virtual environment, generating an input of a machine learning model based on the emovector of the second user, and controlling the virtual representative based on an output of the machine learning model.

Abstract: An electronic device including a first body, a second body, a pivoting shaft, a driving module, and a light source is provided. The first body includes a first casing and a second casing movably disposed on the first casing. The second body has a pivoting part and a light reflecting part located at the pivoting part. The pivoting shaft is connected to the pivoting part. The second body is pivoted to the first body through the pivoting shaft. The pivoting shaft, the driving module, and the light source are disposed in the first body. The driving module is connected to the pivoting shaft and contacts the second casing. When the second body rotates relative to the first body, the pivoting shaft drives the driving module to push the second casing to lift to form a light emitting slit between the second casing and the pivoting part.

Abstract: An optical component driving mechanism is provided, including a holder, a fixed portion, a driving assembly, and a first circuit assembly. The holder is used to connect the optical component. The holder is movable relative to the fixed portion. The driving assembly is used to drive the holder to move relative to the fixed portion. The first circuit assembly is fixedly disposed on the holder. The first circuit assembly is electrically connected to the driving assembly.

Abstract: A medium voltage transistor of a level shifter circuit may include a p-well region in a substrate. Moreover, the medium voltage transistor may include an n-type lightly-doped source/drain (NLDD) region in which an N+ source/drain region of the medium voltage transistor is included. The light doping in the NLDD region enables a threshold voltage (Vi) to be reduced while enabling medium voltage operation at the N+ source/drain region. To reduce the amount of current leakage in the medium voltage transistor due to the light doping in the NLDD region, a buffer layer may be included over and/or on a portion of the NLDD region under a gate structure of the medium voltage transistor. The NLDD region and the thermal region of the medium voltage transistor enables the threshold voltage of the medium voltage transistor while maintaining the same current leakage performance or reducing current leakage in the medium voltage transistor.

Abstract: A file managing method for a digital apparatus includes (a) establishing a folder corresponding to a file type generated in an operational mode of the digital apparatus, and (b) storing a file according to its file type to the folder corresponding to the file type established in step (a).

Abstract: A process tool including a polishing pad on a top surface of a wafer platen. A wafer carrier is configured to hold a wafer over the polishing pad. A slurry dispenser is configured to dispense an abrasive slurry including a plurality of charged abrasive particles having a first polarity onto the polishing pad. A first conductive rod is within the wafer platen and coupled to a first voltage supply. A wafer roller is configured to support the wafer. A first wafer brush is arranged beside the wafer roller. A second conductive rod is within the first wafer brush and coupled to a second voltage supply. The first voltage supply is configured to apply a first charge having a second polarity, opposite the first polarity, to the first conductive rod. The second voltage supply is configured to apply a second charge having the second polarity to the second conductive rod.

Abstract: A method includes forming a transistor having source and drain regions. The following are formed on the source/drain region: a first via, a first metal layer extending along a first direction on the first via, a second via overlapping the first via on the first metal layer, and a second metal extending along a second direction different from the first direction on the second via; and the following are formed on the drain/source region: a third via, a third metal layer on the third via, a fourth via overlapping the third via over the third metal layer, and a controlled device at a same height level as the second metal layer on the third metal layer.

Abstract: A high voltage device includes: a semiconductor layer, a well, a body region, a body contact, a gate, a source, and a drain. The body contact is configured as an electrical contact of the body region. The body contact and the source overlap with each other to define an overlap region. The body contact has a depth from an upper surface of the semiconductor layer, wherein the depth is deeper than a depth of the source, whereby a part of the body contact is located vertically below the overlap region. A length of the overlap region in a channel direction is not shorter than a predetermined length, so as to suppress a parasitic bipolar junction transistor from being turning on when the high voltage device operates, wherein the parasitic bipolar junction transistor is formed by a part of the well, a part of the body region and a part of the source.

Abstract: The invention refers to a quantum dot light diffuser plate that can be assembled on a backlight module with blue LEDs as the bottom light source. Microstructures having concave portions and convex portions are formed on the surface of the diffuser plate. A quantum dot layer comprising green quantum dots and red quantum dots is applied only on the concave portions of the microstructures, and thus is separated by the convex portions into small parts independent of each other. A water-blocking and gas-blocking layer is arranged on the upper surface of the quantum dot layer. The water vapor and oxygen from the outside cannot penetrate the side end faces of the quantum dot layer and invade the entire quantum dot layer, such that, the diffuser plate of the invention can have the advantages of simple process, low cost and high production yield.

Abstract: A method comprising: providing a slurry to a polishing pad that is disposed on a wafer platen, the slurry comprising a plurality of electrically charged abrasive particles having a first electrical polarity; moving a first side of a wafer into contact with the slurry and the polishing pad; applying a first electrical charge having a second electrical polarity, opposite the first electrical polarity, to a first conductive rod; moving the first side of the wafer away from the polishing pad while the first electrical charge is applied to the first conductive rod; moving a first wafer brush into contact with the first side of the wafer; applying a second electrical charge having the second electrical polarity, opposite the first electrical polarity, to a second conductive rod arranged within the first wafer brush; and moving the first wafer brush away from the first side of the wafer.

Abstract: A composite material structure, including an outer layer, an inner layer, and a middle layer, is provided. The outer layer includes a metallic material. The inner layer includes a fiber material and a resin material. The outer layer has a first thickness, the inner layer has a second thickness, and the first thickness is different from the second thickness. The middle layer includes an adhesive material and is disposed between the outer layer and the inner layer. Two opposite surfaces of the middle layer are respectively in direct contact with the outer layer and the inner layer. A manufacturing method of the composite material structure is also provided.

Abstract: An IC structure comprises a substrate, a first dielectric structure, a second dielectric structure, a first via structure, and a memory cell structure. The substrate comprises a memory region and a logic region. The first dielectric structure is over the memory region. The second dielectric structure laterally extends from the first dielectric structure to over the logic region. The second dielectric structure has a thickness less than a thickness of the first dielectric structure. The first via structure extends through the first dielectric structure. A top segment of the first via structure is higher than a top surface of the first dielectric structure. The first memory cell structure is over the first via structure.

Abstract: A side by side image detection method and an electronic apparatus using the same are provided. The side by side image detection method includes the following steps. A first image with a first image size is obtained. A second image with a second image size that conforms to a side-by-side image format is detected within the first image by using a convolutional neural network model.

Abstract: A method includes forming a transistor having source and drain regions. The following are formed on the source/drain region: a first via, a first metal layer extending along a first direction on the first via, a second via overlapping the first via on the first metal layer, and a second metal extending along a second direction different from the first direction on the second via; and the following are formed on the drain/source region: a third via, a third metal layer on the third via, a fourth via overlapping the third via over the third metal layer, and a controlled device at a same height level as the second metal layer on the third metal layer.

Abstract: A method for manufacturing a play-of-color article includes the steps of: (a) providing a first mixture that contains a solvent and a plurality of functionalized colloidal particles; (b) replacing the solvent of the first mixture with a polymer solution that contains polymers, thereby obtaining a second mixture; (c) adding an initiator to the second mixture to obtain a third mixture, followed by injecting the third mixture into a mold and disturbing the third mixture, so that the third mixture is formed with a pattern; (d) leaving the third mixture to stand, so as to allow the functionalized colloidal particles therein to self-assemble to form a crystalline arrangement, thereby obtaining a fourth mixture; and (e) subjecting the polymers in the fourth mixture to a cross-linking reaction, thereby obtaining the play-of-color article. A play-of-color article manufactured by the method, and a play-of-color product including the play-of-color article are also provided.