Patents by Inventor Chih-Wen Hsiao

Chih-Wen Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961791
    Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Wen Hsiao, Ming-Da Cheng, Chih-Wei Lin, Chen-Shien Chen, Chih-Hua Chen, Chen-Cheng Kuo
  • Publication number: 20240087896
    Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Chih-Min HSIAO, Chien-Wen LAI, Ru-Gun LIU, Chih-Ming LAI, Shih-Ming CHANG, Yung-Sung YEN, Yu-Chen CHANG
  • Patent number: 11929681
    Abstract: A scalable multi-phase switching converter includes: converter modules, each including: a loop control unit, which generates a basic trigger pulse according to a feedback signal in master operation mode; and a switching control unit, which determines an operation mode and a corresponding phase serial order according to a setting signal received by a setting pin in a setting mode, and generates a multi-phase trigger pulse signal at a trigger pin according to the basic trigger pulse in master operation mode. The switching control unit receives the multi-phase trigger pulse signal at the trigger pin in slave operation mode. The switching control unit generates an ON-trigger pulse according to the multi-phase trigger pulse signal and the corresponding phase serial order. An ON-period determination unit generates a conduction control pulse according to the ON-trigger pulse to control a corresponding inductor. The trigger pins of the converter modules are coupled to each other.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: March 12, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chih-Wen Hsiao, Ping-Ching Huang, Li-Wen Fang
  • Publication number: 20220271668
    Abstract: A scalable multi-phase switching converter includes: converter modules, each including: a loop control unit, which generates a basic trigger pulse according to a feedback signal in master operation mode; and a switching control unit, which determines an operation mode and a corresponding phase serial order according to a setting signal received by a setting pin in a setting mode, and generates a multi-phase trigger pulse signal at a trigger pin according to the basic trigger pulse in master operation mode. The switching control unit receives the multi-phase trigger pulse signal at the trigger pin in slave operation mode. The switching control unit generates an ON-trigger pulse according to the multi-phase trigger pulse signal and the corresponding phase serial order. An ON-period determination unit generates a conduction control pulse according to the ON-trigger pulse to control a corresponding inductor. The trigger pins of the converter modules are coupled to each other.
    Type: Application
    Filed: February 11, 2022
    Publication date: August 25, 2022
    Inventors: Chih-Wen Hsiao, Ping-Ching Huang, Li-Wen Fang
  • Patent number: 11121618
    Abstract: The disclosure provides a power switching circuit. The power switching circuit includes a driving circuit, a determining circuit, a first power switch, and a second power switch. The driving circuit outputs a first driving signal and a second driving signal. The determining circuit is coupled to the driving circuit and outputs a control signal to the driving circuit. The first power switch is coupled to a first input voltage and receives the first driving signal. The second power switch is coupled to a second input voltage and receives the second driving signal. When the first power switch and the second power switch are switched, the second driving signal rises from a first level to a preset level, and the determining circuit controls the driving circuit to utilize the first driving signal to turn off the first power switch.
    Type: Grant
    Filed: November 28, 2019
    Date of Patent: September 14, 2021
    Assignee: uPI Semiconductor Corp.
    Inventors: Chih-Wen Hsiao, Wen-Chieh Tsai
  • Patent number: 10917008
    Abstract: An output stage circuit of a power conversion circuit includes a first power switch, a driving circuit, a first current source, a second current source and a combining circuit. The first power switch is coupled to a second terminal of a bootstrap capacitor. The driving circuit is coupled to the first terminal of the bootstrap capacitor and the first power switch and provides a control signal to the first power switch. The first current source generates a first current according to the control signal. The second current source generates a second current according to a reference voltage which is a first voltage at the first terminal or a second voltage at the second terminal. The combining circuit, coupled to the driving circuit, the first current source and the second current source, generates a switch operation indicating signal to the driving circuit according to the first current and second current.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: February 9, 2021
    Assignee: UPI SEMICONDUCTOR CORP.
    Inventors: Chih-Wen Hsiao, Chien-Ming Chen
  • Publication number: 20200304013
    Abstract: The disclosure provides a power switching circuit. The power switching circuit includes a driving circuit, a determining circuit, a first power switch, and a second power switch. The driving circuit outputs a first driving signal and a second driving signal. The determining circuit is coupled to the driving circuit and outputs a control signal to the driving circuit. The first power switch is coupled to a first input voltage and receives the first driving signal. The second power switch is coupled to a second input voltage and receives the second driving signal. When the first power switch and the second power switch are switched, the second driving signal rises from a first level to a preset level, and the determining circuit controls the driving circuit to utilize the first driving signal to turn off the first power switch.
    Type: Application
    Filed: November 28, 2019
    Publication date: September 24, 2020
    Applicant: uPI Semiconductor Corp.
    Inventors: Chih-Wen Hsiao, Wen-Chieh Tsai
  • Publication number: 20200235663
    Abstract: An output stage circuit of a power conversion circuit includes a first power switch, a driving circuit, a first current source, a second current source and a combining circuit. The first power switch is coupled to a second terminal of a bootstrap capacitor. The driving circuit is coupled to the first terminal of the bootstrap capacitor and the first power switch and provides a control signal to the first power switch. The first current source generates a first current according to the control signal. The second current source generates a second current according to a reference voltage which is a first voltage at the first terminal or a second voltage at the second terminal. The combining circuit, coupled to the driving circuit, the first current source and the second current source, generates a switch operation indicating signal to the driving circuit according to the first current and second current.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 23, 2020
    Inventors: CHIH-WEN HSIAO, CHIEN-MING CHEN
  • Patent number: 10461631
    Abstract: A DC-to-DC controller and a control method thereof are provided. The DC-to-DC controller couples to an output stage, and the output stage provides an output voltage and includes an upper bridge switch and a lower bridge switch. The DC-to-DC controller includes a time signal generating unit and a time signal control circuit. The time signal control circuit couples to the time signal generating unit and receives a preset voltage and the output voltage. During a soft start period, if the output voltage is lower than the preset voltage, after the upper bridge switch is turned off and before the upper bridge switch is turned on again, the time signal control circuit turns off the upper bridge switch and the lower bridge switch for a first preset time and turns on the lower bridge switch for a second preset time.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: October 29, 2019
    Assignee: uPI Semiconductor Corp.
    Inventors: Chih-Wen Hsiao, Chih-Lien Chang
  • Patent number: 10348203
    Abstract: A DC-to-DC controller, a DC-to-DC power converter and a control method thereof are provided. The controller is coupled to an upper-bridge switch and a lower-bridge switch and includes a time generation unit providing a time signal, a voltage identification (VID) change determining circuit and a time control circuit. The VID change determining circuit provides a determination signal in response to a VID signal. The time control circuit provides a control signal according to the time signal and the determination signal. When the VID signal changes from high to low, the time control circuit turns off the upper-bridge switch for a first preset time according to the determination signal and the time signal, and during the first preset time, the time control circuit controls the lower-bridge switch to be turned on for a second preset time multiple times, and to be turned off for a third preset time multiple times.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: July 9, 2019
    Assignee: uPI Semiconductor Corp.
    Inventors: Chih-Wen Hsiao, Chih-Lien Chang
  • Publication number: 20180337598
    Abstract: A DC-to-DC controller, a DC-to-DC power converter and a control method thereof are provided. The controller is coupled to an upper-bridge switch and a lower-bridge switch and includes a time generation unit providing a time signal, a voltage identification (VID) change determining circuit and a time control circuit. The VID change determining circuit provides a determination signal in response to a VID signal. The time control circuit provides a control signal according to the time signal and the determination signal. When the VID signal changes from high to low, the time control circuit turns off the upper-bridge switch for a first preset time according to the determination signal and the time signal, and during the first preset time, the time control circuit controls the lower-bridge switch to be turned on for a second preset time multiple times, and to be turned off for a third preset time multiple times.
    Type: Application
    Filed: February 5, 2018
    Publication date: November 22, 2018
    Applicant: uPI Semiconductor Corp.
    Inventors: Chih-Wen Hsiao, Chih-Lien Chang
  • Publication number: 20180331619
    Abstract: A DC-to-DC controller and a control method thereof are provided. The DC-to-DC controller couples to an output stage, and the output stage provides an output voltage and includes an upper bridge switch and a lower bridge switch. The DC-to-DC controller includes a time signal generating unit and a time signal control circuit. The time signal control circuit couples to the time signal generating unit and receives a preset voltage and the output voltage. During a soft start period, if the output voltage is lower than the preset voltage, after the upper bridge switch is turned off and before the upper bridge switch is turned on again, the time signal control circuit turns off the upper bridge switch and the lower bridge switch for a first preset time and turns on the lower bridge switch for a second preset time.
    Type: Application
    Filed: February 5, 2018
    Publication date: November 15, 2018
    Applicant: uPI Semiconductor Corp.
    Inventors: Chih-Wen Hsiao, Chih-Lien Chang
  • Patent number: 10103727
    Abstract: A power switch circuit includes a first input voltage, a first switch element, a switcher, a first bootstrap capacitor, and a second bootstrap capacitor. The first switch element includes a first control end, a first input end, and a first output end. The first input end is coupled to the first input voltage. The first output end provides an output voltage. The switcher is coupled to the first switch element. The first bootstrap capacitor is coupled to the switcher and provides a first driving voltage. The second bootstrap capacitor is coupled to the switcher and provides a second driving voltage. The first bootstrap capacitor and the second bootstrap capacitor alternately supply the first driving voltage or the second driving voltage to the first control end through an operation of the switcher.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: October 16, 2018
    Assignee: uPI Semiconductor Corp.
    Inventors: Chih-Wen Hsiao, Wen-Chieh Tsai
  • Patent number: 9852860
    Abstract: A method for generating a current adapted to a parameter setting circuit is provided. The parameter setting circuit is coupled to an external setting impedor. The external setting impedor is coupled to an external voltage and outputs a first current. The method for generating the current includes the following steps. A reference voltage and an end voltage of a reference resistor are compared to get a comparison result. The end voltage is adjusted according to a comparison result. A setting parameter is obtained according to the adjusted end voltage. A setting current is generated according to a compensation current. The compensation current is related to a first current and the setting parameter. In addition, a parameter setting circuit of a power conversion apparatus is also provided.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: December 26, 2017
    Assignee: uPI Semiconductor Corp.
    Inventor: Chih-Wen Hsiao
  • Publication number: 20170133182
    Abstract: A method for generating a current adapted to a parameter setting circuit is provided. The parameter setting circuit is coupled to an external setting impedor. The external setting impedor is coupled to an external voltage and outputs a first current. The method for generating the current includes the following steps. A reference voltage and an end voltage of a reference resistor are compared to get a comparison result. The end voltage is adjusted according to a comparison result. A setting parameter is obtained according to the adjusted end voltage. A setting current is generated according to a compensation current. The compensation current is related to a first current and the setting parameter. In addition, a parameter setting circuit of a power conversion apparatus is also provided.
    Type: Application
    Filed: March 3, 2016
    Publication date: May 11, 2017
    Inventor: Chih-Wen Hsiao
  • Patent number: 9331571
    Abstract: A power converter is disclosed. The power converter includes a comparator and a timing generator. The comparator compares a first input signal with a second input signal to provide a control signal. The timing generator is coupled to the comparator. The timing generator includes a plurality of timing generating units, a logic unit, and a calculation unit. The timing generator generates a plurality of timing signals through the timing generating units and the logic unit according to the control signal, and the calculation unit forms a pulse width modulation (PWM) signal according to the timing signals. At least a part of the timing signals are overlapped.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: May 3, 2016
    Assignee: UPI SEMICONDUCTOR CORPORATION
    Inventors: Chih-Wen Hsiao, Chih-Lien Chang
  • Patent number: 9064837
    Abstract: A monitoring method of a three-dimensional integrated circuit (3D IC) is provided, wherein the method includes: providing a plurality of TSVs, providing a plurality of inverters; connecting the inverters with the plurality of TSVs as a circuit loop; enabling the circuit loop to oscillate; measuring an output signal on an output end of one of the plurality of inverters; and determining the manufacturing state of the plurality of TSVs of the 3D IC based on the output signal and apparatus using the same.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: June 23, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Keng-Li Su, Chih Sheng Lin, Chih-Wen Hsiao
  • Publication number: 20140340064
    Abstract: A power converter is disclosed. The power converter includes a comparator and a timing generator. The comparator compares a first input signal with a second input signal to provide a control signal. The timing generator is coupled to the comparator. The timing generator includes a plurality of timing generating units, a logic unit, and a calculation unit. The timing generator generates a plurality of timing signals through the timing generating units and the logic unit according to the control signal, and the calculation unit forms a pulse width modulation (PWM) signal according to the timing signals. At least a part of the timing signals are overlapped.
    Type: Application
    Filed: May 8, 2014
    Publication date: November 20, 2014
    Applicant: uPI semiconductor corp.
    Inventors: Chih-Wen Hsiao, Chih-Lien Chang
  • Publication number: 20120249178
    Abstract: A monitoring method of a three-dimensional integrated circuit (3D IC) is provided, wherein the method includes: providing a plurality of TSVs, providing a plurality of inverters; connecting the inverters with the plurality of TSVs as a circuit loop; enabling the circuit loop to oscillate; measuring an output signal on an output end of one of the plurality of inverters; and determining the manufacturing state of the plurality of TSVs of the 3D IC based on the output signal and apparatus using the same.
    Type: Application
    Filed: June 11, 2012
    Publication date: October 4, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Keng-Li Su, Chih Sheng Lin, Chih-Wen Hsiao
  • Patent number: 8219340
    Abstract: A monitoring method for Through-Silicon Vias (TSVs) of a three-dimensional integrated circuit (3D IC) is provided, wherein the 3D IC includes a plurality of TSVs, and the method includes: providing a plurality of inverters; connecting the inverters with the TSVs as a circuit; enabling the circuit to oscillate; measuring an output signal on an output end of one of the inverters; and determining the characteristic of TSVs of the 3D IC based on the output signal.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: July 10, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Keng-Li Su, Chih Sheng Lin, Chih-Wen Hsiao