Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip (IC). The method includes forming a first fin of semiconductor material and a second fin of semiconductor material within a semiconductor substrate. A gate structure is formed over the first fin and source/drain regions are formed on or within the first fin. The source/drain regions are formed on opposite sides of the gate structure. One or more pick-up regions are formed on or within the second fin. The source/drain regions respectively have a first width measured along a first direction parallel to a long axis of the first fin and the one or more pick-up regions respectively have a second width measured along the first direction. The second width is larger than the first width.

Abstract: A carrier structure is provided, in which at least one positioning area is defined on a chip-placement area of a package substrate, and at least one alignment portion is disposed on the positioning area. Therefore, the precision of manufacturing the alignment portion is improved by disposing the positioning area on the chip-placement area, such that the carrier structure can provide a better alignment mechanism for the chip placement operation.

Abstract: A 3D image sensing device includes a first camera lens, a second camera lens and a light source. A 3D image processing method for the 3D image sensing device includes the following steps. Firstly, a target is photographed by the first camera lens and the second camera lens, and the obtained images are processed in a stereo vision mode. Consequently, a first depth map is obtained. After the light source emits plural feature points to the target, the target is photographed by the first camera lens and the second camera lens, and the obtained images are processed in an active stereo vision mode. Consequently, a second depth map is obtained. The first depth map and the second depth map are synthesized as a synthesized depth map according to a synthetization strategy.

Abstract: Apparatus and methods are provided for thermal throttling for UE configured with multi-panel transceiving on FR2. In one novel aspect, the UE prioritizes throttling actions based on signal qualities of each transceiving panel. In one embodiment, the switching to the target panel from the active panel is selected as the highest priority throttling action when the signal quality of the target panel is similar to the active panel. In another embodiment, the UE further determines if the quality of the target panel is sufficient to support mmW transceiving before switching to the target panel. In one embodiment, the UE reduces one or more antennae of an active panel when the signal quality difference between the active panel and the target panel is bigger than a predefined gap threshold.

Abstract: An electronic device is disclosed. The electronic device includes a substrate, a plurality of color filters disposed on the substrate, an optical film disposed on the plurality of color filter, and a defect disposed between the substrate and the optical film. The optical film has a first base, a protective layer on the first base, and a second base between the first base and the protective layer and having a first processed area. In a top view of the electronic device, the first processed area corresponds to the defect and at least partially overlaps at least two color filters.

Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.

Abstract: A semiconductor device includes a first stack structure, a second stack structure, and a third stack structure. Each of the stack structure includes semiconductor layers vertically spaced from one another. The first, second, and third stack structures all extend along a first lateral direction. The second stack structure is disposed between the first and third stack structures. The semiconductor device includes a first gate structure that extends along a second lateral direction and wraps around each of the semiconductor layers. The semiconductor layers of the first stack structure are coupled with respective source/drain structures. The semiconductor layers of the second stack structure are coupled with respective source/drain structures. The semiconductor layers of the third stack structure are coupled with a dielectric passivation layer.

Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.

Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. Each of the plurality of semiconductor layers extends along a first lateral direction. The semiconductor device includes a gate structure that extends along a second lateral direction and comprises at least a lower portion that wraps around each of the plurality of semiconductor layers. The lower portion of the gate structure comprises a plurality of first gate sections that are laterally aligned with the plurality of semiconductor layers, respectively, and wherein each of the plurality of first gate sections has ends that each extend along the second lateral direction and present a first curvature-based profile.

Abstract: A semiconductor device is described. An isolation region is disposed on the substrate. A plurality of channels extend through the isolation region from the substrate. The channels including an active channel and an inactive channel. A dummy fin is disposed on the isolation region and between the active channel and the inactive channel. An active gate is disposed over the active channel and the inactive channel, and contacts the isolation region. A dielectric material extends through the active gate and contacts a top of the dummy fin. The inactive channel is a closest inactive channel to the dielectric material. A long axis of the active channel extends in a first direction. A long axis of the active gate extends in a second direction. The active channel extends in a third direction from the substrate. The dielectric material is closer to the inactive channel than to the active channel.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: In a method of manufacturing a semiconductor device, the semiconductor device includes a non-volatile memory formed in a memory cell area and a ring structure area surrounding the memory cell area. In the method, a protrusion of a substrate is formed in the ring structure area. The protrusion protrudes from an isolation insulating layer. A high-k dielectric film is formed, thereby covering the protrusion and the isolation insulating layer. A poly silicon film is formed over the high-k dielectric film. The poly silicon film and the high-k dielectric film are patterned. Insulating layers are formed over the patterned poly silicon film and high-k dielectric film, thereby sealing the patterned high-k dielectric film.

Abstract: A physiological detection device includes system including a first array PPG detector, a second array PPG detector, a display and a processing unit. The first array PPG detector is configured to generate a plurality of first PPG signals. The second array PPG detector is configured to generate a plurality of second PPG signals. The display is configured to show a detected result of the physiological detection system. The processing unit is configured to convert the plurality of first PPG signals and the plurality of second PPG signals to a first 3D energy distribution and a second 3D energy distribution, respectively, and control the display to show an alert message.

Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.

Abstract: An apparatus for producing silicon carbide crystal is provided and includes a composite structure formed by a plurality of graphite layers and silicon carbide seed crystals, wherein a density or thickness of each layer of graphite is gradually adjusted to reduce a difference of a thermal expansion coefficient and Young's modulus between the graphite layers and silicon carbide. The composite structure can be stabilized on a top portion or an upper cover of a crucible made of graphite, thereby preventing the silicon carbide crystal from falling off.

Abstract: Present disclosure provides a semiconductor structure, including a semiconductor fin having a first portion and a second portion over the first portion, a first conductive region abutting a first lateral surface of the first portion and a first lateral surface of the second portion, a metal gate having a bottom portion and an upper portion, the bottom portion being between the first portion and the second portion of the semiconductor fin, and the upper portion being over the second portion of the semiconductor fin, and a first spacer between the bottom portion of the metal gate and the first conductive region. A method for manufacturing the semiconductor structure described herein is also provided.

Abstract: A security authentication method is provided. In a step (a), a to-be-recognized image information and a to-be-recognized voice information about a user are provided. Then, a step (b) is performed to identify and judge whether the to-be-recognized image information and the to-be-recognized voice information comply with a registered image information and a registered voice information, respectively. In a step (c), if the judging condition of the step (b) is satisfied, a security information prompt signal is generated. In a step (d), a to-be-recognized security information is provided by the user. Then, a step (e) is performed to identify and judge whether the to-be-recognized security information complies with an abnormal warning information. In a step (f), if the judging condition of the step (e) is satisfied, an abnormal state warning and processing process is performed.

Abstract: A security authentication method is provided. In a step (a), a to-be-recognized image information and a to-be-recognized voice information about a user are provided. Then, a step (b) is performed to identify and judge whether the to-be-recognized image information and the to-be-recognized voice information comply with a registered image information and a registered voice information, respectively. In a step (c), if the judging condition of the step (b) is satisfied, a security information prompt signal is generated. In a step (d), a to-be-recognized security information is provided by the user. Then, a step (e) is performed to identify and judge whether the to-be-recognized security information complies with an abnormal warning information. In a step (f), if the judging condition of the step (e) is satisfied, an abnormal state warning and processing process is performed.

Abstract: A gimbal device for supporting an external photographing device includes a depth camera, a control unit and an actuator. The depth camera is configured to obtain spatial coordinates of a subject being photographed. The control unit is configured to determine a direction adjustment value of the gimbal device according to the spatial coordinates. The actuator is configured to receive the direction adjustment value and to adjust spatial orientation of the gimbal device according to the direction adjustment value, so that the external photographing device is able to track the subject being photographed. The control unit is further configured to obtain initial three-axis data of the gimbal device and three-axis data after the gimbal device is set to determine an angle difference between the initial three-axis data and the set three-axis data, and the actuator is further configured to receive the angle difference.

Abstract: A method for aligning a camera lens with a light source is provided. The method is used in an aligning system. The aligning system includes an alignment element, a reference camera and a fixture. Firstly, the reference camera shoots a reference chart on the alignment element. Then, the light source is placed on the fixture. The light source illuminates the alignment element to generate an illumination result. The reference camera shoots the illumination result. If the illumination result does not comply with a preset specification represented by the reference chart, the fixture adjusts the light source. Then, the camera lens is placed on the fixture. Then, the camera lens shoots the reference chart on the alignment element to acquire a shooting result. If the shooting result does not comply with the preset specification, the fixture adjusts the camera lens.