Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.

Abstract: The present disclosure describes a method for memory cell placement. The method can include placing a memory cell region in a layout area and placing a well pick-up region and a first power supply routing region along a first side of the memory cell region. The method also includes placing a second power supply routing region and a bitline jumper routing region along a second side of the memory cell region, where the second side is on an opposite side to that of the first side. The method further includes placing a device region along the second side of the memory cell region, where the bitline jumper routing region is between the second power supply routing region and the device region.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A stacked wiring structure includes a first wiring substrate and a second wiring substrate. The first wiring substrate includes a first glass substrate, multiple first conductive through vias penetrating through the first glass substrate, and a first multi-layered redistribution wiring structure disposed on the first glass substrate. The second wiring substrate includes a second glass substrate, multiple second conductive through vias penetrating through the second glass substrate, and a second multi-layered redistribution wiring structure disposed on the second glass substrate. The first conductive through vias are electrically connected to the second conductive through vias. The first glass substrate is spaced apart from the second glass substrate. The first multi-layered redistribution wiring structure is spaced apart from the second multi-layered redistribution wiring structure by the first glass substrate and the second glass substrate.

Abstract: An apparatus for producing silicon carbide crystal is provided and includes a composite structure formed by a plurality of graphite layers and silicon carbide seed crystals, wherein a density or thickness of each layer of graphite is gradually adjusted to reduce a difference of a thermal expansion coefficient and Young's modulus between the graphite layers and silicon carbide. The composite structure can be stabilized on a top portion or an upper cover of a crucible made of graphite, thereby preventing the silicon carbide crystal from falling off.

Abstract: A multilayer light diffuser plate and a method for manufacturing the same are disclosed. The multilayer light diffusion plate comprises a main layer and a partially-transmissive and partially-reflective layer located under the main layer. The top surface of the main layer is the light-emitting surface, and the light-incident surface is the bottom surface of the partially-transmissive and partially-reflective layer. The partially-transmissive and partially-reflective layer comprises a plurality of first base material layers and a plurality of second base material layers stacked alternately. The materials of the first and second base material layers have different refractive indices. The partially-transmissive and partially-reflective layer formed by alternately stacking the first and second base material layers with different refractive indices is arranged on the light-incident surface of the light diffuser plate by means of extrusion, which is simpler and less expensive to manufacture.

Abstract: A multilayer light diffuser plate and a method for manufacturing the same are disclosed. The multilayer light diffusion plate comprises a main layer and a partially-transmissive and partially-reflective layer located under the main layer. The top surface of the main layer is the light-emitting surface, and the light-incident surface is the bottom surface of the partially-transmissive and partially-reflective layer. The partially-transmissive and partially-reflective layer comprises a plurality of first base material layers and a plurality of second base material layers stacked alternately. The materials of the first and second base material layers have different refractive indices. The partially-transmissive and partially-reflective layer formed by alternately stacking the first and second base material layers with different refractive indices is arranged on the light-incident surface of the light diffuser plate by means of extrusion, which is simpler and less expensive to manufacture.

Abstract: A multilayer light diffuser plate and a method for manufacturing the same are disclosed. The multilayer light diffusion plate comprises a main layer and a partially-transmissive and partially-reflective layer located under the main layer. The top surface of the main layer is the light-emitting surface, and the light-incident surface is the bottom surface of the partially-transmissive and partially-reflective layer. The partially-transmissive and partially-reflective layer comprises a plurality of first base material layers and a plurality of second base material layers stacked alternately. The materials of the first and second base material layers have different refractive indices. The partially-transmissive and partially-reflective layer formed by alternately stacking the first and second base material layers with different refractive indices is arranged on the light-incident surface of the light diffuser plate by means of extrusion, which is simpler and less expensive to manufacture.

Abstract: A video processing apparatus implemented in a chip includes an on-chip prediction buffer and a processing circuit. The on-chip prediction buffer is shared by a plurality of coding tools for prediction, and is used to store reference data. The processing circuit supports the coding tools for prediction, reads a plurality of first reference data from the on-chip prediction buffer as input data of a first coding tool that is included in the coding tools and enabled by the processing circuit, and writes output data of the first coding tool enabled by the processing circuit into the on-chip prediction buffer as a plurality of second reference data.

Abstract: A nucleic acid extracting device includes a reagent containing unit, a mixing unit, and a flow channel unit. The reagent containing unit contains a specimen, a magnetic bead, and a reagent for extracting. The mixing unit includes a mixing chamber and a stirring assembly. The mixing chamber includes a chamber portion and a tube portion. The stirring assembly includes a main body and an extension. The main body is provided in the chamber portion. The tube portion connects the chamber portion. And the extension connects the main body and extends into the tube portion. The extension and an inner wall of the tube portion have first and second gaps therebetween respectively along first and second directions of the tube portion. The first gap is less than the second gap. The flow channel unit is connected between the reagent containing unit and the mixing unit.

Abstract: The invention refers to a quantum dot light diffuser plate that can be assembled on a backlight module with blue LEDs as the bottom light source. Microstructures having concave portions and convex portions are formed on the surface of the diffuser plate. A quantum dot layer comprising green quantum dots and red quantum dots is applied only on the concave portions of the microstructures, and thus is separated by the convex portions into small parts independent of each other. A water-blocking and gas-blocking layer is arranged on the upper surface of the quantum dot layer. The water vapor and oxygen from the outside cannot penetrate the side end faces of the quantum dot layer and invade the entire quantum dot layer, such that, the diffuser plate of the invention can have the advantages of simple process, low cost and high production yield.

Abstract: The present disclosure provides a temperature sensing device and a calibration method thereof. The temperature sensing device includes a current generation circuit, an analog-to-digital conversion (ADC) circuit and a processing circuit. The calibration method includes: by the current generation circuit, generating a temperature dependent current according to a temperature of a tested object, wherein the temperature dependent current is dependent on a reference current passing through an adjustable resistor of the current generation circuit; by the ADC circuit, performing an analog-to-digital conversion according to the temperature dependent current to generate a sensing value; by the processing circuit, comparing the sensing value with an ideal value; and by the processing circuit, adjusting a resistance value of the adjustable resistor according to a comparison result of the sensing value and the ideal value, so that the sensing value equals the ideal value.

Abstract: A device, an instrument and a belt for tying the cervix are provided. The device includes the belt and the instrument. The belt is used to tie the cervix. The instrument includes a first outer pipe, a second outer pipe and two fork structures. The first outer pipe and the second outer pipe are rotatable to each other. The two fork structures are connected individually to corresponding axial ends of the first outer pipe and the second outer pipe, respectively, and insert into the belt detachably.

Abstract: A prediction processing system includes a processing circuit and a reference data buffer. The processing circuit performs a first inter prediction operation upon a first prediction block in a frame to generate a first inter prediction result, and further performs a second inter prediction operation upon a second prediction block during a first period. The reference data buffer buffers a reference data derived from the first inter prediction result. The processing circuit further fetches the reference data from the reference data buffer, and performs a non-inter prediction operation according to at least the reference data during a second period, wherein the second period overlaps the first period.

Abstract: A video processing apparatus implemented in a chip includes an on-chip prediction buffer and a processing circuit. The on-chip prediction buffer is shared by a plurality of coding tools for prediction, and is used to store reference data. The processing circuit supports the coding tools for prediction, reads a plurality of first reference data from the on-chip prediction buffer as input data of a first coding tool that is included in the coding tools and enabled by the processing circuit, and writes output data of the first coding tool enabled by the processing circuit into the on-chip prediction buffer as a plurality of second reference data.

Abstract: A setup time and hold time detection system including a monitoring unit and a processing unit. The monitoring unit is configured to detect multiple setup times and multiple hold times of multiple test circuits through a source clock signal. The processing unit is configured to record multiple setup times and multiple hold times as multiple detection data. The processing unit is further configured to select a first part of the detection data as multiple first detection data to establish an estimation model. The processing unit is further configured to select a second part of the detection data as multiple second detection data, and compare the second detection data and multiple estimation results generated by the estimation model to obtain an error value of the estimation model.

Abstract: A setup time and hold time detection system including a monitoring unit and a processing unit. The monitoring unit is configured to detect multiple setup times and multiple hold times of multiple test circuits through a source clock signal. The processing unit is configured to record multiple setup times and multiple hold times as multiple detection data. The processing unit is further configured to select a first part of the detection data as multiple first detection data to establish an estimation model. The processing unit is further configured to select a second part of the detection data as multiple second detection data, and compare the second detection data and multiple estimation results generated by the estimation model to obtain an error value of the estimation model.

Abstract: A light diffusion plate is configured to be assembled with a blue light source module having blue Mini LEDs to form a white light backlight module. The light diffusion plate is added with organic dyes with light-emission wavelength of 490-650 nm in order to convert the blue light into white light. The light diffusion plate is made by a foaming extrusion process and contains a plurality of micro-bubbles with a size of 60-400 ?m and a weight-reduction ratio of 15-25% for improving the uniformity of white light and resolving the MURA problem. The size of micro-bubbles is controlled by reducing the temperature of at the exit end of the T-die head, such that the wavelength of the white light emitted from the light diffusion plate can be narrower to achieve the effect of wider color gamut display.

Abstract: A nucleic acid extracting device includes a reagent containing unit, a mixing unit, and a flow channel unit. The reagent containing unit contains a specimen, a magnetic bead, and a reagent for extracting. The mixing unit includes a mixing chamber and a stirring assembly. The mixing chamber includes a chamber portion and a tube portion. The stirring assembly includes a main body and an extension. The main body is provided in the chamber portion. The tube portion connects the chamber portion. And the extension connects the main body and extends into the tube portion. The extension and an inner wall of the tube portion have first and second gaps therebetween respectively along first and second directions of the tube portion. The first gap is less than the second gap. The flow channel unit is connected between the reagent containing unit and the mixing unit.