Patents by Inventor Chih-Yu Wang

Chih-Yu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210193166
    Abstract: An arcing detection system detects arcing within a semiconductor processing cleanroom environment. The arcing detection system includes an array of microphones positioned within the cleanroom environment. The microphones receive soundwaves within the cleanroom environment and generate audio signals based on the sound waves. The arcing system includes a control system that receives the audio signals from the microphones. The control system analyzes the audio signals and detects arcing within the cleanroom environment based on the audio signals. The control system can adjust a semiconductor process in real time responsive to detecting arcing.
    Type: Application
    Filed: December 19, 2019
    Publication date: June 24, 2021
    Inventor: Chih-Yu WANG
  • Publication number: 20200402807
    Abstract: A method includes depositing a mask layer over a semiconductor substrate, etching the mask layer to form a patterned mask, wherein a sidewall of the patterned mask includes a first sidewall region, a second sidewall region, and a third sidewall region, wherein the first sidewall region is farther from the semiconductor substrate than the second sidewall region and the second sidewall region is farther from the semiconductor substrate than the third sidewall region, wherein the second sidewall region protrudes laterally from the first sidewall region and from the third sidewall region, etching the semiconductor substrate using the patterned mask to form fins, forming a gate stack over the fins, and forming source and drain regions in the fin adjacent the gate stack.
    Type: Application
    Filed: September 4, 2020
    Publication date: December 24, 2020
    Inventor: Chih-Yu Wang
  • Patent number: 10872793
    Abstract: In a method of operating an apparatus for manufacturing or analyzing semiconductor wafers, sound in a process chamber of the apparatus during an operation of the apparatus is detected. An electrical signal corresponding to the detected sound is acquired by a signal processor. The acquired electrical signal is processed by the signal processor. An event during the operation of the apparatus is detected based on the processed electrical signal. The operation of the apparatus is controlled according to the detected event.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: December 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Yu Wang, Tien-Wen Wang, Hsin-Hui Chou, In-Tsang Lin
  • Publication number: 20200371046
    Abstract: Systems and methods are provided for monitoring wafer bonding and for detecting or determining defects in a wafer bond formed between two semiconductor wafers. A wafer bonding system includes a camera configured to monitor bonding between two semiconductor wafers. Wafer bonding defect detection circuitry receives video data from the camera, and detects a bonding defect based on the received video data.
    Type: Application
    Filed: March 2, 2020
    Publication date: November 26, 2020
    Inventors: Chih-Yu WANG, Hsi-Cheng HSU
  • Patent number: 10770302
    Abstract: A method includes depositing a mask layer over a semiconductor substrate, etching the mask layer to form a patterned mask, wherein a sidewall of the patterned mask includes a first sidewall region, a second sidewall region, and a third sidewall region, wherein the first sidewall region is farther from the semiconductor substrate than the second sidewall region and the second sidewall region is farther from the semiconductor substrate than the third sidewall region, wherein the second sidewall region protrudes laterally from the first sidewall region and from the third sidewall region, etching the semiconductor substrate using the patterned mask to form fins, forming a gate stack over the fins, and forming source and drain regions in the fin adjacent the gate stack.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chih-Yu Wang
  • Publication number: 20200184642
    Abstract: The present invention discloses a method for detecting skin conditions, and the method includes the steps of: capturing a skin image from a suspected subject; decomposing the skin image into an RBX image through RBX color-space transformation; and determining skin condition of the subject according to a parameter of a color model of the RBX image.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 11, 2020
    Inventors: Chih-Yu Wang, Po-Han HUANG, Shu-Chen CHANG, Chia-Chen LU, Wen-Chien TSAI, Yun-Hsuan OU YANG
  • Publication number: 20200107991
    Abstract: An auxiliary acupuncture system includes an auxiliary acupuncture system includes a human machine interface, a storage unit and a processing unit. The human machine interface is configured to receive at least one symptom of an illness. The storage unit is configured to store acupoint information. The acupoint information contains a name and a therapeutic function of each of a plurality of acupoints. The plurality of acupoints is divided into a plurality of sets of acupoints. The processing unit is coupled with the human machine interface and the storage unit, retrieves at least one of the plurality of sets of acupoints from the acupoint information which has a therapeutic effect for the at least one symptom of the illness, and displays the at least one of the plurality of sets of acupoints on the human machine interface.
    Type: Application
    Filed: December 19, 2018
    Publication date: April 9, 2020
    Inventors: Chih-Yu Wang, Shu-Chen Chang, Che-Chang Kuo, Chih-Er Wu
  • Publication number: 20200105558
    Abstract: A method of monitoring or analyzing a manufacturing of a semiconductor structure includes providing a semiconductor structure; providing a camera disposed around the semiconductor structure; disposing a liquid substance over the semiconductor structure; removing a portion of the semiconductor structure; removing the liquid substance from the semiconductor structure; capturing a plurality of first images of the semiconductor structure by the camera; analyzing the plurality of first images; identifying a region of the semiconductor structure where a residue of the liquid substance is disposed based on the analysis of the plurality of first images; and performing a response based on the identification of the region of the semiconductor structure.
    Type: Application
    Filed: March 29, 2019
    Publication date: April 2, 2020
    Inventor: CHIH-YU WANG
  • Publication number: 20200105537
    Abstract: A method includes depositing a mask layer over a semiconductor substrate, etching the mask layer to form a patterned mask, wherein a sidewall of the patterned mask includes a first sidewall region, a second sidewall region, and a third sidewall region, wherein the first sidewall region is farther from the semiconductor substrate than the second sidewall region and the second sidewall region is farther from the semiconductor substrate than the third sidewall region, wherein the second sidewall region protrudes laterally from the first sidewall region and from the third sidewall region, etching the semiconductor substrate using the patterned mask to form fins, forming a gate stack over the fins, and forming source and drain regions in the fin adjacent the gate stack.
    Type: Application
    Filed: February 15, 2019
    Publication date: April 2, 2020
    Inventor: Chih-Yu Wang
  • Patent number: 10532925
    Abstract: The present disclosure relates to a micro-electromechanical system (MEMs) package. In some embodiments, the MEMs package has a plurality of conductive interconnect layers disposed within a dielectric structure over an upper surface of a first substrate. A heating element is electrically coupled to a semiconductor device within the first substrate by one or more of the plurality of conductive interconnect layers. The heating element is vertically separated from the first substrate by the dielectric structure. A MEMs substrate is coupled to the first substrate and has a MEMs device. A hermetically sealed chamber surrounding the MEMs device is disposed between the first substrate and the MEMs substrate. An out-gassing material is disposed laterally between the hermetically sealed chamber and the heating element.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: January 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Hsin-Yu Chen, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu
  • Publication number: 20190168019
    Abstract: A controllable laser acupuncture device includes a laser generation module and a control unit. The laser generation module includes an emission end, a primary emission head mounted on the emission end, and a plurality of auxiliary emission heads mounted on the emission end. The control unit is electrically connected to the laser generation module. The control unit is configured to control each of the primary emission head and the plurality of auxiliary emission heads to emit or not to emit a laser beam and is configured to adjust properties of the laser beams outputted by the primary emission head and the plurality of auxiliary emission heads.
    Type: Application
    Filed: January 24, 2018
    Publication date: June 6, 2019
    Inventors: Chih-Yu Wang, Shu-Chen Chang, Che-Chang Kuo
  • Publication number: 20190148191
    Abstract: In a method of operating an apparatus for manufacturing or analyzing semiconductor wafers, sound in a process chamber of the apparatus during an operation of the apparatus is detected. An electrical signal corresponding to the detected sound is acquired by a signal processor. The acquired electrical signal is processed by the signal processor. An event during the operation of the apparatus is detected based on the processed electrical signal. The operation of the apparatus is controlled according to the detected event.
    Type: Application
    Filed: September 12, 2018
    Publication date: May 16, 2019
    Inventors: Chih-Yu WANG, Tien-Wen WANG, Vivian CHOU, In-Tsang LIN
  • Publication number: 20190143474
    Abstract: An apparatus for chemical mechanical polishing of a wafer includes a process chamber and a rotatable platen disposed inside the process chamber. A polishing pad is disposed on the platen and a wafer carrier is disposed on the platen. A slurry supply port is configured to supply slurry on the platen. A process controller is configured to control operation of the apparatus. A set of microphones is disposed inside the process chamber. The set of microphones is arranged to detect sound in the process chamber during operation of the apparatus and transmit an electrical signal corresponding to the detected sound. A signal processor is configured to receive the electrical signal from the set of microphones, process the electrical signal to enable detection of an event during operation of the apparatus, and in response to detecting the event, transmit a feedback signal to the process controller.
    Type: Application
    Filed: October 30, 2018
    Publication date: May 16, 2019
    Inventors: Chih-Yu WANG, Tien-Wen WANG, In-Tsang LIN, Vivian CHOU
  • Publication number: 20190010047
    Abstract: The present disclosure relates to a micro-electromechanical system (MEMs) package. In some embodiments, the MEMs package has a plurality of conductive interconnect layers disposed within a dielectric structure over an upper surface of a first substrate. A heating element is electrically coupled to a semiconductor device within the first substrate by one or more of the plurality of conductive interconnect layers. The heating element is vertically separated from the first substrate by the dielectric structure. A MEMs substrate is coupled to the first substrate and has a MEMs device. A hermetically sealed chamber surrounding the MEMs device is disposed between the first substrate and the MEMs substrate. An out-gassing material is disposed laterally between the hermetically sealed chamber and the heating element.
    Type: Application
    Filed: August 28, 2018
    Publication date: January 10, 2019
    Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Hsin-Yu Chen, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu
  • Publication number: 20180370790
    Abstract: The present disclosure, in some embodiments, relates to a method of forming a micro-electromechanical system (MEMS) package. The method includes forming one or more depressions within a capping substrate. A back-side of a MEMS substrate is bonded to the capping substrate after forming the one or more depressions, so that the one or more depressions define one or more cavities between the capping substrate and the MEMS substrate. A front-side of the MEMS substrate is selectively etched to form one or more trenches extending through the MEMS substrate, and one or more polysilicon vias are formed within the one or more trenches. A conductive bonding structure is formed on the front-side of the MEMS substrate at a location contacting the one or more polysilicon vias. The MEMS substrate is bonded to a CMOS substrate having one or more semiconductor devices by way of the conductive bonding structure.
    Type: Application
    Filed: September 5, 2018
    Publication date: December 27, 2018
    Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Ji-Hong Chiang, Jui-Chun Weng, Shiuan-Jeng Lin, Wei-Ding Wu, Ching-Hsiang Hu
  • Patent number: 10155656
    Abstract: The present disclosure relates to micro-electromechanical system (MEMS) package that uses polysilicon inter-tier connections to provide for a low parasitic capacitance in MEM device signals, and a method of formation. In some embodiments, the MEMS package has a CMOS substrate with one or more semiconductor devices arranged within a semiconductor body. A MEMS substrate having an ambulatory element is connected to the CMOS substrate by a conductive bonding structure. The conductive bonding structure is arranged on a front-side of the MEMS substrate at a location laterally offset from the ambulatory element. One or more polysilicon vias extend through the conductive MEMS substrate to the bonding structure. The one or more polysilicon vias are configured to electrically couple the MEMS substrate to the CMOS substrate. By connecting the MEMS substrate to the CMOS substrate using the polysilicon vias, the parasitic capacitance and form factor of the MEMS package are reduced.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Ji-Hong Chiang, Jui-Chun Weng, Shiuan-Jeng Lin, Wei-Ding Wu, Ching-Hsiang Hu
  • Patent number: 10131536
    Abstract: The present disclosure relates to a MEMs package having a heating element configured to adjust a pressure within a hermetically sealed chamber by inducing out-gassing of into the chamber, and an associated method. In some embodiments, the MEMs package has a CMOS substrate having one or more semiconductor devices arranged within a semiconductor body. A MEMs structure is connected to the CMOS substrate and has a micro-electromechanical (MEMs) device. The CMOS substrate and the MEMs structure form a hermetically sealed chamber abutting the MEMs device. A heating element is electrically coupled to the one or more semiconductor devices and is separated from the hermetically sealed chamber by an out-gassing layer arranged along an interior surface of the hermetically sealed chamber. By operating the heating element to cause the out-gassing layer to release a gas, the pressure of the hermetically sealed chamber can be adjusted after it is formed.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: November 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Hsin-Yu Chen, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu
  • Patent number: 9880192
    Abstract: A Micro-Electro-Mechanical System (MEMS) device includes a sensing element, and a proof mass over and overlapping at least a portion of the sensing element. The proof mass is configured to be movable toward the sensing element. A protection region is formed between the sensing element and the proof mass. The protection region overlaps a first portion of the sensing element, and does not overlap a second portion of the sensing element, wherein the first and the second portions overlap the proof mass.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: January 30, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shyh-Wei Cheng, Yu-Ting Hsu, Hsi-Cheng Hsu, Chih-Yu Wang, Jui-Chun Weng, Che-Jung Chu
  • Publication number: 20170107097
    Abstract: The present disclosure relates to micro-electromechanical system (MEMS) package that uses polysilicon inter-tier connections to provide for a low parasitic capacitance in MEM device signals, and a method of formation. In some embodiments, the MEMS package has a CMOS substrate with one or more semiconductor devices arranged within a semiconductor body. A MEMS substrate having an ambulatory element is connected to the CMOS substrate by a conductive bonding structure. The conductive bonding structure is arranged on a front-side of the MEMS substrate at a location laterally offset from the ambulatory element. One or more polysilicon vias extend through the conductive MEMS substrate to the bonding structure. The one or more polysilicon vias are configured to electrically couple the MEMS substrate to the CMOS substrate. By connecting the MEMS substrate to the CMOS substrate using the polysilicon vias, the parasitic capacitance and form factor of the MEMS package are reduced.
    Type: Application
    Filed: December 28, 2015
    Publication date: April 20, 2017
    Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Ji-Hong Chiang, Jui-Chun Weng, Shiuan-Jeng Lin, Wei-Ding Wu, Ching-Hsiang Hu
  • Publication number: 20170107100
    Abstract: The present disclosure relates to a MEMs package having a heating element configured to adjust a pressure within a hermetically sealed chamber by inducing out-gassing of into the chamber, and an associated method. In some embodiments, the MEMs package has a CMOS substrate having one or more semiconductor devices arranged within a semiconductor body. A MEMs structure is connected to the CMOS substrate and has a micro-electromechanical (MEMs) device. The CMOS substrate and the MEMs structure form a hermetically sealed chamber abutting the MEMs device. A heating element is electrically coupled to the one or more semiconductor devices and is separated from the hermetically sealed chamber by an out-gassing layer arranged along an interior surface of the hermetically sealed chamber. By operating the heating element to cause the out-gassing layer to release a gas, the pressure of the hermetically sealed chamber can be adjusted after it is formed.
    Type: Application
    Filed: June 8, 2016
    Publication date: April 20, 2017
    Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Hsin-Yu Chen, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu