Patents by Inventor Chih-Yuan Chuang

Chih-Yuan Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240249969
    Abstract: A wafer carrier with a bottom for connecting to a shaft includes a disc body and at least one heat insulator. The disc body has an accommodating groove for accommodating a wafer, and the disc body has a first surface and a second surface opposing each other. A groove bottom of the accommodating groove has the first surface. The at least one heat insulator is disposed on either the first surface or the second surface. When the wafer is accommodated in the accommodating groove, the at least one heat insulator is positioned between the wafer and the shaft.
    Type: Application
    Filed: January 16, 2024
    Publication date: July 25, 2024
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: CHIH-YUAN CHUANG, JUI-PIN CHEN, JIA-ZHE LIU
  • Publication number: 20240250134
    Abstract: A method includes forming a gate electrode and a source/drain region over a bulk portion of a semiconductor substrate, forming a cut-metal-gate region to separate the gate electrode into a first portion and a second portion, forming a source/drain contact plug overlapping and electrically connected to the source/drain region, forming a first contact rail overlapping a portion of the cut-metal-gate region, removing the bulk portion of the semiconductor substrate, and etching the cut-metal-gate region to form a trench. A surface of the first contact rail is revealed to the trench. A via rail is formed in the trench, and the via rail is electrically connected to the source/drain region through the first contact rail.
    Type: Application
    Filed: May 8, 2023
    Publication date: July 25, 2024
    Inventors: Chun-Yuan Chen, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Kuo-Nan Yang
  • Patent number: 12046516
    Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes channel members over a backside dielectric feature, a gate structure wrapping around the channel members, an epitaxial feature abutting the channel members, a first isolation feature disposed on a first sidewall of the gate structure and extending through the backside dielectric feature, and a second isolation feature disposed on a second sidewall of the gate structure and extending through the backside dielectric feature. A top surface of the first isolation feature is above a top surface of the second isolation feature.
    Type: Grant
    Filed: April 3, 2023
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Lo-Heng Chang, Li-Zhen Yu, Cheng-Chi Chuang, Chih-Hao Wang, Kuan-Lun Cheng
  • Patent number: 12034823
    Abstract: An operating method of an interactive service platform including the steps of: communicating with a plurality of user end devices via an application software; receiving physiological measurement information of user from the user end devices via the application software; analyzing the physiological measurement information to identify a physical and mental state/lifestyle of an associated subscriber; and automatically responding content information associated with at least one associated subscriber according to requests from the user end devices.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: July 9, 2024
    Assignee: PIXART IMAGING INC.
    Inventors: Chih-Yuan Chuang, Yen-Min Chang
  • Patent number: 12028595
    Abstract: A portable electronic device and an image-capturing module thereof are provided. The image-capturing module includes a circuit substrate, an image sensing chip, a rigidity reinforcing structure, and a lens assembly. The circuit substrate has a plurality of conductive substrate contacts. The image sensing chip is disposed on the circuit substrate and electrically connected to the circuit substrate. The image sensing chip includes an image sensing region, and a plurality of conductive chip contacts respectively and electrically connected to the conductive substrate contacts. The rigidity reinforcing structure is disposed on the circuit substrate. The lens assembly includes a lens holder and a lens structure disposed on the lens holder, and the lens structure corresponds to the image sensing region. A perpendicular projection of each of the conductive substrate contacts and a perpendicular projection of each of the conductive chip contacts can be shown on the rigidity reinforcing structure.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: July 2, 2024
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: Chih-Yuan Chuang, Chien-Che Ting
  • Patent number: 12002196
    Abstract: A method for marking defects of products implemented in an electronic device is provided. The method includes obtaining at least one detection image of a product to be marked; recognizing a position and a type of at least one defect on the product according to the at least one detection image; transmit the position and the type of the at least one apparent defect to a robot arm; controlling the robot arm to mark the at least one defect on an adhesive film according to the position and the type of the at least one defect; and controlling a film coating unit to apply the adhesive film which is marked to the product.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: June 4, 2024
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chih-Yuan Chuang
  • Publication number: 20240170564
    Abstract: An epitaxial structure includes a substrate, a first buffer layer, a second buffer layer, and a channel layer, wherein the first buffer layer is located on a top of the substrate and includes a first portion. The first portion includes a nitride, which is ternary and above, and an aluminum atom concentration of the first portion is less than or equal to 25 at %. The first portion has an element doping, wherein a doping concentration of the element doping of the first portion is greater than or equal to 1×1018 cm?3. The second buffer layer is located on a top of the first buffer layer. The second buffer layer is provided without aluminum and has an element doping. The channel layer is located on a top of the second buffer layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: May 23, 2024
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: PO-JUNG LIN, JIA-ZHE LIU, HONG-CHE LIN, CHIH-YUAN CHUANG
  • Publication number: 20240105512
    Abstract: A semiconductor substrate includes a high-resistivity silicon carbide layer and a gallium nitride epitaxial layer. The gallium nitride epitaxial layer is formed on a surface, a thickness of the gallium nitride epitaxial layer is less than 2 ?m, and a full width at half maximum (FWHM) of an X-ray diffraction analysis (002) plane is less than 100 arcsec. The thickness of the high-resistivity silicon carbide layer ranges from 20 ?m to 50 ?m. The surface of the high-resistivity silicon carbide layer has an angle ranging from 0° to +/?8° with respect to a (0001) plane. The micropipe density (MPD) of the high-resistivity silicon carbide layer is less than 0.5 ea/cm2, the basal plane dislocation (BPD) of the high-resistivity silicon carbide layer is less than 10 ea/cm2, and the threading screw dislocation (TSD) of the high-resistivity silicon carbide layer is less than 500 ea/cm2.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 28, 2024
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Chih-Yuan Chuang, Walter Tony Wohlmuth
  • Patent number: 11918329
    Abstract: A physiological detection device includes system including a first array PPG detector, a second array PPG detector, a display and a processing unit. The first array PPG detector is configured to generate a plurality of first PPG signals. The second array PPG detector is configured to generate a plurality of second PPG signals. The display is configured to show a detected result of the physiological detection system. The processing unit is configured to convert the plurality of first PPG signals and the plurality of second PPG signals to a first 3D energy distribution and a second 3D energy distribution, respectively, and control the display to show an alert message.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: March 5, 2024
    Assignee: PIXART IMAGING INC.
    Inventors: Chiung-Wen Lin, Wei-Ru Han, Yang-Ming Chou, Cheng-Nan Tsai, Ren-Hau Gu, Chih-Yuan Chuang
  • Publication number: 20240063329
    Abstract: A method of manufacturing a light-emitting element, including: provide a substrate; form a nucleation layer above the substrate; form a buffer layer above the nucleation layer; form a first nitride layer being in contact with the buffer layer above the buffer layer; form a second nitride layer being in contact with the first nitride layer above the first nitride layer; form a first semiconductor layer above the second nitride layer; form a light-emitting layer above the first semiconductor layer; form a second semiconductor layer above the light-emitting layer. The light-emitting layer is adapted to emit light when electrons and holes recombine. A film thickness of the first nitride layer is smaller than a film thickness of the second nitride layer, and a growth pressure of the first nitride layer is smaller than a growth pressure of the second nitride layer.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 22, 2024
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: JIA-ZHE LIU, CHIH-YUAN CHUANG
  • Patent number: 11887893
    Abstract: A semiconductor substrate and a method of manufacturing the same are provided. The method includes epitaxially growing a buffer layer and a silicon carbide layer on a silicon surface of an N-type silicon carbide substrate, and the silicon carbide layer is high-resistivity silicon carbide or N-type silicon carbide (N—SiC). Next, a gallium nitride epitaxial layer is epitaxially grown on the silicon carbide layer to obtain a semiconductor structure composed of the buffer layer, the silicon carbide layer, and the gallium nitride epitaxial layer. After the epitaxial growth of the gallium nitride epitaxial layer, a laser is used to form a damaged layer in the semiconductor structure, and a chip carrier is bonded to the surface of the gallium nitride epitaxial layer, and then the N-type silicon carbide and the semiconductor structure are separated at the location of the damaged layer.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: January 30, 2024
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Chih-Yuan Chuang, Walter Tony Wohlmuth
  • Publication number: 20230378278
    Abstract: A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x?1 and 0?y?1; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers. The aluminum content varies continuously throughout a thickness of at least one of the layers.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 23, 2023
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Chih-Yuan Chuang, Po Jung Lin, Hong Che Lin
  • Patent number: 11705489
    Abstract: A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x?1 and y?0; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: July 18, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Yen Lun Huang, Chih-Yuan Chuang, Che Ming Liu, Wen-Ching Hsu, Manhsuan Lin
  • Publication number: 20230215924
    Abstract: A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x?1 and y?0; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers.
    Type: Application
    Filed: March 9, 2023
    Publication date: July 6, 2023
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Yen Lun Huang, Chih-Yuan Chuang, Che Ming Liu, Wen-Ching Hsu, Manhsuan Lin
  • Patent number: 11688628
    Abstract: A method of manufacturing an epitaxy substrate is provided. A handle substrate is provided. A beveling treatment is performed on an edge of a device substrate such that a bevel is formed at the edge of the device substrate, wherein a thickness of the device substrate is greater than 100 ?m and less than 200 ?m. An ion implantation process is performed on a first surface of the device substrate to form an implantation region within the first surface. A second surface of the device substrate is bonded to the handle substrate for forming the epitaxy substrate, wherein a bonding angle greater than 90° is provided between the bevel of the device substrate and the handle substrate, and a projection length of the bevel toward the handle substrate is between 600 ?m and 800 ?m.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: June 27, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Ying-Ru Shih, Chih-Yuan Chuang, Chi-Tse Lee, Chun-I Fan, Wen-Ching Hsu
  • Patent number: 11647273
    Abstract: A portable electronic device and a customized image-capturing module thereof are provided. The customized image-capturing module includes a carrier substrate, an image-capturing chip, and a lens assembly. The carrier substrate includes a carrier body, a plurality of first conductive pads, and a plurality of second conductive pads. The image-capturing chip is disposed inside a concave space of the carrier body, and the image-capturing chip includes a plurality of conductive chip pads. The second conductive pads are exposed from a bottom side of the carrier body, the conductive chip pads are electrically connected to the second conductive pads through the first conductive pads, respectively, so that when the customized image-capturing module is partially disposed inside a receiving space and positioned between two electronic elements, the second conductive pads can be electrically connected to conductive substrate pads of a circuit substrate through soldering materials, respectively.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: May 9, 2023
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: Tseng-Chieh Lee, Kung-An Lin, Chih-Yuan Chuang, Chien-Che Ting
  • Publication number: 20230068132
    Abstract: A portable electronic device and an image-capturing module thereof are provided. The image-capturing module includes a circuit substrate, an image sensing chip, a rigidity reinforcing structure, and a lens assembly. The circuit substrate has a plurality of conductive substrate contacts. The image sensing chip is disposed on the circuit substrate and electrically connected to the circuit substrate. The image sensing chip includes an image sensing region, and a plurality of conductive chip contacts respectively and electrically connected to the conductive substrate contacts. The rigidity reinforcing structure is disposed on the circuit substrate. The lens assembly includes a lens holder and a lens structure disposed on the lens holder, and the lens structure corresponds to the image sensing region. A perpendicular projection of each of the conductive substrate contacts and a perpendicular projection of each of the conductive chip contacts can be shown on the rigidity reinforcing structure.
    Type: Application
    Filed: November 22, 2021
    Publication date: March 2, 2023
    Inventors: Chih-Yuan Chuang, CHIEN-CHE TING
  • Publication number: 20230035838
    Abstract: An AC-DC conversion circuit provides a three-phase power source. The AC-DC conversion circuit includes a first inductor, a second inductor, a third inductor, a switch bridge arm assembly, and a control unit. The switch bridge arm assembly includes three switch bridge arms, and each switch bridge arm includes an upper switch and a lower switch. A plurality of common-connected nodes between the upper switches and the lower switches are coupled to the three-phase power source through the first inductor, the second inductor, and the third inductor. The control unit turns on the upper switch and the lower switch to provide a current detection loop. The control unit acquires a magnitude of a first current flowing through the first inductor and a magnitude of a third current flowing through the third inductor, and determines whether a current detection mechanism of the first current and the third current is normal.
    Type: Application
    Filed: April 6, 2022
    Publication date: February 2, 2023
    Inventors: Cheng-Te LI, Nian-Ci CHEN, Chih-Yuan CHUANG, Cheng-Hao HSUEH
  • Patent number: 11569754
    Abstract: A single-phase and three-phase compatible AC-DC conversion circuit includes a first switching component, a second switching component, a third switching component, three switch bridge arms, a fourth switching component, a pre-charge resistor, a capacitor assembly, and a control unit. Each switch bridge arm has an upper switch and a lower switch connected in series. The fourth switching component is coupled between a first phase of a three-phase power source and a common-connected node of the switch bridge arm corresponding to a second phase of the three-phase power source. The control unit turns on the fourth switching component, turns on the upper switch coupled to the first switching component, and turns on the lower switch coupled to the fourth switching component to provide a discharge path so that the capacitor assembly discharges through the pre-charge resistor on the discharge path.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: January 31, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Cheng-Te Li, Chih-Yuan Chuang
  • Publication number: 20220416683
    Abstract: A single-phase and three-phase compatible AC-DC conversion circuit includes a first switching component, a second switching component, a third switching component, three switch bridge arms, a fourth switching component, a pre-charge resistor, a capacitor assembly, and a control unit. Each switch bridge arm has an upper switch and a lower switch connected in series. The fourth switching component is coupled between a first phase of a three-phase power source and a common-connected node of the switch bridge arm corresponding to a second phase of the three-phase power source. The control unit turns on the fourth switching component, turns on the upper switch coupled to the first switching component, and turns on the lower switch coupled to the fourth switching component to provide a discharge path so that the capacitor assembly discharges through the pre-charge resistor on the discharge path.
    Type: Application
    Filed: January 6, 2022
    Publication date: December 29, 2022
    Inventors: Cheng-Te LI, Chih-Yuan CHUANG