Patents by Inventor Chih-Yuan Chuang

Chih-Yuan Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Publication number: 20240105512
    Abstract: A semiconductor substrate includes a high-resistivity silicon carbide layer and a gallium nitride epitaxial layer. The gallium nitride epitaxial layer is formed on a surface, a thickness of the gallium nitride epitaxial layer is less than 2 ?m, and a full width at half maximum (FWHM) of an X-ray diffraction analysis (002) plane is less than 100 arcsec. The thickness of the high-resistivity silicon carbide layer ranges from 20 ?m to 50 ?m. The surface of the high-resistivity silicon carbide layer has an angle ranging from 0° to +/?8° with respect to a (0001) plane. The micropipe density (MPD) of the high-resistivity silicon carbide layer is less than 0.5 ea/cm2, the basal plane dislocation (BPD) of the high-resistivity silicon carbide layer is less than 10 ea/cm2, and the threading screw dislocation (TSD) of the high-resistivity silicon carbide layer is less than 500 ea/cm2.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 28, 2024
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Chih-Yuan Chuang, Walter Tony Wohlmuth
  • Publication number: 20240096996
    Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11935825
    Abstract: An IC structure includes a fin structure, a contact overlying the fin structure along a first direction, and an isolation layer between the contact and the fin structure. The isolation layer is adjacent to a portion of the contact along a second direction perpendicular to the first direction.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kam-Tou Sio, Cheng-Chi Chuang, Chih-Ming Lai, Jiann-Tyng Tzeng, Wei-Cheng Lin, Lipen Yuan
  • Patent number: 11918329
    Abstract: A physiological detection device includes system including a first array PPG detector, a second array PPG detector, a display and a processing unit. The first array PPG detector is configured to generate a plurality of first PPG signals. The second array PPG detector is configured to generate a plurality of second PPG signals. The display is configured to show a detected result of the physiological detection system. The processing unit is configured to convert the plurality of first PPG signals and the plurality of second PPG signals to a first 3D energy distribution and a second 3D energy distribution, respectively, and control the display to show an alert message.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: March 5, 2024
    Assignee: PIXART IMAGING INC.
    Inventors: Chiung-Wen Lin, Wei-Ru Han, Yang-Ming Chou, Cheng-Nan Tsai, Ren-Hau Gu, Chih-Yuan Chuang
  • Publication number: 20240063329
    Abstract: A method of manufacturing a light-emitting element, including: provide a substrate; form a nucleation layer above the substrate; form a buffer layer above the nucleation layer; form a first nitride layer being in contact with the buffer layer above the buffer layer; form a second nitride layer being in contact with the first nitride layer above the first nitride layer; form a first semiconductor layer above the second nitride layer; form a light-emitting layer above the first semiconductor layer; form a second semiconductor layer above the light-emitting layer. The light-emitting layer is adapted to emit light when electrons and holes recombine. A film thickness of the first nitride layer is smaller than a film thickness of the second nitride layer, and a growth pressure of the first nitride layer is smaller than a growth pressure of the second nitride layer.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 22, 2024
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: JIA-ZHE LIU, CHIH-YUAN CHUANG
  • Patent number: 11887893
    Abstract: A semiconductor substrate and a method of manufacturing the same are provided. The method includes epitaxially growing a buffer layer and a silicon carbide layer on a silicon surface of an N-type silicon carbide substrate, and the silicon carbide layer is high-resistivity silicon carbide or N-type silicon carbide (N—SiC). Next, a gallium nitride epitaxial layer is epitaxially grown on the silicon carbide layer to obtain a semiconductor structure composed of the buffer layer, the silicon carbide layer, and the gallium nitride epitaxial layer. After the epitaxial growth of the gallium nitride epitaxial layer, a laser is used to form a damaged layer in the semiconductor structure, and a chip carrier is bonded to the surface of the gallium nitride epitaxial layer, and then the N-type silicon carbide and the semiconductor structure are separated at the location of the damaged layer.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: January 30, 2024
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Chih-Yuan Chuang, Walter Tony Wohlmuth
  • Publication number: 20230378278
    Abstract: A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x?1 and 0?y?1; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers. The aluminum content varies continuously throughout a thickness of at least one of the layers.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 23, 2023
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Chih-Yuan Chuang, Po Jung Lin, Hong Che Lin
  • Patent number: 11705489
    Abstract: A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x?1 and y?0; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: July 18, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Yen Lun Huang, Chih-Yuan Chuang, Che Ming Liu, Wen-Ching Hsu, Manhsuan Lin
  • Publication number: 20230215924
    Abstract: A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x?1 and y?0; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers.
    Type: Application
    Filed: March 9, 2023
    Publication date: July 6, 2023
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Yen Lun Huang, Chih-Yuan Chuang, Che Ming Liu, Wen-Ching Hsu, Manhsuan Lin
  • Patent number: 11688628
    Abstract: A method of manufacturing an epitaxy substrate is provided. A handle substrate is provided. A beveling treatment is performed on an edge of a device substrate such that a bevel is formed at the edge of the device substrate, wherein a thickness of the device substrate is greater than 100 ?m and less than 200 ?m. An ion implantation process is performed on a first surface of the device substrate to form an implantation region within the first surface. A second surface of the device substrate is bonded to the handle substrate for forming the epitaxy substrate, wherein a bonding angle greater than 90° is provided between the bevel of the device substrate and the handle substrate, and a projection length of the bevel toward the handle substrate is between 600 ?m and 800 ?m.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: June 27, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Ying-Ru Shih, Chih-Yuan Chuang, Chi-Tse Lee, Chun-I Fan, Wen-Ching Hsu
  • Patent number: 11647273
    Abstract: A portable electronic device and a customized image-capturing module thereof are provided. The customized image-capturing module includes a carrier substrate, an image-capturing chip, and a lens assembly. The carrier substrate includes a carrier body, a plurality of first conductive pads, and a plurality of second conductive pads. The image-capturing chip is disposed inside a concave space of the carrier body, and the image-capturing chip includes a plurality of conductive chip pads. The second conductive pads are exposed from a bottom side of the carrier body, the conductive chip pads are electrically connected to the second conductive pads through the first conductive pads, respectively, so that when the customized image-capturing module is partially disposed inside a receiving space and positioned between two electronic elements, the second conductive pads can be electrically connected to conductive substrate pads of a circuit substrate through soldering materials, respectively.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: May 9, 2023
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: Tseng-Chieh Lee, Kung-An Lin, Chih-Yuan Chuang, Chien-Che Ting
  • Publication number: 20230068132
    Abstract: A portable electronic device and an image-capturing module thereof are provided. The image-capturing module includes a circuit substrate, an image sensing chip, a rigidity reinforcing structure, and a lens assembly. The circuit substrate has a plurality of conductive substrate contacts. The image sensing chip is disposed on the circuit substrate and electrically connected to the circuit substrate. The image sensing chip includes an image sensing region, and a plurality of conductive chip contacts respectively and electrically connected to the conductive substrate contacts. The rigidity reinforcing structure is disposed on the circuit substrate. The lens assembly includes a lens holder and a lens structure disposed on the lens holder, and the lens structure corresponds to the image sensing region. A perpendicular projection of each of the conductive substrate contacts and a perpendicular projection of each of the conductive chip contacts can be shown on the rigidity reinforcing structure.
    Type: Application
    Filed: November 22, 2021
    Publication date: March 2, 2023
    Inventors: Chih-Yuan Chuang, CHIEN-CHE TING
  • Publication number: 20230035838
    Abstract: An AC-DC conversion circuit provides a three-phase power source. The AC-DC conversion circuit includes a first inductor, a second inductor, a third inductor, a switch bridge arm assembly, and a control unit. The switch bridge arm assembly includes three switch bridge arms, and each switch bridge arm includes an upper switch and a lower switch. A plurality of common-connected nodes between the upper switches and the lower switches are coupled to the three-phase power source through the first inductor, the second inductor, and the third inductor. The control unit turns on the upper switch and the lower switch to provide a current detection loop. The control unit acquires a magnitude of a first current flowing through the first inductor and a magnitude of a third current flowing through the third inductor, and determines whether a current detection mechanism of the first current and the third current is normal.
    Type: Application
    Filed: April 6, 2022
    Publication date: February 2, 2023
    Inventors: Cheng-Te LI, Nian-Ci CHEN, Chih-Yuan CHUANG, Cheng-Hao HSUEH
  • Patent number: 11569754
    Abstract: A single-phase and three-phase compatible AC-DC conversion circuit includes a first switching component, a second switching component, a third switching component, three switch bridge arms, a fourth switching component, a pre-charge resistor, a capacitor assembly, and a control unit. Each switch bridge arm has an upper switch and a lower switch connected in series. The fourth switching component is coupled between a first phase of a three-phase power source and a common-connected node of the switch bridge arm corresponding to a second phase of the three-phase power source. The control unit turns on the fourth switching component, turns on the upper switch coupled to the first switching component, and turns on the lower switch coupled to the fourth switching component to provide a discharge path so that the capacitor assembly discharges through the pre-charge resistor on the discharge path.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: January 31, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Cheng-Te Li, Chih-Yuan Chuang
  • Publication number: 20220416683
    Abstract: A single-phase and three-phase compatible AC-DC conversion circuit includes a first switching component, a second switching component, a third switching component, three switch bridge arms, a fourth switching component, a pre-charge resistor, a capacitor assembly, and a control unit. Each switch bridge arm has an upper switch and a lower switch connected in series. The fourth switching component is coupled between a first phase of a three-phase power source and a common-connected node of the switch bridge arm corresponding to a second phase of the three-phase power source. The control unit turns on the fourth switching component, turns on the upper switch coupled to the first switching component, and turns on the lower switch coupled to the fourth switching component to provide a discharge path so that the capacitor assembly discharges through the pre-charge resistor on the discharge path.
    Type: Application
    Filed: January 6, 2022
    Publication date: December 29, 2022
    Inventors: Cheng-Te LI, Chih-Yuan CHUANG
  • Patent number: 11538681
    Abstract: An epitaxy substrate and a method of manufacturing the same are provided. The epitaxy substrate includes a silicon substrate and a silicon carbide layer. The silicon substrate has a first surface and a second surface opposite to each other, and the first surface is an epitaxy surface. The silicon carbide layer is located in the silicon substrate, and a distance between the silicon carbide layer and the first surface is between 100 angstroms (?) and 500 angstroms.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: December 27, 2022
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Ying-Ru Shih, Chih-Yuan Chuang, Chun-I Fan, Wen-Ching Hsu
  • Publication number: 20220390291
    Abstract: A temperature detection device includes plural thermistors, a voltage source and plural temperature detection circuits. The first terminals of the thermistors are electrically connected with a common node. The voltage source is electrically connected with the common node directly. Each temperature detection circuit includes a voltage divider and a differential amplifier circuit. The voltage divider includes a first resistor and a second resistor. A first terminal of the first resistor is connected with the common node. A second terminal of the first resistor is connected with a first terminal of the second resistor and the second terminal of the corresponding thermistor. The second terminal of the second resistor is electrically connected with a ground terminal. The differential amplifier circuit includes a first input terminal connected with the first terminal of the first resistor, a second input terminal connected with the second terminal of the first resistor, and an output terminal.
    Type: Application
    Filed: December 28, 2021
    Publication date: December 8, 2022
    Inventors: Cheng-Te Li, Chih-Yuan Chuang, Yen-Hsun Chen
  • Publication number: 20220201173
    Abstract: A portable electronic device and a customized image-capturing module thereof are provided. The customized image-capturing module includes a carrier substrate, an image-capturing chip, and a lens assembly. The carrier substrate includes a carrier body, a plurality of first conductive pads, and a plurality of second conductive pads. The image-capturing chip is disposed inside a concave space of the carrier body, and the image-capturing chip includes a plurality of conductive chip pads. The second conductive pads are exposed from a bottom side of the carrier body, the conductive chip pads are electrically connected to the second conductive pads through the first conductive pads, respectively, so that when the customized image-capturing module is partially disposed inside a receiving space and positioned between two electronic elements, the second conductive pads can be electrically connected to conductive substrate pads of a circuit substrate through soldering materials, respectively.
    Type: Application
    Filed: July 23, 2021
    Publication date: June 23, 2022
    Inventors: TSENG-CHIEH LEE, KUNG-AN LIN, Chih-Yuan Chuang, CHIEN-CHE TING
  • Publication number: 20220183577
    Abstract: A microcirculation detection system including a heating device, a photosensitive array and a processing unit is provided. The heating device is used to heat a skin area. The photosensitive array is used to detect outgoing light from the skin area, and output a plurality of brightness variation signals respectively at different time points within a heating period. The processing unit is used to calculate a change of an array energy distribution varied within the heating period according to the plurality of brightness variation signals to accordingly identify a microcirculation state.
    Type: Application
    Filed: March 8, 2022
    Publication date: June 16, 2022
    Inventors: WEI-RU HAN, CHIH-YUAN CHUANG