Abstract: Systems, apparatuses, and methods for multi-application optical sensing are provided. For example, an optical sensing apparatus can include a photodetector array, a first circuitry, and a second circuitry. The photodetector array includes a plurality of photodetectors, wherein a first subset of the plurality of photodetectors are configured as a first region for detecting a first optical signal, and a second subset of the plurality of photodetectors are configured as a second region for detecting a second optical signal. The first circuitry, coupled to the first region, is configured to perform a first function based on the first optical signal to output a first output result. The second circuitry, coupled to the second region, is configured to perform a second function based on the second optical signal to output a second output result.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: An optical system that includes a first module is provided. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the first fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the first fixed portion.

Abstract: An optical system is provided, including a first module configured to hold a first optical member. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the fixed portion.

Abstract: The present disclosure provides a package structure having a photonic integrated circuit, the package structure includes a substrate, a chip and an optical module. The chip has an optical waveguide structure and a recessed portion. The optical waveguide structure is adjacent to the recessed portion. The recessed portion faces the substrate, and the chip is engaged to the substrate by flip chip. The optical module is provided in the recessed portion of the chip.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.

Abstract: A method includes bonding a second package component to a first package component, bonding a third package component to the first package component, attaching a dummy die to the first package component, encapsulating the second package component, the third package component, and the dummy die in an encapsulant, and performing a planarization process to level a top surface of the second package component with a top surface of the encapsulant. After the planarization process, an upper portion of the encapsulant overlaps the dummy die. The dummy die is sawed-through to separate the dummy die into a first dummy die portion and a second dummy die portion. The upper portion of the encapsulant is also sawed through.

Abstract: A semiconductor structure is provided, including: a substrate and a dielectric layer arranged on the substrate; a conductive plug, wherein a first part of the conductive plug is arranged in the substrate, and a second part of the conductive plug is arranged in the dielectric layer; and an isolation ring structure at least surrounding the second part of the conductive plug.

Abstract: A management circuit is coupled to multiple processor cores for performing current suppression. The management circuit includes a detection circuit and a throttle signal generator. The detection circuit is operative to receive an activity signal from each processor core, and estimate a total current consumed by the plurality of processor cores based on activity signals. The activity signal indicates a current index proportional to current consumption of the processor core in a given time period. The throttle signal generator is operative to assert or de-assert throttle signals to the processor cores, one processor core at a time, based on one or more metrics calculated from the total current.

Abstract: The disclosed computer-implemented methods and systems include training a machine-learning model to accurately generate representations of similar scenes from long-form videos that have semantically different speech audio. For example, the methods and systems described herein generate machine-learning model training data including video clips and corresponding audio spectrograms. To augment this data, the methods and systems described herein further include dubbed audio spectrograms with the training data such that each video clips corresponds with a primary language audio spectrogram and a secondary language audio spectrogram. By applying a machine-learning model to this training data, the systems and methods described herein teach the machine-learning model to de-emphasize speech audio when generating audio visual representations corresponding to scenes from long-form video. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: An optical member driving mechanism is provided. The optical member driving mechanism includes a fixed portion, a movable portion, an electromagnetic driving assembly and an elastic member. The fixed portion has a base and a frame that is disposed on the base. The movable portion is movable relative to the fixed portion, and includes a carrier for carrying an optical member with an incident optical axis. The carrier includes a body and a sidewall that extends along the edge of the body, wherein the carrier further includes a first stopping portion and a second stopping portion protruding towards the fixed portion. The electromagnetic driving assembly drives the movable portion to move relative to the fixed portion. The movable portion is movably connected to the fixed portion via the elastic member.

Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.

Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a search circuitry and a substitution check circuitry. The key generation circuitry is arranged operably to convert a first value of one byte corresponding to a plaintext, an intermediate encryption result, or a round key into a second value of a K-bit according to an 8-to-K lookup table, where K is an integer ranging from 10 to 15 and the second value comprises (K minus 8) bits of a Hamming parity. The substitution check circuitry is arranged operably to employ check formulae corresponding to the 8-to-K lookup table to determine whether an error is occurred during a conversion of the first value of the one byte into the second value of the K-bit, and output an error signal when finding the error, where a total amount of the formulae is K minus 8.

Abstract: An electronic device including a metal casing and at least one antenna module is provided. The metal casing includes at least one window. The at least one antenna module is disposed in the at least one window. The at least one antenna module includes a first radiator and a second radiator. The first radiator includes a feeding end, a first ground end joined to the metal casing, a second ground end, a first portion extending from the feeding end to the first ground end, and a second portion extending from the feeding end to the second ground end. A first coupling gap is between the second radiator and the first portion. A second coupling gap is between at least part of the second radiator and the metal casing, and the second radiator includes a third ground end joined to the metal casing.

Abstract: Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.

Abstract: An antenna module includes a first metal plate and a frame body. The frame body surrounds the first metal plate. The frame body includes a first antenna radiator, a second antenna radiator, a third antenna radiator, a first breakpoint and a second breakpoint. The first antenna radiator includes a first feeding end and excites a first frequency band. The second antenna radiator includes a second feeding end and excites a second frequency band. The third antenna radiator includes a third feeding end and excites a third frequency band. The first breakpoint is located between the first antenna radiator and the second antenna radiator. The second breakpoint is located between the second antenna radiator and the third antenna radiator. An electronic device including the above-mentioned antenna module is also provided.

Abstract: Provided are a package structure having a joint structure and a method of forming the same. The package structure includes: a first under bump metallurgy (UBM) structure disposed on a first dielectric layer, wherein the first UBM structure at least comprises: a barrier layer embedded in the first dielectric layer; and an upper metal layer disposed over the barrier layer, wherein a sidewall of the barrier layer is laterally offset outward from a sidewall of the upper metal layer, and a portion of a top surface of the barrier layer is exposed by the first dielectric layer; and a solder layer disposed on the first UBM structure and contacting the upper metal layer.

Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.

Abstract: Some implementations described herein provide techniques and apparatuses for a stacked semiconductor die package. The stacked semiconductor die package may include an upper semiconductor die package above a lower semiconductor die package. The stacked semiconductor die package includes one or more rows of pad structures located within a footprint of a semiconductor die of the lower semiconductor die package. The one or more rows of pad structures may be used to mount the upper semiconductor die package above the lower semiconductor die package. Relative to another stacked semiconductor die package including a row of dummy connection structures adjacent to the semiconductor die that may be used to mount the upper semiconductor die package, a size of the stacked semiconductor die package may be reduced.