Abstract: A semiconductor device includes a package and a cooler. The semiconductor package includes a semiconductor element, a metal member, and a molding member for encapsulating the semiconductor element and the metal member. The metal member has a metal portion thermally connected to the semiconductor element, an insulating layer on the metal portion, and a conducting layer on the insulating layer. The conducting layer is at least partially exposed outside the molding member and serves as a radiation surface for radiating heat of the semiconductor element. The cooler has a coolant passage through which a coolant circulates to cool the conducting layer. The conducting layer and the cooler are electrically connected together.

Abstract: A semiconductor device includes a package and a cooler. The semiconductor package includes a semiconductor element, a metal member, and a molding member for encapsulating the semiconductor element and the metal member. The metal member has a metal portion thermally connected to the semiconductor element, an insulating layer on the metal portion, and a conducting layer on the insulating layer. The conducting layer is at least partially exposed outside the molding member and serves as a radiation surface for radiating heat of the semiconductor element. The cooler has a coolant passage through which a coolant circulates to cool the conducting layer. The conducting layer and the cooler are electrically connected together.

Abstract: A semiconductor device includes a package and a cooler. The semiconductor package includes a semiconductor element, a metal member, and a molding member for encapsulating the semiconductor element and the metal member. The metal member has a metal portion thermally connected to the semiconductor element, an insulating layer on the metal portion, and a conducting layer on the insulating layer. The conducting layer is at least partially exposed outside the molding member and serves as a radiation surface for radiating heat of the semiconductor element. The cooler has a coolant passage through which a coolant circulates to cool the conducting layer. The conducting layer and the cooler are electrically connected together.

Abstract: A semiconductor device includes a package and a cooler. The semiconductor package includes a semiconductor element, a metal member, and a molding member for encapsulating the semiconductor element and the metal member. The metal member has a metal portion thermally connected to the semiconductor element, an insulating layer on the metal portion, and a conducting layer on the insulating layer. The conducting layer is at least partially exposed outside the molding member and serves as a radiation surface for radiating heat of the semiconductor element. The cooler has a coolant passage through which a coolant circulates to cool the conducting layer. The conducting layer and the cooler are electrically connected together.

Abstract: A method of producing a semiconductor module which includes a resin molded package and a coolant passage is provided. The resin molded package is made up of a thermosetting resin-made mold and a thermoplastic resin-made mold. The resin molded package is formed by making the thermoplastic resin-made mold, placing the thermoplastic resin-made mold and a semiconductor sub-assembly made up of a power semiconductor chip, heat spreaders, terminals, etc., and then forming the thermosetting resin-made mold. Specifically, the thermosetting resin-made mold is made after the thermoplastic resin-made mold, thereby creating a high degree of adhesion of the thermosetting resin-made mold to the thermoplastic resin-made mold before the thermosetting resin-made mold is hardened completely, thereby forming firmly an adhered interface between the thermosetting resin-made mold and the thermoplastic resin-made mold.

Abstract: A semiconductor device includes a package and a cooler. The semiconductor package includes a semiconductor element, a metal member, and a molding member for encapsulating the semiconductor element and the metal member. The metal member has a metal portion thermally connected to the semiconductor element, an insulating layer on the metal portion, and a conducting layer on the insulating layer. The conducting layer is at least partially exposed outside the molding member and serves as a radiation surface for radiating heat of the semiconductor element. The cooler has a coolant passage through which a coolant circulates to cool the conducting layer. The conducting layer and the cooler are electrically connected together.

Abstract: A semiconductor module and a method of manufacturing the same are disclosed including a semiconductor element having an electrode, a heat radiation plate placed in thermal contact with a main surface of the semiconductor element and electrically connected to the electrode thereof, an insulation body directly formed on an outside surface of the heat radiation plate, a metallic body directly formed on an outside surface of the insulation body and having a thickness lower than that of the insulation body, and a mold resin unitarily molding the heat radiation plate, the semiconductor element and the insulation body. The insulation body is covered with the metallic body and the mold resin and the metallic body has an outside surface exposed to an outside of the mold resin.

Abstract: A method for manufacturing a semiconductor device having a solder layer includes the steps of: grinding a mounting surface of a semiconductor chip; etching the mounting surface of the chip; forming an electrode on the mounting surface of the chip; assembling the chip, the solder layer and a base in this order; and heating the chip, the solder layer and the base to be equal to or higher than a solidus temperature of the solder layer so that the solder layer is reflowed for soldering the chip on the base.

Abstract: A semiconductor device includes: a semiconductor substrate; a base member; a tin-based solder layer; a first metal layer; and a first alloy layer. The semiconductor substrate is bonded to the base member through the first metal layer, the first alloy layer and the tin-based solder layer in this order. The first alloy layer is made of a first metal in the first metal layer and tin in the tin-based solder layer. The first metal layer is made of at least one of material selected from the group consisting of titanium, aluminum, iron, molybdenum, chromium, vanadium and iron-nickel-chromium alloy.

Abstract: A semiconductor device includes: a semiconductor substrate; a base member; a tin-based solder layer; a first metal layer; and a first alloy layer. The semiconductor substrate is bonded to the base member through the first metal layer, the first alloy layer and the tin-based solder layer in this order. The first alloy layer is made of a first metal in the first metal layer and tin in the tin-based solder layer. The first metal layer is made of at least one of material selected from the group consisting of titanium, aluminum, iron, molybdenum, chromium, vanadium and iron-nickel-chromium alloy.

Abstract: A semiconductor device includes: a semiconductor substrate; a base member; a tin-based solder layer; a first metal layer; and a first alloy layer. The semiconductor substrate is bonded to the base member through the first metal layer, the first alloy layer and the tin-based solder layer in this order. The first alloy layer is made of a first metal in the first metal layer and tin in the tin-based solder layer. The first metal layer is made of at least one of material selected from the group consisting of titanium, aluminum, iron, molybdenum, chromium, vanadium and iron-nickel-chromium alloy.

Abstract: A semiconductor device, which has a relatively low ON resistance, is manufactured using the following steps. First, a semiconductor wafer that includes a semiconductor layer and a semiconductor element layer, which is located on the semiconductor layer, is formed. Then, the wafer is ground evenly to a predetermined thickness from the side where the semiconductor layer is located. Next, the wafer is etched to a predetermined thickness from the side where the semiconductor layer is located while the periphery of the wafer is masked against the etchant to form a rim at the periphery. The wafer is reinforced by the rim at the periphery, so even if the wafer is relatively large, the wafer is prevented from breaking or warping at the later steps after the wafer is thinned by etching.

Abstract: A semiconductor device includes: a semiconductor substrate; a base member; a tin-based solder layer; a first metal layer; and a first alloy layer. The semiconductor substrate is bonded to the base member through the first metal layer, the first alloy layer and the tin-based solder layer in this order. The first alloy layer is made of a first metal in the first metal layer and tin in the tin-based solder layer. The first metal layer is made of at least one of material selected from the group consisting of titanium, aluminum, iron, molybdenum, chromium, vanadium and iron-nickel-chromium alloy.

Abstract: A method for manufacturing a semiconductor device having a solder layer includes the steps of: grinding a mounting surface of a semiconductor chip; etching the mounting surface of the chip; forming an electrode on the mounting surface of the chip; assembling the chip, the solder layer and a base in this order; and heating the chip, the solder layer and the base to be equal to or higher than a solidus temperature of the solder layer so that the solder layer is reflowed for soldering the chip on the base.

Abstract: A method for manufacturing a semiconductor device with a substrate having a device layer and a backside electrode is disclosed. Here, a surface roughness of the substrate is defined as a ratio between a substantial area and a projected area. The method includes polishing and wet-etching a backside surface of the substrate mechanically with using predetermined abrasive grains so that a surface roughness of the backside surface of the substrate becomes to be equal to or larger than 1.04, and forming the backside electrode on the backside surface of the substrate after polishing and wet-etching the backside surface of the substrate.

Abstract: A method for manufacturing a semiconductor device with a substrate having a device layer and a backside electrode is disclosed. Here, a surface roughness of the substrate is defined as a ratio between a substantial area and a projected area. The method includes polishing and wet-etching a backside surface of the substrate mechanically with using predetermined abrasive grains so that a surface roughness of the backside surface of the substrate becomes to be equal to or larger than 1.04, and forming the backside electrode on the backside surface of the substrate after polishing and wet-etching the backside surface of the substrate.

Abstract: A semiconductor device, which has a relatively low ON resistance, is manufactured using the following steps. First, a semiconductor wafer that includes a semiconductor layer and a semiconductor element layer, which is located on the semiconductor layer, is formed. Then, the wafer is ground evenly to a predetermined thickness from the side where the semiconductor layer is located. Next, the wafer is etched to a predetermined thickness from the side where the semiconductor layer is located while the periphery of the wafer is masked against the etchant to form a rim at the periphery. The wafer is reinforced by the rim at the periphery, so even if the wafer is relatively large, the wafer is prevented from breaking or warping at the later steps after the wafer is thinned by etching.

Abstract: A semiconductor device includes a semiconductor chip that generates heat in operation, a pair of heat sinks for cooling the chip, and a mold resin, in which the chip and the heat sinks are embedded. The thickness t1 of the chip and the thickness t2 of one of heat sinks that is joined to the chip using a solder satisfy the equation of t2/t1≧5. Furthermore, the thermal expansion coefficient &agr;1 of the heat sinks and the thermal expansion coefficient &agr;2 of the mold resin satisfy the equation of 0.5≦&agr;2/&agr;1≦1.5. In addition, the surface of the chip that faces the solder has a roughness Ra that satisfies the equation of Ra≦500 nm. Moreover, the solder is a Sn-based solder to suppress relaxation of a compressive stress in the chip, which is caused by the creeping of the solder.

Abstract: A semiconductor device, which has a high adhesiveness to the Cu film and the barrier metal at the bump part or LSI wiring part of a flip chip, is disclosed. On a silicon substrate are formed a transistor as a functional element and a bump for making contact with the transistor and an external substrate. On the surface of the silicon substrate is formed a metallic film, and on the metallic film is formed an insulating film, and a part of the metallic film is exposed through a contact hole. On the metallic film within the contact hole is formed a barrier metal made of TiN, and on the barrier metal is formed a bonding layer made of Ti. On the bonding layer is formed a bump growing Cu film, and on the bump growing Cu film is formed a bump structure.