Patents by Inventor Chin-Chi Wang

Chin-Chi Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9406780
    Abstract: Vertical gate all around devices are formed by initially forming a first doped region and a second doped region that are planar with each other. A channel layer is formed over the first doped region and the second doped region, and a third doped region is formed over the channel layer. A fourth doped region is formed to be planar with the third doped region, and the first doped region, the second doped region, the third doped region, the fourth doped region, and the channel layer are patterned to form a first nanowire and a second nanowire, which are then used to form the vertical gate all around devices.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: August 2, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hong-Lin Chen, Shih-Cheng Chen, Ming-Shan Shieh, Chin-Chi Wang, Wai-Yi Lien, Chih-Hao Wang
  • Patent number: 9373620
    Abstract: A series-connected transistor structure includes a first source, a first channel-drain structure, a second channel-drain structure, a gate dielectric layer, a gate, a first drain pad and a second drain pad. The first source is over a substrate. The first channel-drain structure is over the first source and includes a first channel and a first drain thereover. The second channel-drain structure is over the first source and substantially parallel to the first channel-drain structure and includes a second channel and a second drain thereover. The gate dielectric layer surrounds the first channel and the second channel. The gate surrounds the gate dielectric layer. The first drain pad is over and in contact with the first drain. The second drain pad is over and in contact with the second drain, in which the first drain pad and the second drain pad are separated from each other.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: June 21, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Chi Wang, Chien-Chih Lee, Tien-Wei Chiang, Ching-Wei Tsai, Chih-Ching Wang, Jon-Hsu Ho, Wen-Hsing Hsieh
  • Publication number: 20160163810
    Abstract: A gate all around (GAA) device structure, vertical gate all around (VGAA) device structure, horizontal gate all around (HGAA) device structure and fin field effect transistor (FinFET) device structure are provided. The VGAA device structure includes a substrate and an isolation structure formed in the substrate. The VGAA device structure also includes a first transistor structure formed on the substrate, and the first transistor structure includes a vertical structure. The vertical structure includes a source region, a channel region and a drain region, and the channel region is formed between the source region and the drain region. The channel region has a horizontal portion and a sloped portion sloping downward toward the isolation structure. The VGAA device structure further includes a gate stack structure wrapping around the channel region.
    Type: Application
    Filed: December 4, 2014
    Publication date: June 9, 2016
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Yu-Lien HUANG, Chin-Chi WANG
  • Publication number: 20160149019
    Abstract: Vertical gate all around devices are formed by initially forming a first doped region and a second doped region that are planar with each other. A channel layer is formed over the first doped region and the second doped region, and a third doped region is formed over the channel layer. A fourth doped region is formed to be planar with the third doped region, and the first doped region, the second doped region, the third doped region, the fourth doped region, and the channel layer are patterned to form a first nanowire and a second nanowire, which are then used to form the vertical gate all around devices.
    Type: Application
    Filed: January 9, 2015
    Publication date: May 26, 2016
    Inventors: Hong-Lin Chen, Shih-Cheng Chen, Ming-Shan Shieh, Chin-Chi Wang, Wai-Yi Lien, Chih-Hao Wang
  • Patent number: 9337258
    Abstract: A method for fabricating a fin field-effect transistor (FinFET) device includes forming a first dielectric layer over a substrate and then etching the first dielectric layer and the substrate to form a first fin and a second fin. A second dielectric layer is formed along sidewalls of the first fin and the second fin. A protection layer is deposited over the first fin and the second fin. A portion of the protection layer and the first dielectric layer on the second fin is removed and the second fin is then recessed to form a trench. A semiconductor material layer is epitaxially grown in the trench. The protection layer is removed to reveal the first fin and the second fin.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: May 10, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Wang, Ching-Wei Tsai, Chin-Chi Wang
  • Publication number: 20160079239
    Abstract: A series-connected transistor structure includes a first source, a first channel-drain structure, a second channel-drain structure, a gate dielectric layer, a gate, a first drain pad and a second drain pad. The first source is over a substrate. The first channel-drain structure is over the first source and includes a first channel and a first drain thereover. The second channel-drain structure is over the first source and substantially parallel to the first channel-drain structure and includes a second channel and a second drain thereover. The gate dielectric layer surrounds the first channel and the second channel. The gate surrounds the gate dielectric layer. The first drain pad is over and in contact with the first drain. The second drain pad is over and in contact with the second drain, in which the first drain pad and the second drain pad are separated from each other.
    Type: Application
    Filed: September 12, 2014
    Publication date: March 17, 2016
    Inventors: Chin-Chi WANG, Chien-Chih LEE, Tien-Wei CHIANG, Ching-Wei TSAI, Chih-Ching WANG, Jon-Hsu HO, Wen-Hsing HSIEH
  • Publication number: 20160020206
    Abstract: A semiconductor device includes a first transistor and a second transistor. Each of the first and second transistors includes a channel. The channel of the first transistor extends in a substantially vertical direction. The channel of the second transistor extends in a substantially horizontal direction. A method for fabricating the semiconductor device is also disclosed.
    Type: Application
    Filed: July 18, 2014
    Publication date: January 21, 2016
    Inventors: CHIN-CHI WANG, WU-PING HUANG, WUN-JIE LIN
  • Publication number: 20150179767
    Abstract: A method for fabricating a fin field-effect transistor (FinFET) device includes forming a first dielectric layer over a substrate and then etching the first dielectric layer and the substrate to form a first fin and a second fin. A second dielectric layer is formed along sidewalls of the first fin and the second fin. A protection layer is deposited over the first fin and the second fin. A portion of the protection layer and the first dielectric layer on the second fin is removed and the second fin is then recessed to form a trench. A semiconductor material layer is epitaxially grown in the trench. The protection layer is removed to reveal the first fin and the second fin.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 25, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Wang, Ching-Wei Tsai, Chin-Chi Wang
  • Patent number: 5839712
    Abstract: The present invention relates to a pen holder for holding a pen of variable diameter in a vertical or horizontal position, where the insertion part is rotatable against the base for convenient use. The present invention comprises a base and an insertion part, which is vertically rotatably mounted on the base and is made of two halves, the two halves being glidable against each other and, being pressed against each other by two springs, holding the pen in between in a vertical or a horizontal channel.
    Type: Grant
    Filed: April 3, 1997
    Date of Patent: November 24, 1998
    Inventor: Chin-Chi Wang
  • Patent number: 4906012
    Abstract: The present invention is related to a self-propelled quadrupedal toy and, more particularly to a quadrupedal toy (toy horse, dog or deer etc.) having a driving mechanism equipped with two protruding handlebars for the rider (children) to operate to let the quadrupedal toy rock or swing or rock and swing. One or two hand brake levers (control levers) are provided to let the rider to freely control the quadrupedal toy for walking forward or backward, or turning leftward or rightward, or for jogging or stopping, in a manner, similar to the motion of riding a real horse or animal.
    Type: Grant
    Filed: November 2, 1988
    Date of Patent: March 6, 1990
    Inventor: Chin-Chi Wang