Abstract: A pixel circuit is provided. In the pixel circuit, a first transistor has a first terminal coupled to a first node and a second terminal receiving a system high voltage, and the first transistor is controlled by a light emitting signal. A first terminal and a second terminal of a second transistor are respectively coupled to a second node and the first node; a control terminal of the second transistor is coupled to a third node. The third transistor is coupled between the first node and the third node and controlled by a first scan signal. A capacitor has a first terminal and a second terminal. A voltage setting circuit receives a data signal, a second scan signal, and a third scan signal. A first terminal of the light emitting device is coupled to the second node; a second terminal of the light emitting device receives a system low voltage.

Abstract: An active device array substrate includes a substrate, first and second active devices, a gate insulation layer and an insulation barrier layer. The first and second active devices respectively includes first and second gate electrodes, first and second semiconductor blocks, first and second source electrodes, and first and second drain electrodes. A film layer of the second source electrode and the second drain electrode is the same with that of the first source electrode or the first drain electrode. The gate insulation layer is located between the first gate electrode and the first semiconductor block and between the second gate electrode and the second semiconductor block. The insulation barrier layer is disposed on the gate insulation layer, and covers the first semiconductor block. The insulation barrier layer has a first through hole for one of the first source electrode and the first drain electrode contacting the first semiconductor block.

Abstract: The disclosure provides a pixel circuit for driving a light emitting diode. A second terminal of a driving transistor is coupled to a first terminal of the light emitting diode, and a control terminal of the driving transistor receives a bias voltage. A coupling switch is coupled between a first terminal and the control terminal of the driving transistor and controlled by a first selection signal to be turned on or off. A first terminal of a first switch receives a display data voltage or a reference voltage, and the first switch is controlled by a second selection signal to be turned on or off. A first terminal of a second switch is coupled to a second terminal of the first switch. A second terminal of the second switch is coupled between the second terminal of the driving transistor and the light emitting diode, and the second switch is controlled by the first selection signal to be turned on or off.

Abstract: An active device array substrate includes a substrate, first and second active devices, a gate insulation layer and an insulation barrier layer. The first and second active devices respectively includes first and second gate electrodes, first and second semiconductor blocks, first and second source electrodes, and first and second drain electrodes. A film layer of the second source electrode and the second drain electrode is the same with that of the first source electrode or the first drain electrode. The gate insulation layer is located between the first gate electrode and the first semiconductor block and between the second gate electrode and the second semiconductor block. The insulation barrier layer is disposed on the gate insulation layer, and covers the first semiconductor block. The insulation barrier layer has a first through hole for one of the first source electrode and the first drain electrode contacting the first semiconductor block.

Abstract: A pixel array substrate includes a first substrate, pixel units, data lines, scan lines, constant voltage lines, a constant voltage source, a constant voltage pad, and a conductive pattern. The first substrate has pixel regions and a peripheral region surrounding the pixel regions. The conductive pattern includes conductive lines interlaced with each other to form a net and a conductive frame that surrounds and is electrically coupled to the conductive lines. The conductive frame is in electrical contact with the constant voltage pad within the peripheral region. Each pixel region is defined by two adjacent scan lines and two adjacent data lines. A portion of one of the constant voltage lines located completely within each of the pixel regions is in electrical contact with one of the conductive lines within the pixel region. An OLED display including the pixel array substrate and another OLED are also provided.

Abstract: A pixel array substrate includes a first substrate, pixel units, data lines, scan lines, constant voltage lines, a constant voltage source, a constant voltage pad, and a conductive pattern. The first substrate has pixel regions and a peripheral region surrounding the pixel regions. The conductive pattern includes conductive lines interlaced with each other to form a net and a conductive frame that surrounds and is electrically coupled to the conductive lines. The conductive frame is in electrical contact with the constant voltage pad within the peripheral region. Each pixel region is defined by two adjacent scan lines and two adjacent data lines. A portion of one of the constant voltage lines located completely within each of the pixel regions is in electrical contact with one of the conductive lines within the pixel region. An OLED display including the pixel array substrate and another OLED are also provided.

Abstract: A pixel array includes a plurality of pixels. Each pixel has a first sub-pixel, a second sub-pixel, and a pair of third sub-pixels. The first sub-pixel of each pixel and the first sub-pixels of three adjacent pixels are arranged in a two by two array, the second sub-pixel of each pixel and the second sub-pixels of three adjacent pixels are arranged in a two by two array, and one of each of the third sub-pixels of each pixel and one of the third sub-pixels of three adjacent pixels are arranged in a two by two array. A scan line is connected to a switch unit of each of the sub-pixels in a pixel.

Abstract: A pixel array includes a plurality of pixels. Each pixel has a first sub-pixel, a second sub-pixel, and a pair of third sub-pixels. The first sub-pixel of each pixel and the first sub-pixels of three adjacent pixels are arranged in a two by two array, the second sub-pixel of each pixel and the second sub-pixels of three adjacent pixels are arranged in a two by two array, and one of each of the third sub-pixels of each pixel and one of the third sub-pixels of three adjacent pixels are arranged in a two by two array. A scan line is connected to a switch unit of each of the sub-pixels in a pixel.

Abstract: An organic light emitting diode (OLED) display apparatus includes a power circuit and a pixel. The power circuit serves to provide a first voltage. The pixel includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, and an OLED. During a programming period, a first terminal of the capacitor receives a data voltage through the turned-on first transistor, a first terminal of the second transistor receives the first voltage, a control terminal of the second transistor is coupled to a second terminal of the capacitor and coupled to a second terminal of the second transistor through the turned-on third transistor, and the power circuit regulates a voltage level or a current of the first voltage to accelerate a voltage level of the control terminal of the second transistor to reach a target voltage.

Abstract: A pixel array includes a plurality of pixels. Each pixel has a first sub-pixel, a second sub-pixel, and a pair of third sub-pixels. The first sub-pixel of each pixel and the first sub-pixels of three adjacent pixels are arranged in a two by two array, the second sub-pixel of each pixel and the second sub-pixels of three adjacent pixels are arranged in a two by two array, and one of each of the third sub-pixels of each pixel and one of the third sub-pixels of three adjacent pixels are arranged in a two by two array. A scan line is connected to a switch unit of each of the sub-pixels in a pixel.

Abstract: A pixel array includes a plurality of pixels. Each pixel has a first sub-pixel, a second sub-pixel, and a pair of third sub-pixels. The first sub-pixel of each pixel and the first sub-pixels of three adjacent pixels are arranged in a two by two array, the second sub-pixel of each pixel and the second sub-pixels of three adjacent pixels are arranged in a two by two array, and one of each of the third sub-pixels of each pixel and one of the third sub-pixels of three adjacent pixels are arranged in a two by two array. A scan line is connected to a switch unit of each of the sub-pixels in a pixel.

Abstract: An organic light emitting diode (OLED) display apparatus includes a power circuit and a pixel. The power circuit serves to provide a first voltage. The pixel includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, and an OLED. During a programming period, a first terminal of the capacitor receives a data voltage through the turned-on first transistor, a first terminal of the second transistor receives the first voltage, a control terminal of the second transistor is coupled to a second terminal of the capacitor and coupled to a second terminal of the second transistor through the turned-on third transistor, and the power circuit regulates a voltage level or a current of the first voltage to accelerate a voltage level of the control terminal of the second transistor to reach a target voltage.

Abstract: An organic light emitting diode (OLED) display apparatus includes a power circuit and a pixel. The power circuit serves to provide a first voltage. The pixel includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, and an OLED. During a programming period, a first terminal of the capacitor receives a data voltage through the turned-on first transistor, a first terminal of the second transistor receives the first voltage, a control terminal of the second transistor is coupled to a second terminal of the capacitor and coupled to a second terminal of the second transistor through the turned-on third transistor, and the power circuit regulates a voltage level or a current of the first voltage to accelerate a voltage level of the control terminal of the second transistor to reach a target voltage.

Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a channel, a gate, a source, a drain and an etching stop layer. The channel is disposed above the substrate and is located between the etching stop layer and the source. The gate is disposed on the substrate and overlapped with the channel. The source is disposed between the channel and the substrate and electrically connected to the channel. The channel is disposed between the drain and the substrate. The etching stop layer is disposed between the drain and the channel and has a first through hole exposing a portion of the channel. The drain is filled in the first through hole of the etching stop layer and is electrically connected to the channel. The drain covers the channel completely.

Abstract: A pixel array substrate includes a first substrate, pixel units, data lines, scan lines, constant voltage lines, a constant voltage source, a constant voltage pad, and a conductive pattern. The first substrate has pixel regions and a peripheral region surrounding the pixel regions. The conductive pattern includes conductive lines interlaced with each other to form a net and a conductive frame that surrounds and is electrically coupled to the conductive lines. The conductive frame is in electrical contact with the constant voltage pad within the peripheral region. Each pixel region is defined by two adjacent scan lines and two adjacent data lines. A portion of one of the constant voltage lines located completely within each of the pixel regions is in electrical contact with one of the conductive lines within the pixel region. An OLED display including the pixel array substrate and another OLED are also provided.

Abstract: A driving circuit includes a first transistor, a capacitor, a second transistor, and a charging circuit. The input terminal of the first transistor is electrically connected to a voltage source. The output terminal of the first transistor is electrically connected to an organic light-emitting diode. The first terminal of the capacitor is electrically connected to the control terminal of the first transistor. The input terminal of the second transistor is electrically connected to the second terminal of the capacitor. The control terminal of the second transistor is electrically connected to a scan line. The output terminal of the second transistor is electrically connected to the output terminal of the first transistor. The charging circuit is electrically connected to the first and second terminals of the capacitor, the scan line, and a current source.

Abstract: An organic light emitting diode (OLED) display apparatus includes a power circuit and a pixel. The power circuit serves to provide a first voltage. The pixel includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, and an OLED. During a programming period, a first terminal of the capacitor receives a data voltage through the turned-on first transistor, a first terminal of the second transistor receives the first voltage, a control terminal of the second transistor is coupled to a second terminal of the capacitor and coupled to a second terminal of the second transistor through the turned-on third transistor, and the power circuit regulates a voltage level or a current of the first voltage to accelerate a voltage level of the control terminal of the second transistor to reach a target voltage.

Abstract: An organic light emitting diode (OLED) display apparatus includes a power circuit and a pixel. The power circuit serves to provide a first voltage. The pixel includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, and an OLED. During a programming period, a first terminal of the capacitor receives a data voltage through the turned-on first transistor, a first terminal of the second transistor receives the first voltage, a control terminal of the second transistor is coupled to a second terminal of the capacitor and coupled to a second terminal of the second transistor through the turned-on third transistor, and the power circuit regulates a voltage level or a current of the first voltage to accelerate a voltage level of the control terminal of the second transistor to reach a target voltage.

Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a channel, a gate, a source, a drain and an etching stop layer. The channel is disposed above the substrate and is located between the etching stop layer and the source. The gate is disposed on the substrate and overlapped with the channel. The source is disposed between the channel and the substrate and electrically connected to the channel. The channel is disposed between the drain and the substrate. The etching stop layer is disposed between the drain and the channel and has a first through hole exposing a portion of the channel. The drain is filled in the first through hole of the etching stop layer and is electrically connected to the channel. The drain covers the channel completely.

Abstract: An organic light emitting diode display apparatus and a pixel circuit thereof are provided. The pixel circuit includes a switch unit, a capacitor, a first transistor, a second transistor, a third transistor and an organic light emitting diode. In a pre-charging period, a first terminal of the capacitor receives a data voltage through the switch unit, and a second terminal of the capacitor receives a high voltage through the turned-on first transistor. In a programming period, the first terminal of the capacitor receives the data voltage through the switch unit, and the second terminal of the capacitor receives the high voltage that is encoded through the turned-on second and third transistors. In a display period, the first terminal of the capacitor receives a ground voltage through the switch unit, and the first and third transistors are turned-off.