Patents by Inventor Chin-Hung FU

Chin-Hung FU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990507
    Abstract: A high voltage transistor structure including a substrate, a first isolation structure, a second isolation structure, a gate structure, a first source and drain region, and a second source and drain region is provided. The first isolation structure and the second isolation structure are disposed in the substrate. The gate structure is disposed on the substrate, at least a portion of the first isolation structure, and at least a portion of the second isolation structure. The first source and drain region and the second source and drain region are located in the substrate on two sides of the first isolation structure and the second isolation structure. The depth of the first isolation structure is greater than the depth of the second isolation structure.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: May 21, 2024
    Assignee: United Microelectronics Corp.
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chun-Ya Chiu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Publication number: 20240128127
    Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-l Fu, Chun-ya Chiu, Chi-Ting Wu, Chin-HUNG Chen, Yu-Hsiang Lin
  • Publication number: 20240088293
    Abstract: An n-type metal oxide semiconductor transistor includes a gate structure, two source/drain regions, two amorphous portions and a silicide. The gate structure is disposed on a substrate. The two source/drain regions are disposed in the substrate and respectively located at two sides of the gate structure, wherein at least one of the source/drain regions is formed with a dislocation. The two amorphous portions are respectively disposed in the two source/drain regions. The silicide is disposed on the two source/drain regions, wherein at least one portion of the silicide overlaps the two amorphous portions.
    Type: Application
    Filed: October 5, 2022
    Publication date: March 14, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ya Chiu, Ssu-I Fu, Chin-Hung Chen, Jin-Yan Chiou, Wei-Chuan Tsai, Yu-Hsiang Lin
  • Publication number: 20130239312
    Abstract: The present invention discloses a toilet deodorization device which belongs to sanitary equipment. An upper side at a rear part of a sitting-type toilet or a squat toilet in a bathroom is pre-built with a hole (by a conventional drill-and-cut technology) to install a connector of the deodorization device. The connector is next connected to an inner vent pipe. Through an air extractor box, a bad odor which is formed when a user is excreting is sucked in and sent to an outdoor structure along a one-way passage, so that the user can be prevented from being contaminated by the bad odor and air in the bathroom can be kept fresh and clean.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 19, 2013
    Inventors: Shan-Chi FU, Chin-Hung FU