Patents by Inventor Chin-Lung Yeh
Chin-Lung Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11962847Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.Type: GrantFiled: November 9, 2022Date of Patent: April 16, 2024Assignee: MEDIATEK INC.Inventors: Chia-Hao Chang, You-Tsai Jeng, Kai-Wen Yeh, Yi-Cheng Chen, Te-Chuan Wang, Kai-Wen Cheng, Chin-Lung Lin, Tai-Lai Tung, Ko-Yin Lai
-
Patent number: 11948837Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.Type: GrantFiled: August 30, 2021Date of Patent: April 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ching-Fu Yeh, Chin-Lung Chung, Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang, Ming-Han Lee
-
Patent number: 11742566Abstract: An antenna structure and a mobile device including the same are provided. The antenna structure is arranged on a metal cover with an opening slot, and includes a radiator, a feeding part, a grounding element, a grounding parasitic element, an extending parasitic element, a substrate, and a matching circuit. The radiator extends along a first direction, and the feeding part is connected to the radiator and extends towards a second direction. The grounding parasitic element includes a branch part and a parasitic element body. The branch part extends from a grounding point towards the opening slot. The parasitic element body is connected to the grounding element through the branch part and extends towards a first direction. The extending parasitic element extends along the first direction. The matching circuit is electrically connected to the radiator, the grounding element, the grounding parasitic element, and the extending parasitic element.Type: GrantFiled: March 10, 2022Date of Patent: August 29, 2023Assignee: WISTRON NEWEB CORPORATIONInventors: Yuan-Chia Hsu, Chin-Lung Yeh, Wei-Shin Chen
-
Publication number: 20230110612Abstract: An antenna structure and a mobile device including the same are provided. The antenna structure is arranged on a metal cover with an opening slot, and includes a radiator, a feeding part, a grounding element, a grounding parasitic element, an extending parasitic element, a substrate, and a matching circuit. The radiator extends along a first direction, and the feeding part is connected to the radiator and extends towards a second direction. The grounding parasitic element includes a branch part and a parasitic element body. The branch part extends from a grounding point towards the opening slot. The parasitic element body is connected to the grounding element through the branch part and extends towards a first direction. The extending parasitic element extends along the first direction. The matching circuit is electrically connected to the radiator, the grounding element, the grounding parasitic element, and the extending parasitic element.Type: ApplicationFiled: March 10, 2022Publication date: April 13, 2023Inventors: YUAN-CHIA HSU, CHIN-LUNG YEH, WEI-SHIN CHEN
-
Patent number: 11419206Abstract: A circuit board structure for improving isolation is provided. The circuit board structure can increase the isolation by adding a section of floating metal between two signal transmission lines and adjusting the distance between the floating metal and the two signal transmission lines.Type: GrantFiled: September 8, 2021Date of Patent: August 16, 2022Assignee: WISTRON NEWEB CORPORATIONInventors: Yuan-Chia Hsu, Chin-Lung Yeh
-
Publication number: 20220159823Abstract: A circuit board structure for improving isolation is provided. The circuit board structure can increase the isolation by adding a section of floating metal between two signal transmission lines and adjusting the distance between the floating metal and the two signal transmission lines.Type: ApplicationFiled: September 8, 2021Publication date: May 19, 2022Inventors: YUAN-CHIA HSU, CHIN-LUNG YEH
-
Patent number: 8007987Abstract: A manufacturing method of asymmetric bumps is provided. First, a substrate is provided. A film layer is then formed on the substrate. Next, a complex photomask including at least one transparent region, a number of opaque regions, and a number of semi-transparent regions is provided. Each of the semi-transparent regions is disposed between two adjacent opaque regions, and at least one light-shielding pattern is randomly disposed in each of the semi-transparent regions. The film layer is then patterned with use of the complex photomask, and multiple asymmetric bumps are formed on the substrate. By using the complex photomask, manufacturing steps of the asymmetric bumps can be reduced. Besides, a manufacturing method of a pixel structure having the above-mentioned asymmetric bumps is also provided.Type: GrantFiled: December 19, 2008Date of Patent: August 30, 2011Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Te-Yu Chen, Chin-Lung Yeh, Yu-Fang Wang
-
Patent number: 7999902Abstract: A liquid crystal display panel includes a first transparent substrate, a second transparent substrate opposite to the first transparent substrate, and a sealant disposed therebetween. The first transparent substrate includes a peripheral region, and a plurality of conductive lines disposed in the peripheral region. The conductive lines include a plurality of transparent conductive lines and non-transparent conductive lines. The sealant is disposed in the peripheral region.Type: GrantFiled: January 14, 2009Date of Patent: August 16, 2011Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Te-Yu Chen, Chin-Lung Yeh, Yu-Fang Wang
-
Publication number: 20100104956Abstract: A manufacturing method of asymmetric bumps is provided. First, a substrate is provided. A film layer is then formed on the substrate. Next, a complex photomask including at least one transparent region, a number of opaque regions, and a number of semi-transparent regions is provided. Each of the semi-transparent regions is disposed between two adjacent opaque regions, and at least one light-shielding pattern is randomly disposed in each of the semi-transparent regions. The film layer is then patterned with use of the complex photomask, and multiple asymmetric bumps are formed on the substrate. By using the complex photomask, manufacturing steps of the asymmetric bumps can be reduced. Besides, a manufacturing method of a pixel structure having the above-mentioned asymmetric bumps is also provided.Type: ApplicationFiled: December 19, 2008Publication date: April 29, 2010Applicant: Chunghwa Picture Tubes, LTD.Inventors: Te-Yu Chen, Chin-Lung Yeh, Yu-Fang Wang
-
Publication number: 20100085526Abstract: A liquid crystal display panel includes a first transparent substrate, a second transparent substrate opposite to the first transparent substrate, and a sealant disposed therebetween. The first transparent substrate includes a peripheral region, and a plurality of conductive lines disposed in the peripheral region. The conductive lines include a plurality of transparent conductive lines and non-transparent conductive lines. The sealant is disposed in the peripheral region.Type: ApplicationFiled: January 14, 2009Publication date: April 8, 2010Inventors: Te-Yu Chen, Chin-Lung Yeh, Yu-Fang Wang
-
Patent number: 7675088Abstract: A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a number of scan lines and a number of source lines are disposed on the substrate and define a number of pixel regions. A number of the storage capacitance lines are disposed on the substrate in a direction extending along the scan lines and across the pixel regions, wherein each of the storage capacitance lines is essentially perpendicular to each of the source lines and to form a cross portion. A number of patterned thin films are disposed on the storage capacitance lines and above the cross portion.Type: GrantFiled: October 22, 2008Date of Patent: March 9, 2010Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Jun-Yao Huang, Kuang-Cheng Fu, Jen-Chieh Lin, Chin-Lung Yeh
-
Publication number: 20090295670Abstract: A flat antenna is used for a cable inputting a signal. The flat antenna comprises a base board, a radiator element, a filter unit, and a ground element wherein the radiator element, the filter unit, and the ground element are disposed on the board. The filter unit is used for eliminating or keeping the specific range of the frequency.Type: ApplicationFiled: February 13, 2009Publication date: December 3, 2009Applicant: WISTRON NEWEB CORP.Inventors: Feng-Chi Eddie Tsai, Yu-Chuan Su, Chin-Lung Yeh, Yin-Ping Wu
-
Publication number: 20090061553Abstract: A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a number of scan lines and a number of source lines are disposed on the substrate and define a number of pixel regions. A number of the storage capacitance lines are disposed on the substrate in a direction extending along the scan lines and across the pixel regions, wherein each of the storage capacitance lines is essentially perpendicular to each of the source lines and to form a cross portion. A number of patterned thin films are disposed on the storage capacitance lines and above the cross portion.Type: ApplicationFiled: October 22, 2008Publication date: March 5, 2009Applicant: Chunghwa Picture Tubes, LTD.Inventors: Jun-Yao Huang, Kuang-Cheng Fu, Jen-Chieh Lin, Chin-Lung Yeh
-
Publication number: 20080054264Abstract: A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a plurality of scan lines and a plurality of source lines are disposed on the substrate and define a plurality of pixel regions. A plurality of the storage capacitance lines are disposed on the substrate in a direction extending along the scan lines and across the pixel regions, wherein each of the storage capacitance lines is essentially perpendicular to each of the source lines and to form a cross portion. A plurality of patterned thin films are disposed on the storage capacitance lines and above the cross portion.Type: ApplicationFiled: January 4, 2007Publication date: March 6, 2008Inventors: Jun-Yao Huang, Kuang-Cheng Fu, Jen-Chieh Lin, Chin-Lung Yeh
-
Patent number: 4453970Abstract: N-[Heterocyclicaminocarbonyl]-8-quinolinesulfonamides such as N-[(4,6-dimethoxy-1,3,5-triazin-2-yl)aminocarbonyl]-8-quinolinesulfonamide or N-[(4,6-dimethoxypyrimidin-2-yl)aminocarbonyl]-8-quinolinesulfonamide are useful for plant growth retardation, brush control and weed control in crops.Type: GrantFiled: September 23, 1982Date of Patent: June 12, 1984Assignee: E. I. Du Pont de Nemours and CompanyInventors: George Levitt, Chin-Lung Yeh, John C. Budzinski
-
Patent number: 4369320Abstract: N-[Heterocyclicaminocarbonyl]-8-quinolinesulfonamides such as N-[(4,6-dimethoxy-1,3,5-triazin-2-yl)amino-carbonyl]-8-quinolinesulfonamid e or N-[(4,6-dimethoxy-pyrimidin-2-yl)aminocarbonyl]-8-quinolinesulfonamide are useful for plant growth retardation, brush control and weed control in crops.Type: GrantFiled: September 3, 1981Date of Patent: January 18, 1983Assignee: E. I. Du Pont de Nemours and CompanyInventors: George Levitt, Chin-Lung Yeh, John C. Budzinski