Patents by Inventor Chin-Wei HSU

Chin-Wei HSU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250138050
    Abstract: A vertical probe includes opposite first and third sides, and opposite second and fourth sides. The third and fourth sides extend in a planar manner from a body to a tip portion. The first and second sides include first and second upper plane segments at the body, first and second transition segments at the tip portion, and first and second lower plane segments closer to the third and fourth sides than the first and second upper plane segments are, respectively. The first and second transition segments gradually approach the third and fourth sides as they extend from the first and second upper plane segments to the first and second lower plane segments. The first transition and lower plane segments are realized by laser processing. The vertical probe can contact small conductive contacts with good current resistance, structural strength, lifespan, and processing accuracy. When applied to a probe head, breaking or shifting position of the tip portion due to vertical movement can be avoided.
    Type: Application
    Filed: October 28, 2024
    Publication date: May 1, 2025
    Applicant: MPI CORPORATION
    Inventors: CHIN-YI LIN, HSIEN-TA HSU, CHE-WEI LIN, CHIH-MING HUANG
  • Publication number: 20250133180
    Abstract: A teleprompter includes a connecting bracket, a prompting optical mechanism, a transferring board, and a supporting seat. The connecting bracket is used to support a monitor assembly. The prompting optical mechanism includes a main housing, a front frame, a rear frame, and a splitter. The transferring board is detachably connected to the rear frame. The transferring board has a photography opening. The supporting seat has an assembly board, and a horizontal carrier. The horizontal carrier is connected to a top end of the assembly board. The assembly board is connected to one side of the connecting bracket, and can be adjusted to different positions of the connecting bracket. Therefore, the horizontal carrier can be adjusted to different heights corresponding with the photography opening of the transferring board.
    Type: Application
    Filed: February 21, 2024
    Publication date: April 24, 2025
    Inventors: YU-CHENG CHANG, CHIN-WEI HSU, SHANG-FU WANG, CHIA-HSIN TSAI
  • Publication number: 20250126702
    Abstract: A carrying structure is provided and is defined with a main area and a peripheral area adjacent to the main area, where a plurality of packaging substrates are disposed in the main area in an array manner, a plurality of positioning holes are disposed in the peripheral area, and a plurality of positioning traces are formed along a part of the edges of the plurality of positioning holes, such that the plurality of positioning traces are formed with notches. Therefore, a plurality of positioning pins on the machine can be easily aligned and inserted into the plurality of positioning holes by the design of the plurality of positioning traces.
    Type: Application
    Filed: December 23, 2024
    Publication date: April 17, 2025
    Inventors: Chin-Wei Hsu, Jui-Kun Wang, Shu-Yu Ko, Fang-Wei Chang, Hsiu-Fang Chien
  • Publication number: 20250126305
    Abstract: A server comprising a circuitry, wherein the circuitry is configured to perform: generating a virtual chatbot via a machine learning model; determining an emotion of the virtual chatbot; feeding information of the emotion into the machine learning model; and setting the virtual chatbot in a live streaming room. According to the present disclosure, the communication between the viewers and AI V-Liver may be improved. Moreover, the quality of the live streaming platform with AI V-Livers may also be improved. Therefore, the user experience may also be improved.
    Type: Application
    Filed: September 13, 2024
    Publication date: April 17, 2025
    Inventors: Yung-Chi HSU, Chi-Wei LIN, Chin-Wei LIU, Chia-Han CHANG, Hsing-Yu TSAI
  • Patent number: 12261610
    Abstract: A frequency locked loop circuit, comprising an operational circuit, a first impedance circuit, a second impedance circuit, a switching circuit and a frequency generation circuit. The operational circuit is configured to output an operational signal according to a voltage difference between a positive terminal and a negative terminal. The switching circuit is configured to periodically conduct the negative terminal to one of the first impedance node and the second impedance node, and periodically conduct the positive terminal to the other one of the first impedance node and the second impedance node. The frequency generation circuit is configured to periodically sample the operational signal to generate a sample signal to generate a clock signal. An operational frequency of the operational signal is an integer multiple of a sampling frequency of the frequency generation circuit.
    Type: Grant
    Filed: October 29, 2023
    Date of Patent: March 25, 2025
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Chin-Tung Chan, Yan-Ting Wang, Ren-Hong Luo, Chih-Wen Chen, Hao-Che Hsu, Li-Wei Lin
  • Publication number: 20250081730
    Abstract: A display may include an array of pixels such as light-emitting diode pixels. The pixels may include multiple circuitry decks that each include one or more circuit components such as transistors, capacitors, and/or resistors. The circuitry decks may be vertically stacked. Each circuitry deck may include a planarization layer formed from a siloxane material that conforms to underlying components and provides a planar upper surface. In this way, circuitry components may be vertically stacked to mitigate the size of each pixel footprint. The circuitry components may include capacitors that include both a high-k dielectric layer and a low-k dielectric layer. The display pixel may include a via with a width of less than 1 micron.
    Type: Application
    Filed: June 26, 2024
    Publication date: March 6, 2025
    Inventors: Andrew Lin, Alper Ozgurluk, Chao Liang Chien, Cheuk Chi Lo, Chia-Yu Chen, Chien-Chung Wang, Chih Pang Chang, Chih-Hung Yu, Chih-Wei Chang, Chin Wei Hsu, ChinWei Hu, Chun-Kai Tzeng, Chun-Ming Tang, Chun-Yao Huang, Hung-Che Ting, Jung Yen Huang, Lungpao Hsin, Shih Chang Chang, Tien-Pei Chou, Wen Sheng Lo, Yu-Wen Liu, Yung Da Lai
  • Publication number: 20250056078
    Abstract: A server for handling interaction in a live streaming platform, comprising one or a plurality of processors, wherein the one or plurality of processors execute a machine-readable instruction to perform: receiving a character data corresponding to a character; feeding the character data into a machine learning model to generate a virtual chatbot in a live streaming room; setting the virtual chatbot in the live streaming room; wherein the virtual chatbot is configured to provide assistance to a livestreamer or viewers in the live streaming room. According to the present disclosure, the AI chatbot with a character may increase the interaction and fun in the live streaming room. Moreover, the monitoring and handling of the atmosphere in the live streaming may also be partially or entirely entrusted to the AI chatbot. Therefore, the user experience may be improved.
    Type: Application
    Filed: May 30, 2024
    Publication date: February 13, 2025
    Inventors: Yung-Chi HSU, Chun-Sheng HSU, Tsung-Tai SHIH, Chin-Wei LIU, Che-Wei HU
  • Patent number: 12224285
    Abstract: An integrated circuit includes a set of active regions, a first contact, a set of gates, a first and second conductive line and a first and second via. The set of active regions extends in a first direction, and is on a first level. The first contact extends in a second direction, is on a second level, and overlaps at least a first active region. The set of gates extends in the second direction, overlaps the set of active regions, and is on a third level. The first conductive line and the second conductive line extend in the first direction, overlap the first contact, and are on a fourth level. The first via electrically couples the first contact and the first conductive line together. The second via electrically couples the first contact and the second conductive line together.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: February 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Wei Hsu, Shun Li Chen, Ting Yu Chen, Hui-Zhong Zhuang, Chih-Liang Chen
  • Patent number: 12219693
    Abstract: A carrying structure is defined with a main area and a peripheral area adjacent to the main area, where a plurality of packaging substrates are disposed in the main area in an array manner, a plurality of positioning holes are disposed in the peripheral area, and a plurality of positioning traces are formed along a part of the edges of the plurality of positioning holes, such that the plurality of positioning traces are formed with notches.
    Type: Grant
    Filed: November 2, 2022
    Date of Patent: February 4, 2025
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chin-Wei Hsu, Jui-Kun Wang, Shu-Yu Ko, Fang-Wei Chang, Hsiu-Fang Chien
  • Publication number: 20240411968
    Abstract: Certain aspects of the present disclosure provide techniques and apparatus for evaluating electronic circuit designs. A directed graph representing a netlist design for an electrical circuit is accessed, the netlist design comprising a plurality of electronic components and a plurality of connections among the plurality of electronic components. A node in the directed graph is selected, the node corresponding to a register that receives input from one or more of the plurality of electronic components in the netlist design. A subgraph is generated for the node, based on the directed graph, comprising identifying a connectivity cone ending at the first register. A functional embedding is generated for the subgraph based on a trained encoder machine learning model. A predicted performance characteristic of the netlist design is generated based at least in part on the functional embedding.
    Type: Application
    Filed: June 9, 2023
    Publication date: December 12, 2024
    Inventors: Gokce SARAR, Ryan Michael CAREY, Arnav BALLANI, Bernard BOURON, Chandram KOTTURI, Chin-Wei HSU, Akshay Sanjay SARODE, Romain LEPERT, Michael DEFFERRARD, Onur ATAN, Lindsey Makana KOSTAS
  • Publication number: 20240211012
    Abstract: Dynamic management method and system for an active state power management (ASPM) mechanism are provided. The method is applicable to a peripheral component interconnect express (PCIe) transmission architecture that includes a host and a PCIe downstream component. The method includes: configuring the PCIe downstream component to perform: determining whether data transmission status between a PCIe upstream component and the PCIe downstream component is in a busy state, a stable idle state or a temporary state; in response to determining that the data transmission status is in the busy state, forcibly disabling the ASPM function; in response to determining that the data transmission state is in the stable idle state, forcibly enabling the ASPM function; and in response to determining that the data transmission state is in the temporary state, determining whether the data transmission state is the busy state, the stable idle state or the temporary state again.
    Type: Application
    Filed: December 21, 2023
    Publication date: June 27, 2024
    Inventors: QIN ZHU, JUN-JIANG HUANG, CHANG-CHUN LI, CHUN-HAO LIN, SUNG-KAO LIU, XING WANG, CHIN-WEI HSU, CHUN-WEI GU
  • Publication number: 20240056523
    Abstract: A method for generating a user scenario of an electronic device includes detecting a real part and an imaginary part of an input impedance of each antenna of the electronic device, using a plurality of sensors of the electronic device to generate a plurality of sensing signals, and entering at least the real part and the imaginary part of the input impedance of each antenna, and the plurality of sensing signals to a machine learning model to output the user scenario.
    Type: Application
    Filed: July 13, 2023
    Publication date: February 15, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chin-Wei Hsu, Po-Yu Chen, Po-Chung Hsiao, Yen-Liang Chen
  • Publication number: 20240049382
    Abstract: A carrying structure is provided and is defined with a main area and a peripheral area adjacent to the main area, where a plurality of packaging substrates are disposed in the main area in an array manner, a plurality of positioning holes are disposed in the peripheral area, and a plurality of positioning traces are formed along a part of the edges of the plurality of positioning holes, such that the plurality of positioning traces are formed with notches. Therefore, a plurality of positioning pins on the machine can be easily aligned and inserted into the plurality of positioning holes by the design of the plurality of positioning traces.
    Type: Application
    Filed: November 2, 2022
    Publication date: February 8, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chin-Wei Hsu, Jui-Kun Wang, Shu-Yu Ko, Fang-Wei Chang, Hsiu-Fang Chien
  • Publication number: 20230387128
    Abstract: An integrated circuit includes a set of active regions, a first contact, a set of gates, a first and second conductive line and a first and second via. The set of active regions extends in a first direction, and is on a first level. The first contact extends in a second direction, is on a second level, and overlaps at least a first active region. The set of gates extends in the second direction, overlaps the set of active regions, and is on a third level. The first conductive line and the second conductive line extend in the first direction, overlap the first contact, and are on a fourth level. The first via electrically couples the first contact and the first conductive line together. The second via electrically couples the first contact and the second conductive line together.
    Type: Application
    Filed: May 31, 2022
    Publication date: November 30, 2023
    Inventors: Chin-Wei HSU, Shun Li CHEN, Ting Yu CHEN, Hui-Zhong ZHUANG, Chih-Liang CHEN
  • Publication number: 20230307488
    Abstract: An electronic device may have a display with an array of inorganic light-emitting diodes. The array of inorganic light-emitting diodes may be overlapped by a polarizer layer such as a circular polarizer. Alternatively, the display may be a polarizer-free display without any polarizer layer over the array of inorganic light-emitting diodes. Each inorganic light-emitting diode may be surrounded by a diffuser that redirects edge-emissions towards a viewer. A top diffuser, a color filter layer, a microlens, and/or a microlens with color filtering and/or diffusive properties may also optionally overlap each inorganic light-emitting diode. The inorganic light-emitting diodes may have reflective sidewalls to mitigate edge-emissions. In this type of arrangement, the array of inorganic light-emitting diodes may be coplanar with one or more opaque masking layers. To mitigate reflections, the display may include two opaque masking layers having differing properties or a single phase separated opaque masking layer.
    Type: Application
    Filed: January 30, 2023
    Publication date: September 28, 2023
    Inventors: Young Cheol Yang, Young Seok Kim, Aaron L Holsteen, Cheng Cheng, Chin Wei Hsu, Hsin I Lu, Ileana G. Rau, Jaein Choi, James M Perkins, James P Ibbetson, Joy M Johnson, Jui-Chih Liao, Steven E Molesa, Sunggu Kang, Yang Deng, Zhibing Ge
  • Publication number: 20230307590
    Abstract: An electronic device may have a display with an array of inorganic light-emitting diodes. The array of inorganic light-emitting diodes may be overlapped by a polarizer layer such as a circular polarizer. Alternatively, the display may be a polarizer-free display without any polarizer layer over the array of inorganic light-emitting diodes. Each inorganic light-emitting diode may be surrounded by a diffuser that redirects edge-emissions towards a viewer. A top diffuser, a color filter layer, a microlens, and/or a microlens with color filtering and/or diffusive properties may also optionally overlap each inorganic light-emitting diode. The inorganic light-emitting diodes may have reflective sidewalls to mitigate edge-emissions. In this type of arrangement, the array of inorganic light-emitting diodes may be coplanar with one or more opaque masking layers. To mitigate reflections, the display may include two opaque masking layers having differing properties or a single phase separated opaque masking layer.
    Type: Application
    Filed: January 30, 2023
    Publication date: September 28, 2023
    Inventors: Young Cheol Yang, Young Seok Kim, Aaron L Holsteen, Cheng Cheng, Chin Wei Hsu, Hsin I Lu, Ileana G. Rau, Jaein Choi, James M. Perkins, James P. Ibbetson, Joy M. Johnson, Jui-Chih Liao, Steven E. Molesa, Sunggu Kang, Yang Deng, Zhibing Ge
  • Publication number: 20230144874
    Abstract: A mobile communication device including a Radio Frequency (RF) device and a controller is provided. The controller provides a Packet-Switched (PS) data service using a first subscriber identity via the RF device, establishes a Radio Resource Control (RRC) connection using a second subscriber identity via the RF device to enable the mobile communication device to enter an RRC connected mode associated with the second subscriber identity, receives a notification of an incoming Circuit-Switched (CS) Mobile Terminated (MT) call for the second subscriber identity via the RF device, and (after receiving the notification of the incoming CS MT call for the second subscriber identity) keeps the mobile communication device in the RRC connected mode associated with the second subscriber identity while providing the PS data service using the first subscriber identity.
    Type: Application
    Filed: January 11, 2023
    Publication date: May 11, 2023
    Inventors: Yu-Hua HUANG, Chin-Wei HSU
  • Publication number: 20230092986
    Abstract: An electronic device may include a display and an optical sensor formed underneath the display. A pixel removal region on the display may at least partially overlap with the sensor. The pixel removal region may include a plurality of non-pixel regions each of which is devoid of thin-film transistors. The plurality of non-pixel regions is configured to increase the transmittance of light through the display to the sensor. In addition to removing thin-film transistors in the pixel removal region, additional layers in the display stack-up may be removed. In particular, a cathode layer, polyimide layer, and/or substrate in the display stack-up may be patterned to have an opening in the pixel removal region. A polarizer may be bleached in the pixel removal region for additional transmittance gains. The cathode layer may be removed using laser ablation with a spot laser or blanket illumination.
    Type: Application
    Filed: February 2, 2021
    Publication date: March 23, 2023
    Inventors: Warren S. Rieutort-Louis, Meng-Huan Ho, Abbas Jamshidi Roudbari, Chih Jen Yang, Chin Wei Hsu, Jae Won Choi, Jean-Pierre S. Guillou, Ming Xu, Rui Liu, Yi Qiao, Yu-Wen Liu, Yuchi Che, Yue Cui
  • Patent number: 11582822
    Abstract: A mobile communication device including a Radio Frequency (RF) device and a controller is provided. The controller activates a predetermine Application (APP), and provides a Packet-Switched (PS) data service for the predetermined APP using a first subscriber identity via the RF device. Also, the controller establishes a Radio Resource Control (RRC) connection using a second subscriber identity via the RF device to enable the mobile communication device to enter an RRC connected mode after the predetermined APP is activated, and keeps the mobile communication device in the RRC connected mode associated with the second subscriber identity while providing the PS data service for the predetermined APP using the first subscriber identity.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: February 14, 2023
    Assignee: MEDIATEK INC.
    Inventors: Yu-Hua Huang, Chin-Wei Hsu
  • Patent number: 11496174
    Abstract: When the ultra-low power mm-scale sensor node does not have a crystal oscillator and phase-lock loop, it inevitably exhibits significant carrier frequency offset (CFO) and sampling frequency offset (SFO) with respect to the reference frequencies in the gateway. This disclosure enables efficient real-time calculation of accurate SFO and CFO at the gateway, thus the ultra-low power mm-scale sensor node can be realized without a costly and bulky clock reference crystal and also power-hungry phase lock loop. In the proposed system, the crystal-less sensor starts transmission with repetitive RF pulses with a constant interval, followed by the data payload using pulse-position modulation (PPM). A proposed algorithm uses a two-dimensional (2D) fast Fourier transform (FFT) based process that identifies the SFO and CFO at the same time to establish successful wireless communication between the gateway and crystal-less sensor nodes.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: November 8, 2022
    Assignee: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Hun-Seok Kim, Chin-Wei Hsu, David T. Blaauw, Benjamin Kempke