Abstract: A display is provided that includes an array of display pixels that receive data signals from display driver circuitry and that receive control signals from gate driver circuitry. The gate driver circuitry may include a chain of row driver circuits. Each row driver circuit in the chain of row driver circuits may include a master driver stage, a slave driver stage, and associated control circuitry configured to receive a clock signal and a pulse signal from a preceding row driver in the chain. The master driver stage may be biased using fixed nominal power supply voltages, whereas the slave driver stage may be biased using dynamically adjustable power supply voltages that are optionally reduced relative to that of the nominal power supply voltages. One or more of the master and slave driver stages may be a bootstrapping driver stage having a bootstrapping capacitor.

Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.

Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.

Abstract: A display may include an array of organic light-emitting diode display pixels having transistors characterized by threshold voltages subject to transistor variations. Compensation circuitry may be used to sense a current from selected display pixels. A display pixel may include a drive transistor, a gate setting transistor for driving a reference voltage onto the gate terminal of the drive transistor, a data loading and current sensing transistor for connecting the drive transistor to a data/current-sensing line, a light-emitting diode, an emission control transistor coupled between the drive transistor and the diode, and an anode resetting transistor for selectively resetting the anode terminal of the diode. During in-frame current sensing operations, the emission control transistor may be turned off to decouple the drive transistor from the diode, thereby blocking off any residue current and lateral leakage current that may be present at the diode.

Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.

Abstract: A display may include an array of organic light-emitting diode display pixels having transistors characterized by threshold voltages subject to transistor variations. Compensation circuitry may be used to measure a transistor threshold voltage for a pixel. The threshold voltage may be sampled by controlling the pixel to sample the threshold voltage onto a capacitor at the pixel. The pixel may include at least one semiconducting-oxide transistor, silicon transistors, and a light-emitting diode. The diode may be coupled to a data line that can be used for both data loading and compensation sensing operations. Reset operations may be performed after data programming and before emission to reset the anode voltage for the diode.

Abstract: A display may include an array of organic light-emitting diode display pixels having transistors characterized by threshold voltages subject to transistor variations. Compensation circuitry may be used to sense a current from selected display pixels. A display pixel may include a drive transistor, a gate setting transistor for driving a reference voltage onto the gate terminal of the drive transistor, a data loading and current sensing transistor for connecting the drive transistor to a data/current-sensing line, a light-emitting diode, an emission control transistor coupled between the drive transistor and the diode, and an anode resetting transistor for selectively resetting the anode terminal of the diode. During pixel conditioning and current sensing operations, the anode resetting transistor may be constantly turned on to ensure that there is no voltage perturbation at the source terminal of the drive transistor, which can help prevent hysteresis-induced current sensing error.

Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.

Abstract: A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

Abstract: An apparatus receives current image frame data and data relating to at least one previous image frame for an electronic display. One or more parameters related to hysteresis of transistors in the electronic display are sensed. A correlation device, such as a look-up table, receives the sensed parameter or parameters and the data relating to one or more image frames, and uses this information, at least in part, to output an appropriate compensation signal for the current image frame data. The compensated current image frame data may then be supplied to the electronic display to reduce or eliminate the effects of hysteresis on the displayed image.

Abstract: Techniques for implementing and/or operating an electronic device, which includes a display pixel that emits light to facilitate displaying an image during an emission period and a data driver coupled to the display pixel via a data line. The data driver generates a data line voltage signal based on image data that indicates target luminance of the display pixel in the image and supplies the data line voltage signal to the data line during a non-emission period preceding the emission period to facilitate writing the image to the display pixel. Additionally, the data driver supplies an intermediate voltage greater than a ground voltage to the data line during the emission period in which the image is displayed to facilitate reducing luminance variation in the image resulting from a leakage current flowing between an internal node of the display pixel and the data line during the emission period.

Abstract: A display may include an array of organic light-emitting diode display pixels having transistors characterized by threshold voltages subject to transistor variations. Compensation circuitry may be used to measure a transistor threshold voltage for a pixel. The threshold voltage may be sampled by controlling the pixel to sample the threshold voltage onto a capacitor at the pixel. The pixel may include at least one semiconducting-oxide transistor, silicon transistors, and a light-emitting diode. The diode may be coupled to a data line that can be used for both data loading and compensation sensing operations. Reset operations may be performed after data programming and before emission to reset the anode voltage for the diode.

Abstract: A system includes an electronic display panel that has a plurality of pixels configured to depict frames of image data. The electronic display also includes display driver circuitry configured to, for a first frame of image data representing first image content, modify a gate-to-source voltage of a transistor of a first pixel of the plurality of pixels to a content-dependent first gate-to-source voltage. Additionally, after modifying the gate-to-source voltage to the first gate-to-source voltage, the display driver circuitry is configured to program the first pixel by modifying the gate-to-source voltage to a gate-to-source programming voltage that differs from the first gate-to-source voltage and is based on image data associated with the pixel from the first frame of the image data. Furthermore, the display driver circuitry is configured to cause the plurality of pixels to emit light.

Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

Abstract: The present disclosure relates to an electronic device that includes a display that has a plurality of scan lines. The display also includes a first data line that has a first number of pixels. The first data line forms a first number of crossovers with the plurality of scan lines. Additionally, the display includes a second data line that has a second number of pixels that is different than the first number of pixels. The second data line forms a second number of crossovers with the plurality of scan lines that is equal to the first number of crossovers.

Abstract: An organic light-emitting diode display may have thin-film transistor circuitry formed on a substrate. The display and substrate may have rounded corners. A pixel definition layer may be formed on the thin-film transistor circuitry. Openings in the pixel definition layer may be provided with emissive material overlapping respective anodes for organic light-emitting diodes. A cathode layer may cover the array of pixels. A ground power supply path may be used to distribute a ground voltage to the cathode layer. The ground power supply path may be formed from a metal layer that is shorted to the cathode layer using portions of a metal layer that forms anodes, may be formed from a mesh shaped metal pattern, may have L-shaped path segments, and may include laser-deposited metal on the cathode layer. Data lines may be formed from metal layers in the active area to accommodate the rounded corners of the display.

Abstract: Systems and methods are provided for differential sensing (DS), difference-differential sensing (DDS), correlated double sampling (CDS), correlated-correlated double sampling (CDS-CDS) and/or programmable capacitor matching to reduce display panel sensing noise. An electronic device may include one or more processors that generate image data according to sensing operations. The one or more processors may reference a sensing pattern as part of sensing operations. Applying test sensing signals based on the sensing pattern may help reduce error associated with sensing operations.

Abstract: A display has rows and columns of pixels (22). A data line (Dn) in each column provides image data signals to the pixels of that column. Each row has first and second control lines (select[m], monitor[m]) coupled to the gates of first and second respective transistors (SE, MO) in each pixel. A third transistor in each pixel serves as a drive transistor (DR) and is coupled in series with a light-emitting diode (30) between positive and ground power supply voltages (VDD, VSS). A display driver circuitry in the display characterizes each of the light-emitting diodes in a column using the data line in an adjacent column from that light-emitting diode. Each of the drive transistors in a column is characterized using the data line in that column and the data line in an adjacent column.