Abstract: A display is provided that includes an array of display pixels that receive data signals from display driver circuitry and that receive control signals from gate driver circuitry. The gate driver circuitry may include a chain of row driver circuits. Each row driver circuit in the chain of row driver circuits may include a master driver stage, a slave driver stage, and associated control circuitry configured to receive a clock signal and a pulse signal from a preceding row driver in the chain. The master driver stage may be biased using fixed nominal power supply voltages, whereas the slave driver stage may be biased using dynamically adjustable power supply voltages that are optionally reduced relative to that of the nominal power supply voltages. One or more of the master and slave driver stages may be a bootstrapping driver stage having a bootstrapping capacitor.

Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.

Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: An organic light-emitting diode display may have thin-film transistor circuitry formed on a substrate. The display and substrate may have rounded corners. A pixel definition layer may be formed on the thin-film transistor circuitry. Openings in the pixel definition layer may be provided with emissive material overlapping respective anodes for organic light-emitting diodes. A cathode layer may cover the array of pixels. A ground power supply path may be used to distribute a ground voltage to the cathode layer. The ground power supply path may be formed from a metal layer that is shorted to the cathode layer using portions of a metal layer that forms anodes for the diodes, may be formed from a mesh shaped metal pattern, may have L-shaped path segments, may include laser-deposited metal on the cathode layer, and may have other structures that facilitate distribution of the ground power supply.

Abstract: An optical duplexer adapted to convert dual fiber bidirectional transmission into single fiber bidirectional wavelength or wavelength group transmission is provided. The optical duplexer includes an optical circulator, a first male fiber connector, a second female fiber connector, and a third male fiber connector. The optical circulator includes a first port, a second port, and a third port. The first port receives a first light signal. The second port transmits the first light signal and receives a second light signal. The third port transmits the second light signal. The first male fiber connector couples to the first port. The second female fiber connector couples to the second port. The third male fiber connector couples to the third port.

Abstract: A display may include an array of organic light-emitting diode display pixels having transistors characterized by threshold voltages subject to transistor variations. Compensation circuitry may be used to measure a transistor threshold voltage for a pixel. The threshold voltage may be sampled by controlling the pixel to sample the threshold voltage onto a capacitor at the pixel. The pixel may include at least one semiconducting-oxide transistor, silicon transistors, and a light-emitting diode. The diode may be coupled to a data line that can be used for both data loading and compensation sensing operations. Reset operations may be performed after data programming and before emission to reset the anode voltage for the diode.

Abstract: An electronic device comprises a display and a controller. The controller is configured to provide a first frequency refresh rate to the display. The controller is also configured to generate a control signal configured to control emission of a light emitting diode of a display pixel of the display at a second frequency based on whether the first frequency refresh rate of the display is less than a predetermined threshold value.

Abstract: Systems and apparatuses for hybrid micro-driver architectures having time multiplexing for driving displays are described. In one embodiment, a display (e.g., hybrid display architecture) includes a backplane and a micro-driver circuitry that is coupled to the backplane. The backplane includes circuitry (e.g., sample and hold circuitry) for sampling and holding analog data and for time multiplexing analog data. The micro-driver circuitry includes at least a capacitor of a ramp generator for generating a ramp voltage based on the analog data of the backplane and drive circuitry to cause at least one emission pulse for emitting a display element.

Abstract: A display may have an array of pixels. Each pixel may have a light-emitting diode such as an organic light-emitting diode. The organic light-emitting diodes may each have an anode that is coupled to a thin-film transistor pixel circuit for controlling the anode. Transparent windows may be formed in the display. The windows may be formed by replacing data storage capacitors and other pixel circuit structures in a subset of the pixels with transparent window structures, by selectively removing portions of light-emitting diode anodes, and by shifting anodes. An array of electrical components such as an array of light sensors may be aligned with the transparent windows and may be used to measure light passing through the transparent windows.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: An organic light-emitting diode display may have thin-film transistor circuitry formed on a substrate. The display and substrate may have rounded corners. A pixel definition layer may be formed on the thin-film transistor circuitry. Openings in the pixel definition layer may be provided with emissive material overlapping respective anodes for organic light-emitting diodes. A cathode layer may cover the array of pixels. A ground power supply path may be used to distribute a ground voltage to the cathode layer. The ground power supply path may be formed from a metal layer that is shorted to the cathode layer using portions of a metal layer that forms anodes for the diodes, may be formed from a mesh shaped metal pattern, may have L-shaped path segments, may include laser-deposited metal on the cathode layer, and may have other structures that facilitate distribution of the ground power supply.

Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

Abstract: Systems and electronic displays with improved contrast even under bright-light conditions are provided. Such an electronic display may include a self-emissive pixel (e.g., OLED or ?-LED) with a corresponding liquid crystal switchable retarder pixel. A liquid crystal layer of the switchable retarder pixel may be tuned to an “on” state or an “off” state. In the “on” state, the switchable retarder pixel may allow outside light that enters the pixel to reflect back out of the pixel. This may add to the amount of light that appears to be emitted from that pixel. In the “off” state, the switchable retarder pixel may block the outside light that enters the pixel from reflecting back out of the pixel. This may reduce the amount of light that appears to be emitted from that pixel. Selectively controlling the switchable retarder pixels may allow for increased contrast even under bright-light conditions.

Abstract: Systems and methods are provided for differential sensing (DS), difference-differential sensing (DDS), correlated double sampling (CDS), and/or programmable capacitor matching to reduce display panel sensing noise. An electronic device may include one or more processors and an electronic display. The one or more processors may generate image data and adjust the image data based at least in part on display sensing feedback. The electronic display may employ sensing circuitry that obtains the display sensing feedback at least in part by applying test data to a pixel of a column of an active area of the display and differentially senses an electrical value of the pixel in comparison to a reference signal from a different column. This reference signal may provide a common mode noise reference, which is removed by the differential sensing and thereby enhances a quality of the sensed electrical value of the pixel.

Abstract: An electronic device comprises a display and a controller. The controller is configured to provide a first frequency refresh rate to the display. The controller is also configured to generate a control signal configured to control emission of a light emitting diode of a display pixel of the display at a second frequency based on whether the first frequency refresh rate of the display is less than a predetermined threshold value.

Abstract: A display may include an array of organic light-emitting diode display pixels having transistors characterized by threshold voltages subject to transistor variations. Compensation circuitry may be used to sense a current from selected display pixels. A display pixel may include a drive transistor, a gate setting transistor for driving a reference voltage onto the gate terminal of the drive transistor, a data loading and current sensing transistor for connecting the drive transistor to a data/current-sensing line, a light-emitting diode, an emission control transistor coupled between the drive transistor and the diode, and an anode resetting transistor for selectively resetting the anode terminal of the diode. During pixel conditioning and current sensing operations, the anode resetting transistor may be constantly turned on to ensure that there is no voltage perturbation at the source terminal of the drive transistor, which can help prevent hysteresis-induced current sensing error.

Abstract: Systems and methods are provided for differential sensing (DS), difference-differential sensing (DDS), correlated double sampling (CDS), and/or programmable capacitor matching to reduce display panel sensing noise. An electronic device may include one or more processors and an electronic display. The one or more processors may generate image data and adjust the image data based at least in part on display sensing feedback. The electronic display may employ sensing circuitry that obtains the display sensing feedback at least in part by applying test data to a pixel of a column of an active area of the display and differentially senses an electrical value of the pixel in comparison to a reference signal from a different column. This reference signal may provide a common mode noise reference, which is removed by the differential sensing and thereby enhances a quality of the sensed electrical value of the pixel.

Abstract: A display device may include rows of pixels that may display image data on a display and a circuit. The circuit may perform a progressive scan across the rows of pixels to display the image data using a plurality of pixels, supply test data to a pixel of plurality of pixels that corresponds to a first row of the rows of pixels during one frame of the progressive scan, and initiate a sensing period for determining one or more sensitivity properties associated with the pixel based on the performance of the pixel with respect to the test data in response to receiving a pulse of a first global signal. The circuit may then end the sensing period in response to receiving a second global signal and resume the progressive scan across the rows of pixels to display the image data after the sensing period ends.