Patents by Inventor Ching-Hua Chen

Ching-Hua Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210265368
    Abstract: A non-volatile memory device includes a substrate, a stacked structure, an anti-fuse gate, a gate dielectric layer, a first doping region, and a second doping region. The stacked structure is formed on the substrate and includes a floating gate, a select logic gate, a logic gate dielectric layer, and an inter-polysilicon layer dielectric layer. The select logic gate is disposed on the floating gate, the logic gate dielectric layer is disposed between the floating gate and the substrate, and the inter-polysilicon layer dielectric layer is disposed between the floating gate and the select logic gate. The anti-fuse gate is disposed on the substrate, and the gate dielectric layer is disposed between the anti-fuse gate and the substrate. The first doping region is formed in the substrate at one side of the floating gate. The second doping region is formed in the substrate between the floating gate and the anti-fuse gate.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 26, 2021
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Ching-Hua Chen, Bing-Chen Ji, Shun-Tsung Yu, Ming-Yuan Lin, Han-Chao Lai, Jih-Wen Chou, Chen-Chiu Hsue
  • Publication number: 20210104307
    Abstract: A mechanism is provided in a data processing system to implement a personalized patient engagement engine.
    Type: Application
    Filed: October 4, 2019
    Publication date: April 8, 2021
    Inventors: Subhro Das, Gema Almoguera, Kenneth J. Barker, Ching-Hua Chen, Adam R. Faulkner, Pei-Yun Hsueh, Chandramouli Maduri, Sara Rosenthal
  • Publication number: 20210066114
    Abstract: A stage for supporting a semiconductor substrate is disclosed. The stage includes a platform that defines a plurality of apertures, and a plurality of burls that protrude from the apertures, where the plurality of burls have support surfaces for supporting a region of the semiconductor substrate. The stage includes an actuator coupled to at least a first burl included in the plurality of burls, wherein the actuator is operable to adjust an elevation of a first support surface of the first burl relative to the platform, and control circuitry that controls operation of the actuator to establish a substantially-planar alignment of the support surface of the first burl with a support surface of at least a second burl included in the plurality of burls.
    Type: Application
    Filed: July 17, 2020
    Publication date: March 4, 2021
    Inventors: Ching-Hua CHEN, Kai-Fa HO
  • Publication number: 20200381095
    Abstract: A method, a computer program product, and a computer system predict medication adherence of a patient. The method includes identifying risk factors associated with medication adherence of the patient. The method includes determining a likely behaviour for medication adherence of the patient based on the identified risk factors and a temporal causal model. The temporal causal model is based on features of a patient cluster to which the patient belongs. The features are nodes in the temporal causal model. The likely behaviour is based on causality measures for each identified risk factor to the nodes. The method includes determining a current medication adherence value of the patient. The current medication adherence value is indicative of a ratio between an actual medication regiment and an expected medication regiment. The method includes determining a future medication adherence value of the patient based on the current medication adherence value and the causality measures.
    Type: Application
    Filed: May 31, 2019
    Publication date: December 3, 2020
    Inventors: Zhiguo Li, Ching-Hua Chen, CHANDRAMOULI MADURI, PEI-YUN HSUEH
  • Publication number: 20190189025
    Abstract: A system provides an intervention for a user and comprises at least one processor. The system monitors behavior and context of a user to generate a behavior history. One or more models are utilized to determine an intervention for the user to induce a behavior modification, wherein the one or more models map interventions to user context and behavior and utilize the behavior history to determine an effective intervention for the user. The intervention is provided to the user and feedback is received in response to the intervention. The one or more models are updated based on the feedback. Embodiments of the present invention further include a method and computer program product for providing an intervention to a user in substantially the same manner described above.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 20, 2019
    Inventors: Marie Angelopoulos, Shahram Ebadollahi, Stewart T. Sill, Michal Rosen-Zvi, Ching-Hua Chen, James V. Codella, Si Sun
  • Patent number: 10198054
    Abstract: A power supply device includes a first body and a second body. The first body has an opening and an adapter module which is electrically connected to a first electronic device. The opening is divided into a first part and a second part via a first axis, and the shape of the first part is asymmetrical to the shape of the second part. The second body has an energy storage unit. The energy storage unit is electrically connected to the adapter module to supply power to the first electronic device, when the second body is detached from the first body, the energy storage unit is adapted to supply power to a second electronic device.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: February 5, 2019
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Ching-Hua Chen, Hung-Wei Lin
  • Publication number: 20180336480
    Abstract: An aspect includes querying, by a processor, a plurality of model data from a distributed data source based at least in part on one or more user characteristics. A plurality of sensor data is gathered associated with a condition of a user. A policy is generated including an end goal and one or more sub-goals based at least in part on the model data and the sensor data. The policy is iteratively adapted based at least in part on one or more detected changes in the sensor data collected over a period of time to adjust at least one of the one or more sub-goals. The policy and the one or more sub-goals are provided to the user.
    Type: Application
    Filed: May 22, 2017
    Publication date: November 22, 2018
    Inventors: Hung-Yang Chang, Ching-Hua Chen, James V. Codella, Pei-Yun Hsueh, Xinyu Hu
  • Publication number: 20180314805
    Abstract: Embodiments of technical solutions are described for a health management system that facilitates adaptively tracking a health-management goal. An example computer-implemented method includes receiving a cumulative target for a predetermined duration for a user, and generating a target activity time-series for the predetermined duration to meet the cumulative target. The method further includes receiving a user-activity time-series for the user that indicates activity performed by the user to meet the cumulative target and monitoring a difference between the target activity time-series and the user-activity time-series. The method further includes determining, based on the difference, a probability value that indicates the user missing the cumulative target, and generating an updated target activity time-series for the user in response to the probability value being above a predetermined threshold.
    Type: Application
    Filed: April 26, 2017
    Publication date: November 1, 2018
    Inventors: Hung-Yang Chang, Ching-Hua Chen, Zhiguo Li, Kun Lin
  • Patent number: 9760914
    Abstract: Methods, systems and apparatus for determining a proposed cost for use of sensor resources and selecting a method of processing of sensed data are presented. Such a method includes the steps of: predicting a state of an environment, obtaining at least one criterion related to the use of the sensor resources comprising one or more data sensors, determining the proposed cost for use of the sensor resources, acquiring the sensed data from the one or more data sensors, determining a characteristic of the sensed data, and selecting the method of processing the sensed data according to the determined characteristic and the predicted state. The at least one criterion is based upon the predicted state. The determining of the proposed cost is based on the at least one criterion. One or more of steps are implemented on the processor device.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Ching-Hua Chen-Ritzo, David Alexander Epstein, Rick Allen Hamilton, II, Perry G. Hartswick, Hongfei Li, Clifford Alan Pickover, Ralph Peter Williams
  • Publication number: 20150340427
    Abstract: A capacitor structure including at least one capacitor unit is provided. The capacitor unit includes a dielectric layer, an inner metal layer and an outer metal layer. The inner metal layer is disposed in the dielectric layer. The outer metal layer is disposed in the dielectric layer and surrounds the inner metal layer. The outer metal layer includes a first metal layer, two second metal layers and a third metal layer. The first metal layer is disposed under the inner metal layer. The second metal layers are disposed at two sides of the inner metal layer, and lower surfaces of the second metal layers are located equal to or below a lower surface of the inner metal layer. The third metal layer is disposed over the inner metal layer and connects to the second metal layers.
    Type: Application
    Filed: September 26, 2014
    Publication date: November 26, 2015
    Inventors: Yukihiro Nagai, Hui-Huang Chen, Ching-Hua Chen, Ying-Chia Lin
  • Publication number: 20150228895
    Abstract: A resistive random access memory including a first electrode, a dielectric layer, at least a first nanostructure and a second electrode is provided. The dielectric layer is disposed on the first electrode. The first nanostructure is disposed between the first electrode and the dielectric layer and includes a plurality of first cluster-type-type metal nanoparticles and a plurality of first covering-type metal nanoparticles. The first cluster-type-type metal nanoparticles are disposed on the first electrode. The first covering-type metal nanoparticles covers the first cluster-type-type metal nanoparticles, wherein a diffusion coefficient of the first cluster-type-type metal nanoparticles is larger than a diffusion coefficient of the first covering-type metal nanoparticles. The second electrode is disposed on the dielectric layer.
    Type: Application
    Filed: May 2, 2014
    Publication date: August 13, 2015
    Applicant: Powerchip Technology Corporation
    Inventors: Ching-Hua Chen, Chan-Ching Lin
  • Publication number: 20150115712
    Abstract: A power supply device includes a first body and a second body. The first body has an opening and an adapter module which is electrically connected to the first electronic device. The opening is divided into a first port and a second port via a first axis, and the shape of the first portion is asymmetrical with second port of the second portions. The second body has an energy storage unit. The energy storage unit is electrically connected to the adapter module to supply power to the first electronic device, when the second body is detached from the first body, the energy storage unit is adapted to supply power to the second electronic device.
    Type: Application
    Filed: October 29, 2014
    Publication date: April 30, 2015
    Applicant: ASUSTEK COMPUTER INC.
    Inventors: Ching-Hua Chen, Hung-Wei Lin
  • Patent number: 8999809
    Abstract: A method of fabricating a resistive random access memory (RRAM) device is disclosed. A plurality of word lines extending along a first direction are formed on a substrate with a recess between the word lines. A spacer-type resistance layer and a top electrode layer are formed on a sidewall of each of the word lines. A photoresist stripe pattern extending along a second direction is then formed on the substrate. The first direction is perpendicular to the second direction. An etching process is performed to remove the top electrode layer and the spacer-type resistance layer not covered by the photoresist stripe pattern to form a plurality of top electrodes. A diode is formed on each of the top electrodes.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: April 7, 2015
    Assignee: Powerchip Technology Corporation
    Inventors: Chan-Ching Lin, Chen-Hao Huang, Tzung-Bin Huang, Chun-Cheng Chen, Ching-Hua Chen
  • Publication number: 20150072500
    Abstract: A method of fabricating a resistive random access memory (RRAM) device is disclosed. A plurality of word lines extending along a first direction are formed on a substrate with a recess between the word lines. A spacer-type resistance layer and a top electrode layer are formed on a sidewall of each of the word lines. A photoresist stripe pattern extending along a second direction is then formed on the substrate. The first direction is perpendicular to the second direction. An etching process is performed to remove the top electrode layer and the spacer-type resistance layer not covered by the photoresist stripe pattern to form a plurality of top electrodes. A diode is formed on each of the top electrodes.
    Type: Application
    Filed: November 14, 2014
    Publication date: March 12, 2015
    Inventors: Chan-Ching Lin, Chen-Hao Huang, Tzung-Bin Huang, Chun-Cheng Chen, Ching-Hua Chen
  • Patent number: 8976514
    Abstract: A computer host with a housing includes a movable portion, an actuator module, a detection module and a process module. The movable portion constitutes a first portion of the housing. The actuator module actuates the movable portion to execute an operation. The detection module detects an output value of the actuator module, and outputs a detection signal when the output value is varied. The processing module sends a reverse actuation signal to the actuator module according to the detection signal so that the actuator module reversely actuates the movable portion.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: March 10, 2015
    Assignee: ASUSTeK Computer Inc.
    Inventor: Ching-Hua Chen
  • Patent number: 8962396
    Abstract: A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: February 24, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Ching-Hua Chen, Heng-Cheng Chu, Hsin-Lung Chung, Chih-Hsien Chiu, Chia-Yang Chen
  • Patent number: 8921819
    Abstract: A resistive random access memory (RRAM) unit includes at least one bit line extending along a first direction, at least one word line disposed on a substrate and extending along a second direction so as to intersect the bit line, a hard mask layer on the word line to isolate the word line from the bit line, a first memory cell on a sidewall of the word line, and a second memory cell on the other sidewall of the word line.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: December 30, 2014
    Assignee: Powerchip Technology Corporation
    Inventors: Chan-Ching Lin, Chen-Hao Huang, Tzung-Bin Huang, Chun-Cheng Chen, Ching-Hua Chen
  • Patent number: 8805756
    Abstract: A DeepQA engine is enhanced to provide a digital medical investigation tool which assists a medical professional in researching potential causes of a set of patient conditions, including clues, facts and factoids about the patient. The DeepQA engine provides one or more answers to a natural language question with confidence levels for each answer. If a confidence level falls below a threshold, the enhanced DeepQA engine performs a crowd sourcing operation to gather additional information from one or more domain experts. The domain expert responses are provided to the medical professional, and are learned by the enhanced DeepQA system to provide for better research of similar patient conditions in future queries.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: August 12, 2014
    Assignee: International Business Machines Corporation
    Inventors: Gregory J. Boss, Ching-Hua Chen-Ritzo, Rick A. Hamilton, II, Jianying Hu, Clifford A. Pickover
  • Publication number: 20140091273
    Abstract: A resistive random access memory (RRAM) unit includes at least one bit line extending along a first direction, at least one word line disposed on a substrate and extending along a second direction so as to intersect the bit line, a hard mask layer on the word line to isolate the word line from the bit line, a first memory cell on a sidewall of the word line, and a second memory cell on the other sidewall of the word line.
    Type: Application
    Filed: November 13, 2012
    Publication date: April 3, 2014
    Applicant: POWERCHIP TECHNOLOGY CORPORATION
    Inventors: Chan-Ching Lin, Chen-Hao Huang, Tzung-Bin Huang, Chun-Cheng Chen, Ching-Hua Chen
  • Publication number: 20140080265
    Abstract: A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design.
    Type: Application
    Filed: November 21, 2013
    Publication date: March 20, 2014
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Ching-Hua Chen, Heng-Cheng Chu, Hsin-Lung Chung, Chih-Hsien Chiu, Chia-Yang Chen