Patents by Inventor Ching Hui Chen

Ching Hui Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11404460
    Abstract: In some embodiments, the present disclosure relates to a device having a semiconductor substrate including a frontside and a backside. On the frontside of the semiconductor substrate are a first source/drain region and a second source/drain region. A gate electrode is arranged on the frontside of the semiconductor substrate and includes a horizontal portion, a first vertical portion, and a second vertical portion. The horizontal portion is arranged over the frontside of the semiconductor substrate and between the first and second source/drain regions. The first vertical portion extends from the frontside towards the backside of the semiconductor substrate and contacts the horizontal portion of the gate electrode structure. The second vertical portion extends from the frontside towards the backside of the semiconductor substrate, contacts the horizontal portion of the gate electrode structure, and is separated from the first vertical portion by a channel region of the substrate.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: August 2, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Hsiao-Hui Tseng, Jen-Cheng Liu, Jhy-Jyi Sze, Shyh-Fann Ting, Wei Chuang Wu, Yen-Ting Chiang, Chia Ching Liao, Yen-Yu Chen
  • Publication number: 20220238621
    Abstract: An organic semiconductor substrate includes a base, a first conductive pattern, a second conductive pattern, a first metal oxide pattern, a second metal oxide pattern, an organic flat pattern layer, a source, a drain, an organic semiconductor pattern, an organic gate insulating layer, and a gate. The first conductive pattern and the second conductive pattern are disposed on the base and separated from each other. The first metal oxide pattern and the second metal oxide pattern respectively cover and are electrically connected to the first conductive pattern and the second conductive pattern, respectively. A first portion of the organic flat pattern layer is disposed between the first metal oxide pattern and the second metal oxide pattern. A surface of the first metal oxide pattern has a first distance from the base. A surface of the first portion of the organic flat pattern layer has a second distance from the base. The second distance is less than or equal to the first distance.
    Type: Application
    Filed: July 1, 2021
    Publication date: July 28, 2022
    Applicant: Au Optronics Corporation
    Inventors: Shuo-Yang Sun, Shih-Hua Hsu, Ching-Wen Chen, Ying-Hui Lai
  • Publication number: 20220227086
    Abstract: An injection molding method includes providing a molding device including a first mold, a second mold over the first mold and a first mold cavity defined by the first mold and the second mold; injecting a first material into the first mold cavity; forming a first layer from the first material; replacing the second mold by a third mold, injecting a second material into a second mold cavity defined by the first mold and the third mold; and forming a second layer from the second material, wherein the second layer at least partially contacts the first layer. The first material is same as the second material.
    Type: Application
    Filed: April 7, 2022
    Publication date: July 21, 2022
    Inventors: LIANG-HUI YEH, CHING-HAO CHEN
  • Publication number: 20220149141
    Abstract: A display device includes a semiconductor substrate, an isolation layer, a light-emitting layer and a second electrode. The semiconductor substrate has a pixel region and a peripheral region located around the pixel region. The semiconductor substrate includes first electrodes and a driving element layer. The first electrodes are disposed in the pixel region and the first electrodes are electrically connected to the driving element layer. The isolation layer is disposed on the semiconductor substrate. The isolation layer includes a first isolation pattern disposed in the peripheral region, and the first isolation pattern has a first side surface and a second side surface opposite to the first side surface. The light-emitting layer is disposed on the isolation layer and the first electrodes, and covers the first side surface and the second side surface of the first isolation pattern. The second electrode is disposed on the light-emitting layer.
    Type: Application
    Filed: January 21, 2022
    Publication date: May 12, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Yu Wu, Mirng-Ji Lii, Shang-Yun Tu, Ching-Hui Chen
  • Publication number: 20220077094
    Abstract: A semiconductor device includes a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump, a conductive cap over the conductive bump, and a passivation layer. The conductive pad is over the semiconductor substrate. The conductive bump is over the conductive pad, wherein the conductive bump has a stepped sidewall structure including a lower sidewall, an upper sidewall laterally offset from the lower sidewall, and an intermediary surface laterally extending from a bottom edge of the upper sidewall to a top edge of the lower sidewall. The conductive cap is over the conductive bump. The passivation layer is over the semiconductor substrate and laterally surrounds the conductive bump, wherein the passivation layer has a top surface higher than the intermediary surface of the stepped sidewall structure of the conductive bump and lower than a top surface of conductive cap.
    Type: Application
    Filed: November 12, 2021
    Publication date: March 10, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu WU, Ching-Hui CHEN, Mirng-Ji LII, Kai-Di WU, Chien-Hung KUO, Chao-Yi WANG, Hon-Lin HUANG, Zi-Zhong WANG, Chun-Mao CHIU
  • Patent number: 11239305
    Abstract: A display device includes a semiconductor substrate, an isolation layer, a light-emitting layer and a second electrode. The semiconductor substrate has a pixel region and a peripheral region located around the pixel region. The semiconductor substrate includes first electrodes and a driving element layer. The first electrodes are disposed in the pixel region and the first electrodes are electrically connected to the driving element layer. The isolation layer is disposed on the semiconductor substrate. The isolation layer includes a first isolation pattern disposed in the peripheral region, and the first isolation pattern has a first side surface and a second side surface opposite to the first side surface. The light-emitting layer is disposed on the isolation layer and the first electrodes, and covers the first side surface and the second side surface of the first isolation pattern. The second electrode is disposed on the light-emitting layer.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: February 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Yu Wu, Mirng-Ji Lii, Shang-Yun Tu, Ching-Hui Chen
  • Patent number: 11177228
    Abstract: A semiconductor device comprises a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump over the conductive pad, a conductive cap over the conductive bump, and a passivation layer over the semiconductor substrate and surrounding the conductive bump. A combination of the conductive bump and the conductive cap has a stepped sidewall profile. The passivation layer has an inner sidewall at least partially facing and spaced apart from an outer sidewall of the conductive bump.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: November 16, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji Lii, Kai-Di Wu, Chien-Hung Kuo, Chao-Yi Wang, Hon-Lin Huang, Zi-Zhong Wang, Chun-Mao Chiu
  • Patent number: 11152273
    Abstract: Conductive structures and the redistribution circuit structures are disclosed. One of the conductive structures includes a first conductive layer and a second conductive layer. The first conductive layer is disposed in a lower portion of a dielectric layer, and the first conductive layer includes an upper surface with a protrusion at an edge. The second conductive layer is disposed in an upper portion of the dielectric layer and electrically connected to the first conductive layer. An upper surface of the second conductive layer is conformal with the upper surface of the first conductive layer.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: October 19, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yun Tu, Ching-Wen Hsiao, Sheng-Yu Wu, Ching-Hui Chen
  • Publication number: 20210310631
    Abstract: The present utility model discloses a lampshade comprising fasteners, a lampshade body and support frames; the lampshade body comprises a light transmitting sheet and a piece of lampshade cloth; the bottom and/or top of the lampshade body are/is designed with soft band-shaped reinforcing ribs which extend in the length direction of the side wall surface and cover the lampshade body and prop up against at least one fastener; in the present utility model, the bottom and/or top of the lampshade body are/is designed with soft band-shaped reinforcing ribs which extend in the length direction of the side wall surface, the integration of the reinforcing ribs and the matching fasteners with the flexibility of the soft material makes the lampshade easy to be packaged and reduce the volume of its package and finally lower the transportation cost.
    Type: Application
    Filed: March 30, 2021
    Publication date: October 7, 2021
    Inventor: Ching-Hui Chen
  • Patent number: 11127703
    Abstract: Semiconductor devices are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump. The spacer surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: September 21, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Publication number: 20210265165
    Abstract: A method includes depositing a plurality of layers on a substrate, patterning a first mask overlying the plurality of layers, and performing a first etching process on the plurality of layers using the first mask. The method also includes forming a polymer material along sidewalls of the first mask and sidewalls of the plurality of layers, and removing the polymer material. The method also includes performing a second etching process on the plurality of layers using the remaining first mask, where after the second etching process terminates a combined sidewall profile of the plurality of layers comprises a first portion and a second portion, and a first angle of the first portion and a second angle of the second portion are different to each other.
    Type: Application
    Filed: May 10, 2021
    Publication date: August 26, 2021
    Inventors: Chang-Jung Hsueh, Chen-En Yen, Chin Wei Kang, Kai Jun Zhan, Wei-Hung Lin, Cheng Jen Lin, Ming-Da Cheng, Ching-Hui Chen, Mirng-Ji Lii
  • Patent number: 11009212
    Abstract: The present utility model discloses a lampshade with a reinforcing strip extending in the length direction along a side wall designed respectively at the bottom and/or top of the side wall and with a plurality of projecting fasteners integrated with the reinforcing strip; such design not only increases the stability of the fasteners after being decorated with the body of shade but also ensures that the reinforcing strips and the fasteners integrated with the reinforcing strips can be installed onto the bottoms and/or tops of the side walls during the lampshade production, thus avoiding the need to spend a lot of time and manpower to paste or clip the fasteners one by one onto the lampshade during the production, and further effectively improving the production efficiency and saves the production cost.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: May 18, 2021
    Inventor: Ching-Hui Chen
  • Patent number: 11004685
    Abstract: A method includes depositing a plurality of layers on a substrate, patterning a first mask overlying the plurality of layers, and performing a first etching process on the plurality of layers using the first mask. The method also includes forming a polymer material along sidewalls of the first mask and sidewalls of the plurality of layers, and removing the polymer material. The method also includes performing a second etching process on the plurality of layers using the remaining first mask, where after the second etching process terminates a combined sidewall profile of the plurality of layers comprises a first portion and a second portion, and a first angle of the first portion and a second angle of the second portion are different to each other.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: May 11, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Jung Hsueh, Chen-En Yen, Chin Wei Kang, Kai Jun Zhan, Wei-Hung Lin, Cheng Jen Lin, Ming-Da Cheng, Ching-Hui Chen, Mirng-Ji Lii
  • Publication number: 20210080074
    Abstract: The present utility model discloses a lampshade with a reinforcing strip extending in the length direction along a side wall designed respectively at the bottom and/or top of the side wall and with a plurality of projecting fasteners integrated with the reinforcing strip; such design not only increases the stability of the fasteners after being decorated with the body of shade but also ensures that the reinforcing strips and the fasteners integrated with the reinforcing strips can be installed onto the bottoms and/or tops of the side walls during the lampshade production, thus avoiding the need to spend a lot of time and manpower to paste or clip the fasteners one by one onto the lampshade during the production, and further effectively improving the production efficiency and saves the production cost.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 18, 2021
    Inventor: Ching-Hui CHEN
  • Publication number: 20210028266
    Abstract: A display device includes a semiconductor substrate, an isolation layer, a light-emitting layer and a second electrode. The semiconductor substrate has a pixel region and a peripheral region located around the pixel region. The semiconductor substrate includes first electrodes and a driving element layer. The first electrodes are disposed in the pixel region and the first electrodes are electrically connected to the driving element layer. The isolation layer is disposed on the semiconductor substrate. The isolation layer includes a first isolation pattern disposed in the peripheral region, and the first isolation pattern has a first side surface and a second side surface opposite to the first side surface. The light-emitting layer is disposed on the isolation layer and the first electrodes, and covers the first side surface and the second side surface of the first isolation pattern. The second electrode is disposed on the light-emitting layer.
    Type: Application
    Filed: May 4, 2020
    Publication date: January 28, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Yu Wu, Mirng-Ji Lii, Shang-Yun Tu, Ching-Hui Chen
  • Publication number: 20200328153
    Abstract: A method includes forming a first dielectric layer over a conductive pad, forming a second dielectric layer over the first dielectric layer, and etching the second dielectric layer to form a first opening, with a top surface of the first dielectric layer exposed to the first opening. A template layer is formed to fill the first opening. A second opening is then formed in the template layer and the first dielectric layer, with a top surface of the conductive pad exposed to the second opening. A conductive pillar is formed in the second opening.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 15, 2020
    Inventors: Mirng-Ji Lii, Chung-Shi Liu, Chin-Yu Ku, Hung-Jui Kuo, Alexander Kalnitsky, Ming-Che Ho, Yi-Wen Wu, Ching-Hui Chen, Kuo-Chio Liu
  • Publication number: 20200295453
    Abstract: A device includes a ground plane electrically connected to a proximal end of at least one conductive pillar and an antenna pad substantially parallel to the ground plane, wherein the antenna pad is separated from a distal end of the at least one conductive pillar by a dielectric pad having a first dielectric constant, wherein the ground plane, the at least one conductive pillar, and the dielectric pad surround an antenna cavity filled with a dielectric fill material having a second dielectric constant different from the first dielectric constant.
    Type: Application
    Filed: January 9, 2020
    Publication date: September 17, 2020
    Inventors: Feng Wei KUO, Wen-Shiang LIAO, Ching-Hui CHEN
  • Patent number: 10776665
    Abstract: A method performed by an electronic device is described. The method includes receiving a set of images. The method also includes determining a motion region and a static region based on the set of images. The method further includes extracting, at a first rate, first features from the motion region. The method additionally includes extracting, at a second rate that is different from the first rate, second features from the static region. The method also includes caching the second features. The method further includes detecting at least one object based on at least a portion of the first features.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: September 15, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Ching-Hui Chen, Chinchuan Chiu, Lei Ma, Shuxue Quan
  • Publication number: 20200243410
    Abstract: Conductive structures and the redistribution circuit structures are disclosed. One of the conductive structures includes a first conductive layer and a second conductive layer. The first conductive layer is disposed in a lower portion of a dielectric layer, and the first conductive layer includes an upper surface with a protrusion at an edge. The second conductive layer is disposed in an upper portion of the dielectric layer and electrically connected to the first conductive layer. An upper surface of the second conductive layer is conformal with the upper surface of the first conductive layer.
    Type: Application
    Filed: April 20, 2020
    Publication date: July 30, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Yun Tu, Ching-Wen Hsiao, Sheng-Yu Wu, Ching-Hui Chen
  • Patent number: 10700001
    Abstract: A method includes forming a first dielectric layer over a conductive pad, forming a second dielectric layer over the first dielectric layer, and etching the second dielectric layer to form a first opening, with a top surface of the first dielectric layer exposed to the first opening. A template layer is formed to fill the first opening. A second opening is then formed in the template layer and the first dielectric layer, with a top surface of the conductive pad exposed to the second opening. A conductive pillar is formed in the second opening.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: June 30, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mirng-Ji Lii, Chung-Shi Liu, Chin-Yu Ku, Hung-Jui Kuo, Alexander Kalnitsky, Ming-Che Ho, Yi-Wen Wu, Ching-Hui Chen, Kuo-Chio Liu