Abstract: A manufacturing method for a circuit board and a circuit board are provided. The method includes steps: providing a substrate having a first metal layer; forming a patterned first opening on the first metal layer to expose the substrate; forming a patterned first dielectric layer on the substrate, the first dielectric layer is made of a photosensitive dielectric material and covers the first opening; photosensitizing the first dielectric layer to cure the first dielectric layer; forming a patterned second metal layer on the first metal layer; forming a patterned third metal layer on the second metal layer, and the third metal layer being adjacent to the first dielectric layer; removing a portion of the first metal layer not covered by the second metal layer; and forming a second dielectric layer on the substrate. A thickness of the third metal layer is greater than a thickness of the second metal layer.

Abstract: A manufacturing method of a circuit substrate includes the following steps. A core layer having a core dielectric layer, a first patterned circuit layer and a second patterned circuit layer is provided. An electroless plating nickel layer is formed on the first patterned circuit layer and the second patterned circuit layer. The electroless plating nickel layer has a first thickness, and the first thickness is between 1 micrometer and 10 micrometers. A reducing process is performed on the electroless plating nickel layer so that the electroless plating nickel layer is thinned from the first thickness to a second thickness to form a thinned electroless plating nickel layer. The second thickness is between 0.01 micrometers and 0.9 micrometers. An electroless plating palladium layer is formed on the thinned electroless plating nickel layer. A surface metal passivation layer is formed on the electroless plating palladium layer.

Abstract: A display control apparatus includes a viewing condition recognition circuit, a content classification circuit, and a display adjustment circuit. The viewing condition recognition circuit recognizes a viewing condition associated with a display device to generate a viewing condition recognition result. The content classification circuit analyzes an input frame to generate a content classification result of contents included in the input frame. The display adjustment circuit generates an output frame by performing image content adjustment according to the viewing condition recognition result and the content classification result, wherein the image content adjustment comprises at least content-adaptive adjustment applied to at least a portion of pixel positions of the input frame based on the content classification result.

Abstract: A circuit board includes a substrate, a patterned copper layer, a phosphorous-containing electroless plating palladium layer, an electroless plating palladium layer and an immersion plating gold layer. The patterned copper layer is disposed on the substrate. The phosphorous-containing electroless plating palladium layer is disposed on the patterned copper layer, wherein in the phosphorous-containing electroless plating palladium layer, a weight percentage of phosphorous is in a range from 4% to 6%, and a weight percentage of palladium is in a range from 94% to 96%. The electroless plating palladium layer is disposed on the phosphorous-containing electroless plating palladium layer, wherein in the electroless plating palladium layer, a weight percentage of palladium is 99% or more. The immersion plating gold layer is disposed on the electroless plating palladium layer.

Abstract: A circuit board includes a substrate, a patterned copper layer, a phosphorous-containing electroless plating palladium layer, an electroless plating palladium layer and an immersion plating gold layer. The patterned copper layer is disposed on the substrate. The phosphorous-containing electroless plating palladium layer is disposed on the patterned copper layer, wherein in the phosphorous-containing electroless plating palladium layer, a weight percentage of phosphorous is in a range from 4% to 6%, and a weight percentage of palladium is in a range from 94% to 96%. The electroless plating palladium layer is disposed on the phosphorous-containing electroless plating palladium layer, wherein in the electroless plating palladium layer, a weight percentage of palladium is 99% or more. The immersion plating gold layer is disposed on the electroless plating palladium layer.

Abstract: A light-emitting device is disclosed and comprises: a transparent substrate; a semiconductor light-emitting stack on the transparent substrate, wherein the semiconductor light-emitting stack comprises a first semiconductor layer close to the transparent substrate, a second semiconductor layer away from the transparent substrate, and a light-emitting layer capable of emitting a light disposed between the first semiconductor layer and the second semiconductor layer; and a bonding layer between the transparent substrate and the semiconductor light-emitting stack, wherein the bonding layer has a gradually changed refractive index, and each of critical angles at the bonding layer and the transparent substrate for the light emitted from the light-emitting layer towards the transparent substrate is larger than 35 degrees.

Abstract: A heat dissipation plate including a heat-conductive material layer, a first metal layer, a metal substrate, a metal ring frame, and a second metal layer is provided. The heat-conductive material layer has an upper surface and a lower surface opposite to each other. The first metal layer is disposed on the lower surface of the heat-conductive material layer and has a first rough surface structure. The metal substrate is disposed below the first metal layer and has a second rough surface structure. The metal ring frame is disposed between the first metal layer and the metal substrate. The second metal layer is disposed on the upper surface of the heat-conductive material layer. The first and second rough surface structures and the metal ring frame define a fluid chamber, and a working fluid flows in the fluid chamber. A package structure including the heat dissipation plate is also provided.

Abstract: A package carrier including a removable supporting plate and a circuit board is provided. The removable supporting plate includes a dielectric layer, a copper foil layer and a releasing layer. The dielectric layer is disposed between the copper foil layer and the releasing layer. The circuit board is disposed on the removable supporting plate and directly contacts the releasing layer. A thickness of the circuit board is between 30 ?m and 100 ?m.

Abstract: A heat dissipation module includes a hollow housing, a plurality of heat dissipation fins and heat dissipation liquid. The hollow housing includes a chamber, a side surface, a top surface and a bottom surface opposite to the top surface. The side surface is connected to the top surface and the bottom surface. The heat dissipation fins are disposed on the side surface. The heat dissipation liquid is contained within the chamber, and a specific heat of the heat dissipation liquid is substantially greater than or equal to 1 cal/g° C.

Abstract: A display control apparatus includes a viewing condition recognition circuit, a content classification circuit, and a display adjustment circuit. The viewing condition recognition circuit recognizes a viewing condition associated with a display device to generate a viewing condition recognition result. The content classification circuit analyzes an input frame to generate a content classification result of contents included in the input frame. The display adjustment circuit generates an output frame by performing image content adjustment according to the viewing condition recognition result and the content classification result, wherein the image content adjustment comprises at least content-adaptive adjustment applied to at least a portion of pixel positions of the input frame based on the content classification result.

Abstract: A circuit board includes a circuit layer, a first solder resist layer, a second solder resist layer and at least one conductive bump. The first solder resist layer is disposed on a lower surface of the circuit layer and has at least one first opening exposing a portion of the lower surface of the circuit layer. The second solder resist layer is disposed on an upper surface of the circuit layer and has at least one second opening exposing a portion of the upper surface of the circuit layer. The conductive bump is disposed inside the second opening of the second solder resist layer and directly connects to the upper surface of the circuit layer exposed by the second opening. A top surface of the conductive bump is higher than a second surface of the second solder resist layer.

Abstract: An operating system switching method and a dual operating system electronic device using this method are disclosed. The dual operating system electronic device includes a storage unit, a booting process and a processing unit. The operating system switching method includes the following steps: receiving a launch command corresponding to the representative icon to read the application program data under the status of running the first operating system; creating an operating command in the shared partition for executing the application program and opening the user designated file; writing a switching command in the booting process for booting with the second operating system; rebooting with the second operating system according to the switching command; and executing the application program and opening the user designated file under the status of running the second operating system according to the operating command.

Abstract: A circuit board includes a circuit layer, a first solder resist layer, a second solder resist layer and at least one conductive bump. The first solder resist layer is disposed on a lower surface of the circuit layer and has at least one first opening exposing a portion of the lower surface of the circuit layer. The second solder resist layer is disposed on an upper surface of the circuit layer and has at least one second opening exposing a portion of the upper surface of the circuit layer. The conductive bump is disposed inside the second opening of the second solder resist layer and directly connects to the upper surface of the circuit layer exposed by the second opening. A top surface of the conductive bump is higher than a second surface of the second solder resist layer.

Abstract: A heat dissipation substrate includes a heat sink, a metal base and an elastic structure. The heat sink includes a carrying portion and supporting portions. The supporting portions are parallel to one another and disposed on a lower surface of the carrying portion. The supporting portions are perpendicular to the carrying portion and surround an accommodating space with the carrying portion. The carrying portion has first rough surface structure disposed on a portion of the lower surface and located in the accommodating space. The metal base is disposed below the heat sink and has an assemble surface and a second rough surface structure disposed on a portion of the assemble surface and corresponding to the first rough surface structure. The first and second rough surface structures and the supporting portions define a fluid chamber in which the elastic structure is disposed, and a working fluid flows in the fluid chamber.

Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. A covering layer is formed on the surface passivation layer, and the covering layer covers the surface passivation layer.

Abstract: A cable management device used in a chassis includes a frame and two board-like cable management units are respectively connected to two sides of the frame. Each cable management unit has multiple recesses. The cables of each of the ports are located in the corresponding recesses to avoid the cables from being in contact with each other and have better heat dissipating feature.

Abstract: A package carrier including a removable supporting plate and a circuit board is provided. The removable supporting plate includes a dielectric layer, a copper foil layer and a releasing layer. The dielectric layer is disposed between the copper foil layer and the releasing layer. The circuit board is disposed on the removable supporting plate and directly contacts the releasing layer. A thickness of the circuit board is between 30 ?m and 100 ?m.

Abstract: A manufacturing method of substrate structure is provided. A base material having a core layer, a first patterned copper layer, a second patterned copper layer and at least one conductive via is provided. The first and second patterned copper layers are respectively located on a first surface and a second surface of the core layer. The conductive via passes through the core layer and connects the first and second patterned copper layers. A first and a second solder mask layers are respectively formed on the first and second surfaces. Portions of the first and second patterned copper layers are exposed by the first and second solder mask layers, respectively. A first gold layer is formed on the first and second patterned copper layers exposed by the first and second solder mask layers. A nickel layer and a second gold layer are successively formed on the first gold layer.

Abstract: A heat dissipation plate including a heat-conductive material layer, a first metal layer, a metal substrate, and a metal ring frame is provided. The heat-conductive material layer has an upper surface and a lower surface opposite to each other. A material of the heat-conductive material layer includes ceramic or silicon germanium. The first metal layer is disposed on the lower surface of the heat-conductive material layer and has a first rough surface structure. The metal substrate is disposed below the first metal layer and has a second rough surface structure. The metal ring frame is disposed between the first metal layer and the metal substrate. The first rough surface structure, the metal ring frame, and the second rough surface structure define a fluid chamber, and a working fluid flows in the fluid chamber.

Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. The metal layer and the surface passivation layer are dipped into a modifier, and the modifier is selectively absorbed and attached to the surface passivation layer, so as to form a covering layer. The covering layer has a plurality of nanoparticles and covers the surface passivation layer.