Patents by Inventor Ching Wu

Ching Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250120230
    Abstract: An optical structure is provided. The optical structure includes a substrate, a light-emitting element, a glue layer, and a light-adjusting element. The light-emitting element is disposed on the substrate. The glue layer covers the light-emitting element. The light-adjusting element is disposed on the glue layer. Moreover, the refractive index of the glue layer is different from the refractive index of the light-adjusting element.
    Type: Application
    Filed: August 21, 2024
    Publication date: April 10, 2025
    Inventors: Shu-Ching PENG, Yu-Hsi SUNG, Jung-Cheng CHANG, Wei-Chung CHENG, Yin-Cyuan WU, Sheng-Fu WANG, Wen-Yu LEE
  • Patent number: 12272568
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.
    Type: Grant
    Filed: August 1, 2023
    Date of Patent: April 8, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
  • Patent number: 12274172
    Abstract: A piezoelectric actuating apparatus including a frame, a rotatable element, an actuating structure, and a sensing structure is provided. The rotatable element is disposed in an accommodating opening and connected to the frame through a rotating shaft structure. The rotatable element is configured to reciprocatingly swing relative to the frame with an axis of the rotating shaft structure. The actuating structure is elastically coupled to the rotatable element through at least one first elastic component. The sensing structure is elastically coupled to the rotatable element through at least one second elastic component. The actuating structure is deformed by receiving a driving signal, and drives the rotatable element to rotate around the axis through the at least one first elastic component. The rotating rotatable element is linked to the sensing structure through the at least one second elastic component to be correspondingly deformed, and outputs a sensing signal.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: April 8, 2025
    Assignee: Coretronic MEMS Corporation
    Inventors: Hao-Chien Cheng, Wei-Leun Fang, Kai-Chih Liang, Ming-Ching Wu
  • Publication number: 20250113691
    Abstract: A white light emitting device with an efficiency of at least 230 lm/W at a blue LED chip input current density from 10 to 60 mA/mm2, preferably in the range from 15 to 40 mA/mm2 and more preferably in the range from 20 to 30 mA/mm2. The device comprises a substrate, at least one string of blue LED chips mounted on the substrate and a phosphor material composition. Said phosphor material composition comprises a narrow band red phosphor which generates light with a peak emission wavelength in a range from 625 nm to 635 nm. The weight percentages of the narrow band red phosphor are between 33 to 49 wt. % for a CCT of from 4000 to 6500K or in an amount of from 60 to 70 wt. % for a CCT of from 2700 to 3500K CCT.
    Type: Application
    Filed: July 20, 2022
    Publication date: April 3, 2025
    Inventors: TUNG CHING WU, XIAO YE HU, XIURU WANG, SONGHUI CHEN, MO SHEN
  • Publication number: 20250107207
    Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed on the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.
    Type: Application
    Filed: December 9, 2024
    Publication date: March 27, 2025
    Inventors: Chi-Sheng LAI, Wei-Chung SUN, Yu-Bey WU, Yuan-Ching PENG, Yu-Shan LU, Li-Ting CHEN, Shih-Yao LIN, Yu-Fan PENG, Kuei-Yu KAO, Chih-Han LIN, Jing Yi YAN, Pei-Yi LIU
  • Publication number: 20250096522
    Abstract: An optoelectronic device includes a first substrate, a second substrate, a photonic integrated circuit, and a laser diode. The second substrate is over the first substrate. The photonic integrated circuit is disposed on the first substrate and includes a first waveguide channel, a second waveguide channel, and a patterned structure. The first waveguide channel and the second waveguide channel are coupled to the patterned structure. The laser diode is disposed on the second substrate and configured to emit a light beam toward the patterned structure.
    Type: Application
    Filed: September 19, 2024
    Publication date: March 20, 2025
    Applicant: AuthenX Inc.
    Inventors: Sheng-Fu LIN, Po-Kuan SHEN, Yi-Ting LU, Chu-Ching TSAI, Jenq-Yang CHANG, Mao-Jen WU
  • Patent number: 12255104
    Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
    Type: Grant
    Filed: August 2, 2023
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Chung-Chiang Wu, Hung-Chin Chung, Hsien-Ming Lee, Da-Yuan Lee, Jian-Hao Chen, Chien-Hao Chen, Kuo-Feng Yu, Chia-Wei Chen, Chih-Yu Hsu
  • Patent number: 12253541
    Abstract: The present invention relates to a pogo pin cooling system and a pogo pin cooling method and an electronic device testing apparatus having the system. The system mainly comprises a coolant circulation module, which includes a coolant supply channel communicated with an inlet of a chip socket and a coolant recovery channel communicated with an outlet of the chip socket. When an electronic device is accommodated in the chip socket, the coolant circulation module supplies a coolant into the chip socket through the coolant supply channel and the inlet, and the coolant passes through the pogo pins and then flows into the coolant recovery channel through the outlet.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: March 18, 2025
    Assignee: CHROMA ATE INC.
    Inventors: I-Shih Tseng, Xin-Yi Wu, I-Ching Tsai, Chin-Yi Ouyang
  • Publication number: 20250085790
    Abstract: A wrist-worn device control method is disclosed. The method includes: collecting first motion data of a wrist-worn device, where the first motion data includes angular velocity information and acceleration information of the wrist-worn device; and identifying, based on the first motion data of the wrist-worn device, that the wrist-worn device changes from a first posture to a second posture, and playing, by the wrist-worn device, media information, where the media information is at least one of a speech message, a text message, or incoming call information that are received by the wrist-worn device, and information displayed by the wrist-worn device, and the second posture is a posture in which a hand of a user wearing the wrist-worn device is close to an ear of the user. Therefore, a message can be played without occupying two hands of the user, interaction is convenient, and user experience is good.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wenhao Wu, Nu Zhang, Qiang Xu, Shuiping Long, Ching Szu Lin, Vijaya Krishna Mulpuri, Siju Wu
  • Publication number: 20250084274
    Abstract: A curable composition includes an epoxy monomer component and an aniline-based hardener. The epoxy monomer component is a first component formed from a first epoxy monomer represented by Formula (I), or a second component including the first epoxy monomer represented by Formula (I) and a second epoxy monomer different from the first epoxy monomer represented by Formula (I), wherein each of the substituents in Formula (I) is given the definitions as set forth in the Specification and Claims. Based on 100 wt % of the epoxy monomer component, an amount of the first epoxy monomer represented by Formula (I) is not smaller than 25 wt % and less than 100 wt % and an amount of the second epoxy monomer is greater than 0% and not greater than 75 wt %. A cured product formed from the curable composition, and a method for encapsulating a semiconductor device using the curable composition are also provided.
    Type: Application
    Filed: September 12, 2024
    Publication date: March 13, 2025
    Inventors: Yun-Ching WU, Yu-Lin HUANG, Ming-Tsung TSAI, Pei-Nung CHEN, Shu-Wei CHANG, Ming-Tsung HSU
  • Publication number: 20250089334
    Abstract: A semiconductor includes a substrate. A gate structure is disposed on the substrate. A liner oxide contacts a side of the gate structure. A silicon oxide spacer contacts the liner oxide. An end of the silicon oxide spacer forms a kink profile. A silicon nitride spacer contacts the silicon oxide spacer and a tail of the silicon nitride spacer covers part of the kink profile. A stressor covers the silicon nitride spacer and the substrate.
    Type: Application
    Filed: October 13, 2023
    Publication date: March 13, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, Chen-Ming Wang, Po-Ching Su, Pei-Hsun Kao, Ti-Bin Chen, Chun-Wei Yu, Chih-Chiang Wu
  • Patent number: 12249777
    Abstract: An ultra-wideband antenna device includes a radiation metal body, a first slotted hole, a second slotted hole, a third slotted hole, a fourth slotted hole, a ground point, and a feeding source. The radiation metal body includes a first side edge and a second side edge opposite to each other and a third side edge and a fourth side edge opposite to each other, the first slotted hole extends inward from the first side edge, the second slotted hole extends inward from the second side edge, the third slotted hole extends inward from the third side edge, and the fourth slotted hole extends inward from the fourth side edge. The ground point is located at a middle position of the radiation metal body, and the feeding source is located on the radiation metal body and away from the middle position.
    Type: Grant
    Filed: March 10, 2023
    Date of Patent: March 11, 2025
    Assignee: ASUSTEK COMPUTER INC.
    Inventor: Yu-Ching Wu
  • Patent number: 12248131
    Abstract: A portable confocal optical scanning microscopic device includes an optical path module, a light source module, a light receiving module and an object stage, wherein the optical path module includes a beam splitter and a focusing lens; the light source module includes a light generator for generating an incident light and can be injected into the beam splitter; the light receiving module includes a spatial filter; the object stage is for setting a test specimen. The optical path module, the light source module, the light receiving module, and the object stage can be disassembled and assembled on the operating board to flexibly configure an adaptive combination capable of performing the optical scanning.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 11, 2025
    Assignee: SOUTHERN TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Yu-Ching Lee, Hsiao-Ying Wu, Shi-De Chen
  • Patent number: 12243449
    Abstract: A display panel adapted to a spherical display device includes a substrate and a plurality of display configuration groups. The display configuration groups are arranged on the substrate along a first direction. Each of the display configuration groups corresponds to a display number and a display pitch. Each of the display configuration groups comprises at least one display row arranged along the first direction. Each of the at least one display row of each of the display configuration groups is arranged along a second direction orthogonal to the first direction according to the corresponding display number and the corresponding display pitch. The display configuration groups include a first configuration group and a second configuration group adjacent to each other, and the display pitch of the first configuration group is different from the display pitch of the second configuration group.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: March 4, 2025
    Assignee: AUO CORPORATION
    Inventors: Yea-Ching Chen, Chih-Kai Wang, Yu-Chin Wu
  • Publication number: 20250072007
    Abstract: A MRAM layout structure with multiple unit cells, including a first word line, a second word line and a third word line extending through active areas, wherein two ends of a first MTJ are connected respectively to a second active area and one end of a second MTJ, and two ends of a third MTJ are connected respectively to a third active area and one end of a fourth MTJ, and a first bit line and a second bit line connected respectively to the other end of the second MTJ and the other end of the fourth MTJ.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen, Bo-Chang Li
  • Patent number: 12237228
    Abstract: An improved work function layer and a method of forming the same are disclosed. In an embodiment, the method includes forming a semiconductor fin extending from a substrate; depositing a dielectric layer over the semiconductor fin; depositing a first work function layer over the dielectric layer; and exposing the first work function layer to a metastable plasma of a first reaction gas, a metastable plasma of a generation gas, and a metastable plasma of a second reaction gas, the first reaction gas being different from the second reaction gas.
    Type: Grant
    Filed: June 30, 2023
    Date of Patent: February 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shao-Jyun Wu, Hung-Chi Wu, Chia-Ching Lee, Pin-Hsuan Yeh, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen, Sheng-Liang Pan, Huan-Just Lin
  • Patent number: 12237414
    Abstract: A method includes receiving a semiconductor substrate. The semiconductor substrate has a top surface and includes a semiconductor element. Moreover, the semiconductor substrate has a fin structure formed thereon. The method also includes recessing the fin structure to form source/drain trenches, forming a first dielectric layer over the recessed fin structure in the source/drain trenches, implanting a dopant element into a portion of the fin structure beneath a bottom surface of the source/drain trenches to form an amorphous semiconductor layer, forming a second dielectric layer over the recessed fin structure in the source/drain trenches, annealing the semiconductor substrate, and removing the first and second dielectric layers. After the annealing and the removing steps, the method further includes further recessing the recessed fin structure to provide a top surface. Additionally, the method includes forming an epitaxial layer from and on the top surface.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: February 25, 2025
    Assignee: TAIWAN SEMICONDCUTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Ching Wang, Wen-Yuan Chen, Wen-Hsing Hsieh, Kuan-Lun Cheng, Chung-Wei Wu, Zhiqiang Wu
  • Patent number: 12238669
    Abstract: Technology for an Information Centric Networking gateway (ICN-GW) operable to modify an ICN message received from a user equipment (UE) in a Fifth Generation (5G) cellular network is disclosed. The ICN-GW can decode the ICN message received from the UE via a Next Generation NodeB (gNB) and an ICN point of attachment (ICN-PoA). The ICN-GW can modify the ICN message to produce a modified ICN message. The ICN-GW can encode the modified ICN message to route the modified ICN message to a data network.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: February 25, 2025
    Assignee: APPLE INC.
    Inventors: Gabriel Arrobo Vidal, Geng Wu, Qian Li, Zongrui Ding, Ching-Yu Liao
  • Patent number: 12230605
    Abstract: A semiconductor package includes semiconductor bridge, first and second multilayered structures, first encapsulant, and a pair of semiconductor dies. Semiconductor dies of the pair include semiconductor substrate and conductive pads disposed at front surface of semiconductor substrate. Semiconductor bridge electrically interconnects the pair of semiconductor dies. First multilayered structure is disposed on rear surface of one semiconductor die. Second multilayered structure is disposed on rear surface of the other semiconductor die. First encapsulant laterally wraps first multilayered structure, second multilayered structure and the pair of semiconductor dies. Each one of first multilayered structure and second multilayered structure includes a top metal layer, a bottom metal layer, and an intermetallic layer. Each one of first multilayered structure and second multilayered structure has surface coplanar with surface of first encapsulant.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: February 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Ching Shih, Chih-Wei Wu, Szu-Wei Lu
  • Patent number: 12226212
    Abstract: An analysis apparatus for ADHD is suitable for receiving a plurality of sensing data from a subject. The analysis apparatus comprises a plurality of first stage processing units, a combinator, and a second stage processing unit. Each of the first stage processing units performs a first DNN processing for the sensing data respectively, such that a plurality of first learning results are generated. The first learning results are combined by the combinator into a combination data. The second stage processing unit performs a second DNN processing for the combination data to generate an analysis result.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: February 18, 2025
    Assignee: National Central University
    Inventors: Shih-Ching Yeh, Hsiao-Kuang Wu