Abstract: A method includes forming a package, which includes forming a plurality of redistribution lines over a carrier, and forming a thermal dissipation block over the carrier. The plurality of redistribution lines and the thermal dissipation block are formed by common processes. The thermal dissipation block has a first metal density, and the plurality of redistribution lines have a second metal density smaller than the first metal density. The method further includes forming a metal post over the carrier, placing a device die directly over the thermal dissipation block, and encapsulating the device die and the metal post in an encapsulant. The package is then de-bonded from the carrier.

Abstract: A defect inspection method, an inspection system, and a non-transitory computer-readable storage medium are provided. The defect inspection method includes providing a processed image and a reference image of a wafer, both the processed image and the reference image comprising a pattern of interest; determining the processed image as a qualified image in response to a matching ratio that reflects a percentage of correctly aligned features of the pattern of interest between the processed image and the reference image is above a first predetermined threshold; selecting a first feature of the qualified image; selecting a second feature of the reference image corresponding to the first feature of the processed image; comparing the qualified image with the reference image to determine a variation of the first feature with respect to the second feature; and detecting a defect of the wafer based on a comparison of the first and second features.

Abstract: A method includes forming a package, which includes forming a plurality of redistribution lines over a carrier, and forming a thermal dissipation block over the carrier. The plurality of redistribution lines and the thermal dissipation block are formed by common processes. The thermal dissipation block has a first metal density, and the plurality of redistribution lines have a second metal density smaller than the first metal density. The method further includes forming a metal post over the carrier, placing a device die directly over the thermal dissipation block, and encapsulating the device die and the metal post in an encapsulant. The package is then de-bonded from the carrier.

Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.

Abstract: Provided herein are compositions, systems, kits, and methods for treating nervous system injuries caused by trauma or neurodegeneration or aging in a subject by administering a CSPG or SOCS3 reduction peptide (CRP and SRP respectively), or a nucleic acid sequence encoding the CRP or SRP, wherein both the CRP and SRP comprise a cell membrane penetrating domain, and a lysosome targeting domain, and the CRP further comprises a chondroitin sulfate proteoglycan (CSPG) binding domain, and the SRP further comprises a suppressor of cytokine signaling-3 (SOCS3) binding domain.

Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.

Abstract: A method includes forming a package, which includes forming a plurality of redistribution lines over a carrier, and forming a thermal dissipation block over the carrier. The plurality of redistribution lines and the thermal dissipation block are formed by common processes. The thermal dissipation block has a first metal density, and the plurality of redistribution lines have a second metal density smaller than the first metal density. The method further includes forming a metal post over the carrier, placing a device die directly over the thermal dissipation block, and encapsulating the device die and the metal post in an encapsulant. The package is then de-bonded from the carrier.

Abstract: A semiconductor device includes an integrated passive device coupled to a redistribution structure by a plurality of first bumps, and having a plurality of second bumps disposed opposite the plurality of first bumps, wherein the plurality of first and second bumps are thermally and/or electrically connected, and thus enable further thermal and/or electrical connections within or comprising the semiconductor device.

Abstract: A system and method utilize capacitance sensor data to identify cell events with single-cell resolution. The method identifies patterns in the sensor data related to events such as mitosis, migration-in to the sensor field, and migration-out. The system may include a processor co-located with the sensor to perform the pattern recognition. Further, microfluidic channels can be provided to direct cells to the sensors.

Abstract: A method includes forming a package, which includes forming a plurality of redistribution lines over a carrier, and forming a thermal dissipation block over the carrier. The plurality of redistribution lines and the thermal dissipation block are formed by common processes. The thermal dissipation block has a first metal density, and the plurality of redistribution lines have a second metal density smaller than the first metal density. The method further includes forming a metal post over the carrier, placing a device die directly over the thermal dissipation block, and encapsulating the device die and the metal post in an encapsulant. The package is then de-bonded from the carrier.

Abstract: A thermal ground plane (TGP) is disclosed. A TGP may include a first planar substrate member comprising copper and a second planar substrate member comprising a metal, wherein the first planar substrate member and the second planar substrate member enclose a working fluid. The TGP may include a first plurality of pillars disposed on an interior surface of the first planar substrate and a mesh layer disposed on the top of the first plurality of pillars, wherein the mesh layer comprises at least one of copper, polymer encapsulated with copper, or stainless steel encapsulated with copper. The TGP may also include a second plurality of pillars disposed on an interior surface of the second planar substrate member within an area defined by the perimeter of the second planar substrate member and the second plurality of pillars extend from the second planar substrate member to the mesh layer.

Abstract: Provided herein are compositions, systems, kits, and methods for treating nervous system injuries caused by trauma or neurodegeneration or aging in a subject by administering a CSPG or SOCS3 reduction peptide (CRP and SRP respectively), or a nucleic acid sequence encoding the CRP or SRP, wherein both the CRP and SRP comprise a cell membrane penetrating domain, and a lysosome targeting domain, and the CRP further comprises a chondroitin sulfate proteoglycan (CSPG) binding domain, and the SRP further comprises a suppressor of cytokine signaling-3 (SOCS3) binding domain.

Abstract: A semiconductor device includes a first substrate. The semiconductor device includes a plurality of metallization layers formed over the first substrate. The semiconductor device includes a plurality of via structures formed over the plurality of metallization layers. The semiconductor device includes a second substrate attached to the first substrate through the plurality of via structures. The semiconductor device includes a first conductive line disposed in a first one of the plurality of metallization layers. The first conductive line, extending along a first lateral direction, is connected to at least a first one of the plurality of via structures that is in electrical contact with a first through via structure of the second substrate, and to at least a second one of the plurality of via structures that is laterally offset from the first through via structure.

Abstract: A phone appliance and method of use are provided where the phone appliance can be used to make VoIP communications calls. In a preferred embodiment, the phone appliance includes an RF connection for connecting to a computer or other computing device for facilitating the placement of the VoIP communications calls. The phone appliance further includes a display or portal for depicting advertisements provided by various advertisers. The advertisements provided can be used to defray all or part of the cost associated with making VoIP communications calls. The portal can also be used to communicate with businesses for ordering products, such as ordering a pizza, and to perform various services, such as purchasing stocks. In an exemplary system, the phone appliance is used to transmit to a control center information related to the user of the phone appliance, such as interests and buying habits, and queries for receiving additional information for various advertised products and services.

Abstract: A method includes: receiving a layout of an integrated circuit; identifying, based on the layout, at least a first net and at least a second net, wherein the first net extends through the integrated circuit along a vertical direction, and the second net terminates at a middle portion of the integrated circuit along the vertical direction; dividing the integrated circuit into a plurality of grid units, wherein the first net is constituted by a first subset of the plurality of grid units, and the second net is constituted by a second subset of the plurality of grid units; estimating a first thermal conductivity of each of the first subsets of grid units; estimating a second thermal conductivity of each of the second subsets of grid units; and estimating an equivalent thermal conductivity of the integrated circuit based on combining the first thermal conductivity and the second thermal conductivity.

Abstract: A thermal ground plane (TGP) is disclosed. A TGP may include a first planar substrate member comprising copper and a second planar substrate member comprising a metal, wherein the first planar substrate member and the second planar substrate member enclose a working fluid. The TGP may include a first plurality of pillars disposed on an interior surface of the first planar substrate and a mesh layer disposed on the top of the first plurality of pillars, wherein the mesh layer comprises at least one of copper, polymer encapsulated with copper, or stainless steel encapsulated with copper. The TGP may also include a second plurality of pillars disposed on an interior surface of the second planar substrate member within an area defined by the perimeter of the second planar substrate member and the second plurality of pillars extend from the second planar substrate member to the mesh layer.

Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.

Abstract: A phone appliance and method of use are provided where the phone appliance can be used to make VoIP communications calls. In a preferred embodiment, the phone appliance includes an RF connection for connecting to a computer or other computing device for facilitating the placement of the VoIP communications calls. The phone appliance further includes a display or portal for depicting advertisements provided by various advertisers. The advertisements provided can be used to defray all or part of the cost associated with making VoIP communications calls. The portal can also be used to communicate with businesses for ordering products. such as ordering a pizza, and to perform various services, such as purchasing stocks. In an exemplary system, the phone appliance is used to transmit to a control center information related to the user of the phone appliance, such as interests and buying habits, and queries for receiving additional information for various advertised products and services.

Abstract: A method includes forming a package, which includes forming a plurality of redistribution lines over a carrier, and forming a thermal dissipation block over the carrier. The plurality of redistribution lines and the thermal dissipation block are formed by common processes. The thermal dissipation block has a first metal density, and the plurality of redistribution lines have a second metal density smaller than the first metal density. The method further includes forming a metal post over the carrier, placing a device die directly over the thermal dissipation block, and encapsulating the device die and the metal post in an encapsulant. The package is then de-bonded from the carrier.

Abstract: In some embodiments, a low-resistance path between an active cell and a power supply layer in an integrated circuit device includes at least one layer of a plurality of conductive lines commonly connected to at least one conductive line through a plurality of respective conductive pillars, the at least one conductive line being in the power supply layer or intervening the active cell and the power supply layer. In some embodiments, the integrated circuit device includes a conductive layer that includes the plurality of conductive lines and additional conductive portions, where the plurality of conductive lines are isolated from the additional conductive portions.