Abstract: Some embodiments relate an integrated circuit (IC) including a first substrate. An interconnect structure is disposed over the first substrate. The interconnect structure includes a plurality of metal features that are stacked over one another. A lowermost metal feature of the plurality of metal features is closest to the first substrate, an uppermost metal feature of the plurality of metal features is furthest from the first substrate, and intermediate metal features are disposed between the lowermost metal feature and the uppermost metal feature. A recess extends into the interconnect structure and terminates at a bond pad. A lower surface of the bond pad directly contacts an upper surface of the lowermost metal feature.

Abstract: In an embodiment, a method includes attaching a first package component to a first carrier, the first package component comprising: an aluminum pad disposed adjacent to a substrate; a sacrificial pad disposed adjacent to the substrate, the sacrificial pad comprising a major surface opposite the substrate, a protrusion of the sacrificial pad extending from the major surface; and a dielectric bond layer disposed around the aluminum pad and the sacrificial pad; attaching a second carrier to the first package component and the first carrier, the first package component being interposed between the first carrier and the second carrier; removing the first carrier; planarizing the dielectric bond layer to comprise a top surface being coplanar with the protrusion; and etching a portion of the protrusion.

Abstract: Method and apparatus for affine CPMV or ALF refinement are mentioned. According to this method, statistical data associated with the affine CPMV or ALF refinement are collected over a picture area. Updated parameters for the affine CPMV refinement or the ALF refinement are then derived based on the statistical data, where a process to derive the updated parameters includes performing multiplication using a reduced-precision multiplier for the statistical data. The reduced-precision multiplier truncates at least one bit of the mantissa part. In another embodiment, the process to derive the updated parameters includes performing reciprocal for the statistical data using a lookup table with (m?k)-bit input by truncating k bits from the m-bit mantissa part, and contents of the lookup table includes m-bit outputs. m and k are positive integers.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.

Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.

Abstract: A quantum dot composite structure and a method for forming the same are provided. The quantum dot composite structure includes: a glass particle including a glass matrix and a plurality of quantum dots located in the glass matrix, wherein at least one of the plurality of quantum dots includes an exposed surface in the glass matrix; and an inorganic protective layer disposed on the glass particle and covering the exposed surface.

Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.

Abstract: An arbitrary-scale blind super resolution model has two designs. First, learn dual degradation representations where the implicit and explicit representations of degradation are sequentially extracted from the input low resolution image. Second, process both upsampling and downsampling at the same time, where the implicit and explicit degradation representations are utilized respectively, in order to enable cycle-consistency and train the arbitrary-scale blind super resolution model.

Abstract: A method for generating a high resolution image from a low resolution image includes retrieving a plurality of low resolution image patches from the low resolution image, performing discrete wavelet transform on each low resolution image patch to generate a first image patch with a high frequency on a horizontal axis and a high frequency on a vertical axis, a second image patch with a high frequency on the horizontal axis and a low frequency on the vertical axis, and a third image patch with a low frequency on the horizontal axis and a high frequency on the vertical axis, inputting the three image patches to a dual branch degradation extractor to generate a blur representation and a noise representation, and performing contrastive learning on the blur representation and the noise representation by reducing a blur loss and a noise loss.

Abstract: A system and method, for the assurance of authenticity, confidentiality and integrity of the executed programs, the analytic models and the processed data used by heterogeneous processing units such as graphic processing units (GPU), neural processing units (NPU) and video processing units (VPU), etc. that are connected to the central processing unit (CPU) through standard open interconnects such as Ethernet, USB and SPI, etc.

Abstract: A bioinformatics sensor patch includes a plurality of sensing electrodes, a distance sensing element and an operation unit. The sensing electrodes senses bioinformatics of an organism. The distance sensing element senses a contact degree between the bioinformatics sensor patch and the organism and generates a corresponding contact signal. The operation unit is electrically connected to the sensing electrodes and the distance sensing element to receive the bioinformatics and the contact signal, wherein the operation unit compensates the bioinformatics or selectively outputs a control signal according to the contact signal. The above-mentioned bioinformatics sensor patch can improve a sensing accuracy of the bioinformatics.

Abstract: A method for forming a photo-mask includes providing a first pattern, wherein the first pattern includes a first light-transmitting region and a first light-shielding region; transforming the first pattern into a second pattern, wherein the second pattern includes a second light-transmitting region and a second light-shielding region, the second light-transmitting region is located within range of the first light-transmitting region, and the second light-transmitting region has an area which is smaller than that of the first light-transmitting region, the second light-shielding region includes the entire region of the first light-shielding region, and the second light-shielding region has an area which is greater than that of the first light-shielding region; and forming the second pattern on a photo-mask substrate to form a photo-mask, wherein the photo-mask is used in an ion implantation process of a material layer.

Abstract: A method to be implemented by a computer system includes: transforming each of training images into a respective transformed training image; calculating a classification loss value based on detection results that are acquired from parking status prediction results obtained by performing feature extraction on the transformed training images; and adjusting candidate spatial transforming parameters, candidate feature extraction parameters and candidate logistic regression parameters when it is determined that a combination of the aforementioned parameters is not optimal based on the classification loss value, followed by repeating above-mentioned steps using the adjusted parameters.

Abstract: A method to be implemented by a computer system includes: transforming each of training images into a respective transformed training image; calculating a classification loss value based on detection results that are acquired from parking status prediction results obtained by performing feature extraction on the transformed training images; and adjusting candidate spatial transforming parameters, candidate feature extraction parameters and candidate logistic regression parameters when it is determined that a combination of the aforementioned parameters is not optimal based on the classification loss value, followed by repeating above-mentioned steps using the adjusted parameters.

Abstract: A method for forming a photo-mask includes providing a first pattern, wherein the first pattern includes a first light-transmitting region and a first light-shielding region; transforming the first pattern into a second pattern, wherein the second pattern includes a second light-transmitting region and a second light-shielding region, the second light-transmitting region is located within range of the first light-transmitting region, and the second light-transmitting region has an area which is smaller than that of the first light-transmitting region, the second light-shielding region includes the entire region of the first light-shielding region, and the second light-shielding region has an area which is greater than that of the first light-shielding region; and forming the second pattern on a photo-mask substrate to form a photo-mask, wherein the photo-mask is used in an ion implantation process of a material layer.

Abstract: A method for testing a computer system includes activating an operation system of the computer system and selecting a first selectable number by a basic input/output system interface program. After selecting the first selectable number and rebooting the computer system, if a first enabled number of cores of the computer system is consistent with the first selectable number, but a second selectable number has not been selected, then select the second selectable number by the basic input/output system interface program. After selecting the second selectable number, if a second enabled number of cores of the computer system is consistent with the second selectable number, and no more number is selectable, then determine that the computer system has passed the test.

Abstract: An electronic device and a music visualization method thereof are provided. The electronic device is configured to display music visualization in response to music and change the music visualization in response to music lyrics of the music. The music visualization method is applied to the electronic device to implement the operations.

Abstract: A television system includes an image processing module, a display and an image capturing module. The image processing module and the image capturing module are integrated in a single chip. The image processing module performs an image processing procedure on an image input to generate an output image. The display plays the output image generated by the image processing module. In response to an image capturing instruction received, the image capturing module captures the input image or the output image.

Abstract: A television system includes an image processing module, a display and an image capturing module. The image processing module and the image capturing module are integrated in a single chip. The image processing module performs an image processing procedure on an image input to generate an output image. The display plays the output image generated by the image processing module. In response to an image capturing instruction received, the image capturing module captures the input image or the output image.