Patents by Inventor Chiu-Chih Chiang

Chiu-Chih Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080061374
    Abstract: A semiconductor resistor and a semiconductor process of making the same are provided. The semiconductor resistor comprises a substrate, a deep well, at least two contact regions, and a doped region. The substrate is doped with a first type of ions. The deep well is doped with a second type of ions, and formed in the substrate. The contact regions are heavily doped with the second type of ions, and formed in the deep well. The doped region is doped with the first type of ions, and is separated from the deep well by a distance. Wherein the first type of ions and the second type of ions are complementary, and the distance between the deep well and the doped region adjusts the breakdown voltage. In addition, the semiconductor process comprises the steps of forming a deep well containing a first type of ions; forming a doped region containing a second type of ions; forming an oxide layer; and forming at least two contact regions containing the first type of ions in the deep well.
    Type: Application
    Filed: September 7, 2006
    Publication date: March 13, 2008
    Applicant: System General Corporation
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang
  • Publication number: 20080042241
    Abstract: Voltage-controlled semiconductor structures, voltage-controlled resistors, and manufacturing processes are provided. The semiconductor structure comprises a substrate, a first doped well, and a second doped well. The substrate is doped with a first type of ions. The first doped well is with a second type of ions and is formed in the substrate. The second doped well is with the second type of ions and is formed in the substrate. The first type of ions and the second type of ions are complementary. A resistor is formed between the first doped well and the second doped well. A resistivity of the resistor is controlled by a differential voltage. A resistivity of the resistor relates to a first depth of the first doped well, a second depth of the second doped well, and a distance between the first doped well and the second doped well. The resistivity of the resistor is higher than that of a well resistor formed in a single doped well with the second type of ions.
    Type: Application
    Filed: August 21, 2006
    Publication date: February 21, 2008
    Applicant: System General Corporation
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang
  • Publication number: 20080036027
    Abstract: The high voltage integrated circuit is disclosed. The high voltage integrated circuit comprises a low voltage control circuit, a floating circuit, a P substrate, a deep N well disposed in the substrate and a plurality of P wells disposed in the P substrate. The P wells and deep N well serve as the isolation structures. The low voltage control circuit is located outside the deep N well and the floating circuit is located inside the deep N well. The deep N well forms a high voltage junction barrier for isolating the control circuit from the floating circuit.
    Type: Application
    Filed: August 11, 2006
    Publication date: February 14, 2008
    Applicant: SYSTEM GENERAL CORP.
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang, Ta-yung Yang
  • Publication number: 20080023786
    Abstract: A semiconductor structure of a high side driver includes an ion-doped junction. The ion-doped junction includes a substrate, a first deep well and a second deep well, a first heavy ion-doped region and a second heavy ion-doped region. The first deep well and second deep well are formed in the substrate, which are separated but partially linked with each other, and the first deep well and the second deep well have the same ion-doped type. The first heavy ion-doped region is formed in the first deep well for connecting to a first high voltage, and the first heavy ion-doped region has the same ion-doped type as the first deep well. The second heavy ion-doped region is formed in the second deep well for connecting to a second high voltage, and the second heavy ion-doped region has the same ion-doped type as the first deep well.
    Type: Application
    Filed: July 25, 2006
    Publication date: January 31, 2008
    Applicant: SYSTEM GENERAL CORP.
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang
  • Publication number: 20080017926
    Abstract: A semiconductor structure of a high side driver includes an ion-doped junction. The ion-doped junction includes a substrate and a deep well. The deep well is formed in the substrate and has a first concave structure. The ion-doped junction includes a semiconductor region connected to the first concave structure of the deep well and having substantially the same ion-doping concentration as the substrate.
    Type: Application
    Filed: July 20, 2006
    Publication date: January 24, 2008
    Applicant: SYSTEM GENERAL CORP.
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang
  • Publication number: 20080001195
    Abstract: The high voltage integrated circuit comprises a P substrate. An N well barrier is disposed in the substrate. Separated P diffusion regions forming P wells are disposed in the substrate for serving as the isolation structures. The low voltage control circuit is located outside the N well barrier. A floating circuit is located inside the N well barrier. In order to develop a high voltage junction barrier in between the floating circuit and the substrate, the maximum space of devices of the floating circuit is restricted.
    Type: Application
    Filed: June 28, 2006
    Publication date: January 3, 2008
    Applicant: SYSTEM GENERAL CORP.
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang, You-Kuo Wu, Long Shih Lin
  • Publication number: 20070296058
    Abstract: A semiconductor structure of a high side driver and method for manufacturing the same is disclosed. The semiconductor of a high side driver includes an ion-doped junction and an isolation layer formed on the ion-doped junction. The ion-doped junction has a number of ion-doped deep wells, and the ion-doped deep wells are separated but partially linked with each other.
    Type: Application
    Filed: June 26, 2006
    Publication date: December 27, 2007
    Applicant: SYSTEM GENERAL CORP.
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang
  • Publication number: 20070290276
    Abstract: The present invention proposes a voltage-clipping device utilizing a pinch-off mechanism formed by two depletion boundaries. A clipping voltage of the voltage-clipping device can be adjusted in response to a gate voltage; a gap of a quasi-linked well; and a doping concentration and a depth of the quasi-linked well and a well with complementary doping polarity to the quasi-linked well. The voltage-clipping device can be integrated within a semiconductor device as a voltage stepping down device in a tiny size, compared to traditional transformers.
    Type: Application
    Filed: June 15, 2006
    Publication date: December 20, 2007
    Applicant: SYSTEM GENERAL CORP.
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang, You-Kuo Wu, Long Shih Lin
  • Publication number: 20070290261
    Abstract: The present invention provides a self-driven LDMOS, which utilizes a parasitic resistor between a drain terminal and an auxiliary region. The parasitic resistor is formed between two depletion boundaries in a quasi-linked deep N-type well. When the two depletion boundaries pinch off, a gate-voltage potential at a gate terminal will be clipped at a drain-voltage potential at said drain terminal. Since the gate-voltage potential is designed to be equal to or higher than a start-threshold voltage, the LDMOS will be turned on accordingly. Besides, no additional die space and masking process are needed to manufacture the parasitic resistor. Furthermore, the parasitic resistor of the present invention doesn't lower the breakdown voltage and the operating speed of the LDMOS. In addition, when the two depletion boundaries pinch off, the gate-voltage potential doesn't vary in response to an increment of the drain-voltage potential.
    Type: Application
    Filed: June 15, 2006
    Publication date: December 20, 2007
    Applicant: SYSTEM GENERAL CORP.
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang
  • Publication number: 20070247225
    Abstract: A switching circuit for power converters is presented. It includes a voltage-clipping device, a resistive device, a first transistor and a second transistor. The voltage-clipping device is coupled to an input voltage. The first transistor is connected in series with the voltage-clipping device for switching the input voltage. The second transistor is coupled to control the first transistor and the voltage-clipping device in response to a control signal. The resistive device provides a bias voltage to turn on the voltage-clipping device and the first transistor when the second transistor is turned off. Once the second transistor is turned on, the first transistor is turned off and the voltage-clipping device is negatively biased. The voltage-clipping device is developed to clamp a maximum voltage for the first transistor.
    Type: Application
    Filed: April 19, 2006
    Publication date: October 25, 2007
    Inventors: Chih-Feng Huang, Chiu-Chih Chiang, You-Kuo Wu, Wei-Hsuan Huang, Ta-yung Yang