Abstract: The present invention relates to a photovoltaic device and a method for manufacturing the same. The photovoltaic device includes: a first semiconductor layer; a second semiconductor layer, disposed on the first semiconductor layer; a first electrode layer, connected to the first semiconductor layer; a second electrode layer, connected to the second semiconductor layer, in which the second electrode layer has an open area to expose the second semiconductor layer; and a low reflective conductive film, disposed in the open area and connected to the second electrode layer and the second semiconductor layer, in which the resistivity of the low reflective conductive film is less than or equal to that of the second semiconductor layer. Accordingly, the photovoltaic device provided by the present invention exhibits effectively reduced parasitic series resistance effect and thereby improved photoelectric conversion efficiency.

Abstract: An optoelectronic device is provided. The optoelectronic device includes a P-type semiconductor substrate, an N-type transparent amorphous oxide semiconductor (TAOS) layer located on a surface of the P-type semiconductor substrate, and a rear electrode on another surface of the P-type semiconductor substrate. The N-type TAOS layer constructs a portion of a P-N diode, and serves as a window layer and a front electrode layer.

Abstract: Disclosed is a method of providing a poly-Si layer used in fabricating poly-Si TFT's or devices containing poly-Si layers. Particularly, a method utilizing at least one metal plate covering the amorphous silicon layer or the substrate, and applying RTA (Rapid Thermal Annealing) for light illuminating process, then the light converted into heat by the metal plate will further be conducted to the amorphous silicon layer to realize rapid thermal crystallization. Thus the poly-Si layer of the present invention is obtained.

Abstract: The present invention is to provide an anti-reflective substrate, and the manufacturing method of the substrate. The method comprises the steps of: (a) providing a substrate; (b) depositing an amorphous silicon layer on the substrate; and (c) etching the amorphous silicon layer and the substrate by chemical etching in solutions, and the amorphous silicon layer is removed by the solutions. The effective reflectance of the anti-reflective substrate produced from the method of the present invention can be lower than 1%, and the absorption rate of the anti-reflective substrate is preferably from 70% to 90% in a wavelength range of 300 nm-900 nm.

Abstract: A method of fabricating a poly silicon layer comprising the following steps is provided. First, a substrate is provided and an amorphous silicon layer is formed on the substrate. A patterned metal layer is formed on the amorphous silicon layer. Next, a pulsed rapid thermal annealing process is performed to form a metal silicide between the patterned metal layer and the amorphous silicon layer, wherein the patterned metal layer and the amorphous silicon layer are adopted for conducting thermal energy to the amorphous silicon layer such that the amorphous silicon layer is converted into a polysilicon layer. Finally, the patterned metal layer is removed. A polysilicon layer formed according to the above-mentioned fabrication method is also provided. The grains of the poly silicon layer are spherical in shape.

Abstract: A method of fabricating a poly silicon layer comprising the following steps is provided. First, a substrate is provided and an amorphous silicon layer is formed on the substrate. A patterned metal layer is formed on the amorphous silicon layer. Next, a pulsed rapid thermal annealing process is performed to form a metal silicide between the patterned metal layer and the amorphous silicon layer, wherein the patterned metal layer and the amorphous silicon layer are adopted for conducting thermal energy to the amorphous silicon layer such that the amorphous silicon layer is converted into a polysilicon layer. Finally, the patterned metal layer is removed. Accordingly, the above processes may prevent the poly silicon layer from metal contamination.

Abstract: The present invention relates to a semiconductor structure having a low hot-carrier effect characteristic, and, more particularly, to a semiconductor structure capable of reducing the detrimental influence of the happening of the hot-carrier effect on the performance of the transistor having the semiconductor structure, even after the transistor has been operated under an operation environment with high channel electric field. The semiconductor structure comprises: a substrate; a metal layer formed on parts of the surface of the substrate; an insulation layer formed on the surface of the substrate and covering the surface of the metal layer; a first semiconductor layer covering parts of the surface of the insulation layer; and a second semiconductor layer covering parts of the surface of the first semiconductor layer. Besides, the second resistance of the second semiconductor layer is larger than the first resistance of the first semiconductor layer.

Abstract: A method of fabricating a poly silicon layer comprising the following steps is provided. First, a substrate is provided and an amorphous silicon layer is formed on the substrate. A patterned metal layer is formed on the amorphous silicon layer. Next, a pulsed rapid thermal annealing process is performed to form a metal silicide between the patterned metal layer and the amorphous silicon layer, wherein the patterned metal layer and the amorphous silicon layer are adopted for conducting thermal energy to the amorphous silicon layer such that the amorphous silicon layer is converted into a polysilicon layer. Finally, the patterned metal layer is removed. Accordingly, the above processes may prevent the poly silicon layer from metal contamination.

Abstract: The present invention is to provide an anti-reflective substrate, and the manufacturing method of the substrate. The method comprises the steps of: (a) providing a substrate; (b) depositing an amorphous silicon layer on the substrate; and (c) etching the amorphous silicon layer and the substrate by chemical etching in solutions, and the amorphous silicon layer is removed by the solutions. The effective reflectance of the anti-reflective substrate produced from the method of the present invention can be lower than 1%, and the absorption rate of the anti-reflective substrate is preferably from 70% to 90% in a wavelength range of 300 nm-900 nm.

Abstract: The present invention relates to a heating plate crystallization method used in the crystallization process for the poly-silicon thin-film transistor, and more particularly, the present invention relates to a heating plate crystallization method by using a pulsed rapid thermal annealing process (PRTP). By means of the characteristic provided by the present invention, namely, the heating plate area has a better absorption rate to the infrared rays and has a high thermal stability. The heating plate area is used for absorbing the infrared rays, and after the heating, the energy is indirectly transferred to the amorphous layer via a thermal conduction method so that the amorphous layer will be rapidly crystallized to form the poly-silicon. Furthermore, the present invention uses the pulsed rapid thermal annealing process (PRTP) using the infrared rays to instantly heat, to selectively heat the materials by taking the advantage that different materials have different absorption rates to the infrared rays.

Abstract: The present invention relates to a heating plate crystallization method used in the crystallization process for the poly-silicon thin-film transistor, and more particularly, the present invention relates to a heating plate crystallization method by using a pulsed rapid thermal annealing process (PRTP) By means of the characteristic provided by the present invention, namely, the heating plate area has a better absorption rate to the infrared rays and has a high thermal stability. The heating plate area is used for absorbing the infrared rays, and after the heating, the energy is indirectly transferred to the amorphous layer via a thermal conduction method so that the amorphous layer will be rapidly crystallized to form the poly-silicon. Furthermore, the present invention uses the pulsed rapid thermal annealing process (PRTP) using the infrared rays to instantly heat, to selectively heat the materials by taking the advantage that different materials have different absorption rates to the infrared rays.

Abstract: A TFT with a microcrystalline film. The channel is composed by a microcrystalline silicon layer and an amorphous silicon layer. The microcrystalline silicon layer is disposed near the gate electrode as the first channel layer, providing a current flow path in a horizontal orientation. The amorphous silicon layer is disposed away from the gate electrode as the second channel layer, providing a current flow path in a vertical orientation. Accordingly, the driving current of the transistor can be elevated due to the high conductivity of the microcrystalline silicon layer. Moreover, unnecessary current occurring when the transistor is switched off is reduced due to the high resistance of the amorphous silicon layer.

Abstract: A method for producing plastic active panel displays. The method comprises: providing a glass substrate, followed by the formation of a sacrificial layer on top of the glass substrate, forming thin film transistor (TFT) on the sacrificial layer, forming a display material on the TFT, subjecting the glass substrate to laser so that the glass substrate and the sacrificial layer are detached from the TFT, thereby exposing the TFT, and attaching a plastic substrate to the TFT.

Abstract: A method of forming a flexible thin film transistor (TFT) display device. A metal foil serving as a flexible metal substrate of a display device is provided, wherein the metal foil is an aluminum alloy foil, a titanium foil or a titanium alloy foil. The thickness of the metal foil is 0.05˜0.8 mm. An insulation layer is formed on the flexible metal substrate. A thin film transistor (TFT) array is formed on the insulation layer. In addition, the aluminum alloy foil can include magnesium of 0.01˜1% wt and/or silicon of 0.01˜1% wt and the titanium alloy foil can include aluminum of 0.01˜20% wt and/or molybdenum of 0.01˜20% wt.