Abstract: A semiconductor structure includes a source/drain feature in the semiconductor layer. The semiconductor structure includes a dielectric layer over the source/drain feature. The semiconductor structure includes a silicide layer over the source/drain feature. The semiconductor structure includes a barrier layer over the silicide layer. The semiconductor structure includes a seed layer over the barrier layer. The semiconductor structure includes a metal layer between a sidewall of the seed layer and a sidewall of the dielectric layer, a sidewall of each of the silicide layer, the barrier layer, and the metal layer directly contacting the sidewall of the dielectric layer. The semiconductor structure includes a source/drain contact over the seed layer.

Abstract: Disclosed herein is related to a method for extending lifespan and/or delaying aging in a subject; the method comprises administering to the subject with an effective amount of (24S)-3?-hydroxy-5?-stigmastan-6-one, wherein the delaying aging comprises increasing vitality, muscle strength or motor coordination, insulin sensitivity, or basal metabolic rate; and/or reducing muscle weakness, loss of balance, hair graying, kyphosis, or hyperglycemia. Also encompassed in the present disclosure are methods for promoting weight loss or treating type 2 diabetes mellitus in a subject, in which the methods comprise administering to the subject an effective amount of (24S)-3?-hydroxy-5?-stigmastan-6-one.

Abstract: A semiconductor package includes a substrate having a top surface and a bottom surface; a semiconductor die mounted on the top surface of the substrate; and a two-part lid mounted on a perimeter of the top surface of the substrate and housing the semiconductor die. The lid comprises an annular lid base and a cover plate removably installed on the annular lid base. The semiconductor package can be uncovered by removing the cover plate and a forced cooling module can be installed in place of the cover plate.

Abstract: A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming a source/drain region over the fin adjacent to the gate structure; forming an interlayer dielectric (ILD) layer over the source/drain region around the gate structure; forming an opening in the ILD layer to expose the source/drain region; forming a silicide region and a barrier layer successively in the openings over the source/drain region, where the barrier layer includes silicon nitride; reducing a concentration of silicon nitride in a surface portion of the barrier layer exposed to the opening; after the reducing, forming a seed layer on the barrier layer; and forming an electrically conductive material on the seed layer to fill the opening.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a semiconductor die, a lid, a liquid metal, a gel and a thermal dissipation structure. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate and covers the semiconductor die. The lid has an opening to expose the semiconductor die. The liquid metal is disposed on the semiconductor die. The gel is disposed between the semiconductor die and the lid. The thermal dissipation structure is disposed on the lid and covers the opening. The semiconductor die, the gel and the thermal dissipation structure form a closed space for accommodating the liquid metal.

Abstract: A semiconductor package includes a substrate having a top surface and a bottom surface; a semiconductor die mounted on the top surface of the substrate; and a two-part lid mounted on a perimeter of the top surface of the substrate and housing the semiconductor die. The lid comprises an annular lid base and a cover plate removably installed on the annular lid base. The semiconductor package can be uncovered by removing the cover plate and a forced cooling module can be installed in place of the cover plate.

Abstract: A flip chip ball grid array package includes a package substrate and a flip chip device mounted on a top surface of the package substrate. The flip chip device includes a semiconductor integrated circuit die; an epoxy molding compound encapsulating vertical sidewalls of the semiconductor integrated circuit die; a re-distribution layer structure disposed on an active surface of the semiconductor integrated circuit die and on a lower surface of the epoxy molding compound; a sintered nanosilver layer disposed on a passive rear surface of the semiconductor integrated circuit die and on an upper surface of the epoxy molding compound; and a stiffener ring mounted around the flip chip device on the package substrate.

Abstract: A semiconductor device is provided. The semiconductor device includes a carrier, an electronic component, an adapter, a first metal wire and a second metal wire. The electronic component is disposed on the carrier. The adapter is disposed on the carrier. The first metal wire connects the electronic component and the adapter. The second metal wire connects the adapter and the carrier.

Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.

Abstract: A semiconductor package structure includes a first redistribution layer, a second redistribution layer, a first semiconductor die, a second semiconductor die, an adhesive layer, and a molding material. The second redistribution layer is disposed over the first redistribution layer. The first semiconductor die and the second semiconductor die are stacked vertically between the first redistribution layer and the second redistribution layer. The first semiconductor die is electrically coupled to the first redistribution layer, and the second semiconductor die is electrically coupled to the second redistribution layer. The adhesive layer extends between the first semiconductor die and the second semiconductor die. The molding material surrounds the first semiconductor die, the adhesive layer, and the second semiconductor die.

Abstract: An antenna-in-module package-on-package includes an antenna package having a top surface and a bottom surface opposing the top surface. The antenna package includes a radiative antenna element on the bottom surface. A chip package is mounted on the top surface of the antenna package. The chip package includes a semiconductor chip. Conductive elements are disposed between the antenna package and the chip package to electrically interconnect the chip package and the antenna package. A radiative antenna element is disposed on the bottom surface of the antenna package. At least one air trench is disposed on the bottom surface of the antenna package.

Abstract: A semiconductor package including a base comprising an upper surface and a lower surface that is opposite to the upper surface; a radio-frequency (RF) module embedded near the upper surface of the base; an integrated circuit (IC) die mounted on the lower surface of the base in a flip-chip manner so that a backside of the IC die is available for heat dissipation; a plurality of conductive structures disposed on the lower surface of the base and arranged around the IC die; and a metal thermal interface layer comprising a backside metal layer that is in contact with the backside of the IC die, and a solder paste conformally printed on the backside metal layer.

Abstract: The present invention relates to a negative pressure wound therapy device, system and method. The negative pressure wound therapy device is connected with a dressing, and comprises a housing, a control circuit board, a pump, and an aspiration conduit. The pump generates negative pressure. The pump may comprise a voltage-actuated deformation element (such as piezoelectric vibration element) to push fluid from an aspiration end to a discharge end. The aspiration conduit has a pump end and a dressing end. The pump end is fluidly connected to the aspiration end of the pump, and the dressing end is fluidly connected to the dressing used for covering a wound. The control circuit board is disposed in the housing, controls the pump to generate the negative pressure in the aspiration conduit, and applies negative pressure to the wound covered by the dressing via the aspiration conduit.

Abstract: A semiconductor device and methods of formation are provided. A semiconductor device includes an annealed cobalt plug over a silicide in a first opening of the semiconductor device, wherein the annealed cobalt plug has a repaired lattice structure. The annealed cobalt plug is formed by annealing a cobalt plug at a first temperature for a first duration, while exposing the cobalt plug to a first gas. The repaired lattice structure of the annealed cobalt plug is more regular or homogenized as compared to a cobalt plug that is not so annealed, such that the annealed cobalt plug has a relatively increased conductivity or reduced resistivity.

Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.

Abstract: The present invention relates to a negative pressure wound therapy device, system and method. The negative pressure wound therapy device is connected with a dressing, and comprises a housing, a control circuit board, a pump, and an aspiration conduit. The pump generates negative pressure. The pump may comprise a voltage-actuated deformation element (such as piezoelectric vibration element) to push fluid from an aspiration end to a discharge end. The aspiration conduit has a pump end and a dressing end. The pump end is fluidly connected to the aspiration end of the pump, and the dressing end is fluidly connected to the dressing used for covering a wound. The control circuit board is disposed in the housing, controls the pump to generate the negative pressure in the aspiration conduit, and applies negative pressure to the wound covered by the dressing via the aspiration conduit.

Abstract: A semiconductor package includes a substrate having a top surface and a bottom surface; a semiconductor die mounted on the top surface of the substrate; and a two-part lid mounted on a perimeter of the top surface of the substrate and housing the semiconductor die. The lid comprises an annular lid base and a cover plate removably installed on the annular lid base. The semiconductor package can be uncovered by removing the cover plate and a forced cooling module can be installed in place of the cover plate.

Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.