Patents by Inventor Chong Chan
Chong Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9768089Abstract: A semiconductor wafer stack and a method of forming a semiconductor device is disclosed. The method includes providing a wafer stack with first and second wafers bonded together. The wafers include edge and non-edge regions, and at least one of the first and second wafers includes devices formed in the non-edge region. The first wafer serves as the base wafer while the second wafer serves as the top wafer of the wafer stack, where the base wafer is wider than the top wafer, providing a step edge of the wafer stack. An edge protection seal is formed on the wafer stack, where first and second layers are deposited on the wafer stack including at the top wafer and step edge of the wafer stack. The portion of the first and second layers on the step edge of the wafer stack forms the edge protection seal which protects the devices in the wafer stack in subsequent processing.Type: GrantFiled: August 1, 2016Date of Patent: September 19, 2017Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.Inventors: Ranjan Rajoo, Kai Chong Chan
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Publication number: 20170259226Abstract: This invention provides apparatuses and methods to supply a steady volume of liquid with low pressure fluctuation that can be used to form a liquid blend or to supply other equipment or tools. The invention uses a flow controller that controls the flow rate for liquid that is fed to a liquid supply pipe from a recirculation loop that is connected thereto, the recirculation loop has a dip tube for insertion into a liquid supply container, pump, and liquid backpressure control device.Type: ApplicationFiled: October 8, 2015Publication date: September 14, 2017Inventors: Benjamin Patrick Bayer, Laura Suk Chong Chan, Fady Khalil Ereifej, Daniel Valentin Roybal
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Patent number: 9761561Abstract: Semiconductor devices and methods of forming a semiconductor device are disclosed. The device includes a wafer with top and bottom surfaces. The wafer includes edge and non-edge regions. The wafer includes a plurality of devices and partially processed TSV contacts disposed in the non-edge region and a groove disposed at the edge region. The groove enables edges of the wafer to be automatically trimmed off as the wafer is subject to a back-grinding planarization process to expose the TSV contacts in the non-edge region of the wafer.Type: GrantFiled: March 18, 2015Date of Patent: September 12, 2017Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.Inventors: Ranjan Rajoo, Kai Chong Chan
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Patent number: 9736039Abstract: In a method of identifying matching packets at different locations in a network, a first plurality of packets is received at a first location in the network, and a first subset thereof is selected in accordance with a filter. A second plurality of packets is received at a second location in the network, and a second subset thereof is selected in accordance with the same filter. Each packet in the first and second subsets is parsed to extract invariant header fields from an outermost IP header inwards, until a minimal set of invariant header fields is obtained for that packet, or until it is determined that a minimal set is not obtainable for that packet. A packet signature is computed from the minimal set for each packet having a minimal set, and the packet signatures arc compared to identify matching packets in the first and second subsets.Type: GrantFiled: September 2, 2016Date of Patent: August 15, 2017Assignee: Viavi Solutions Inc.Inventors: Lai-chong Chan, Brian Moody
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Publication number: 20160373320Abstract: In a method of identifying matching packets at different locations in a network, a first plurality of packets is received at a first location in the network, and a first subset thereof is selected in accordance with a filter. A second plurality of packets is received at a second location in the network, and a second subset thereof is selected in accordance with the same filter. Each packet in the first and second subsets is parsed to extract invariant header fields from an outermost IP header inwards, until a minimal set of invariant header fields is obtained for that packet, or until it is determined that a minimal set is not obtainable for that packet. A packet signature is computed from the minimal set for each packet having a minimal set, and the packet signatures arc compared to identify matching packets in the first and second subsets.Type: ApplicationFiled: September 2, 2016Publication date: December 22, 2016Inventors: Lai-chong CHAN, Brian MOODY
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Publication number: 20160343629Abstract: A semiconductor wafer stack and a method of forming a semiconductor device is disclosed. The method includes providing a wafer stack with first and second wafers bonded together. The wafers include edge and non-edge regions, and at least one of the first and second wafers includes devices formed in the non-edge region. The first wafer serves as the base wafer while the second wafer serves as the top wafer of the wafer stack, where the base wafer is wider than the top wafer, providing a step edge of the wafer stack. An edge protection seal is formed on the wafer stack, where first and second layers are deposited on the wafer stack including at the top wafer and step edge of the wafer stack. The portion of the first and second layers on the step edge of the wafer stack forms the edge protection seal which protects the devices in the wafer stack in subsequent processing.Type: ApplicationFiled: August 1, 2016Publication date: November 24, 2016Inventors: Ranjan RAJOO, Kai Chong CHAN
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Publication number: 20160276310Abstract: Semiconductor devices and methods of forming a semiconductor device are disclosed. The device includes a wafer with top and bottom surfaces. The wafer includes edge and non-edge regions. The wafer includes a plurality of devices and partially processed TSV contacts disposed in the non-edge region and a groove disposed at the edge region. The groove enables edges of the wafer to be automatically trimmed off as the wafer is subject to a back-grinding planarization process to expose the TSV contacts in the non-edge region of the wafer.Type: ApplicationFiled: March 18, 2015Publication date: September 22, 2016Inventors: Ranjan RAJOO, Kai Chong CHAN
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Patent number: 9438517Abstract: In a method of identifying matching packets at different locations in a network, a first plurality of packets is received at a first location in the network, and a first subset thereof is selected in accordance with a filter. A second plurality of packets is received at a second location in the network, and a second subset thereof is selected in accordance with the same filter. Each packet in the first and second subsets is parsed to extract invariant header fields from an outermost IP header inwards, until a minimal set of invariant header fields is obtained for that packet, or until it is determined that a minimal set is not obtainable for that packet. A packet signature is computed from the minimal set for each packet having a minimal set, and the packet signatures are compared to identify matching packets in the first and second subsets.Type: GrantFiled: October 30, 2013Date of Patent: September 6, 2016Assignee: Viavi Solutions Inc.Inventors: Lai-chong Chan, Brian Moody
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Patent number: 9406577Abstract: A semiconductor wafer stack and a method of forming a semiconductor device is disclosed. The method includes providing first and second wafers with top and bottom surfaces. The wafers include edge and non-edge regions, and the first wafer includes devices formed in the non-edge region. A first protection seal may be formed at the edge region of the first wafer. The first and second wafers may further be bonded to form a device stack. The protection seal in the device stack contacts the first and second wafers to form a seal, and protects the devices in subsequent processing.Type: GrantFiled: March 10, 2014Date of Patent: August 2, 2016Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.Inventors: Ranjan Rajoo, Kai Chong Chan
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Patent number: 9075268Abstract: A method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device includes injecting a liquid crystal into a liquid crystal receiving space. The liquid crystal receiving space is disposed between a first substrate, a second substrate that faces the first substrate, and a sealing member interposed between the first and second substrates. The method for adjusting an amount of liquid crystal in an LCD device further includes irradiating a light to a portion of the sealing member while varying an irradiating angle of the light so as to form a repair region at the sealing member that has a thickness smaller than that of the sealing member. The method for adjusting an amount of liquid crystal in an LCD device also comprises pressurizing the liquid crystal to form an opening in the repair region of the sealing member and discharge some of the liquid crystal from the liquid crystal receiving space through the opening formed in the repair region, and sealing the opening of the repair region.Type: GrantFiled: April 14, 2010Date of Patent: July 7, 2015Assignee: LG DISPLAY CO., LTD.Inventors: Chong Chan Eun, Sang Ho Park, Tae Man Kim, Jun Beom Cho, Chang Gun Song
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Patent number: 9068941Abstract: This disclosure relates to a dye solution monitoring device and a dye solution controlling device for a dye-sensitized solar cell, more particularly, to a dye solution monitoring device for a dye-sensitized solar cell comprising a light-absorption device for measuring absorbance of a dye solution for a dye-sensitized solar cell, and a pH measuring device for measuring pH of a dye solution for a dye-sensitized solar cell; and, a dye solution controlling device for a dye-sensitized solar cell further comprising a dye supply device supplying dye of high concentration, and an acid or base supply device for pH control, in addition to the monitoring device. According to the present invention, a dye adsorption process may be optimized in real time to manufacture a solar cell of high quality with high productivity, maximize utilization of expensive dye, and minimize the waste, thereby reducing production cost.Type: GrantFiled: March 8, 2010Date of Patent: June 30, 2015Assignee: DONGJIN SEMICHEM CO., LTDInventors: Chong-chan Lee, Yoon-Gil Yim
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Patent number: 8988646Abstract: A method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device includes injecting a liquid crystal into a liquid crystal receiving space. The liquid crystal receiving space is disposed between a first substrate, a second substrate that faces the first substrate, and a sealing member interposed between the first and second substrates. The method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device further includes reducing a thickness of the sealing member at a predetermined portion of the sealing member to form a repair region, and pressurizing the liquid crystal to break the sealing member at the repair region to discharge some of the liquid crystal from the liquid crystal receiving space, so as to adjust the amount of the liquid crystal in the liquid crystal receiving space. The method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device also includes resealing the broken repair region of the sealing member.Type: GrantFiled: March 23, 2011Date of Patent: March 24, 2015Assignee: LG Display Co., Ltd.Inventors: Chong Chan Eun, Sang Ho Park, Tae Man Kim, June Beom Cho, Chang Gun Song
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Publication number: 20140264762Abstract: A semiconductor wafer stack and a method of forming a semiconductor device is disclosed. The method includes providing first and second wafers with top and bottom surfaces. The wafers include edge and non-edge regions, and the first wafer includes devices formed in the non-edge region. A first protection seal may be formed at the edge region of the first wafer. The first and second wafers may further be bonded to form a device stack. The protection seal in the device stack contacts the first and second wafers to form a seal, and protects the devices in subsequent processing.Type: ApplicationFiled: March 10, 2014Publication date: September 18, 2014Applicant: GLOBAL FOUNDRIES Singapore Pte. Ltd.Inventors: Ranjan RAJOO, Kai Chong CHAN
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Publication number: 20140119231Abstract: In a method of identifying matching packets at different locations in a network, a first plurality of packets is received at a first location in the network, and a first subset thereof is selected in accordance with a filter. A second plurality of packets is received at a second location in the network, and a second subset thereof is selected in accordance with the same filter. Each packet in the first and second subsets is parsed to extract invariant header fields from an outermost IP header inwards, until a minimal set of invariant header fields is obtained for that packet, or until it is determined that a minimal set is not obtainable for that packet. A packet signature is computed from the minimal set for each packet having a minimal set, and the packet signatures are compared to identify matching packets in the first and second subsets.Type: ApplicationFiled: October 30, 2013Publication date: May 1, 2014Inventors: Lai-chong CHAN, Brian MOODY
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Patent number: 8610266Abstract: A semiconductor device (5) for radio frequency applications has a semiconductor chip (1) with an integrated circuit accommodated in a radio frequency package. Inside bumps (2) comprise inside contacts between the semiconductor chip (1) and a redistribution substrate (3). The inside bumps (2) have a metallic or plastic core (6) and a coating layer (7) of a noble metal.Type: GrantFiled: September 5, 2006Date of Patent: December 17, 2013Assignee: Infineon Technologies AGInventors: Kai Chong Chan, Gerald Ofner
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Patent number: 8603909Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a semiconductor substrate; forming a core region on the semiconductor substrate with the core region having a core side; forming an inner bond pad on the semiconductor substrate with the inner bond pad having an inner core pad and an inner probe pad with the inner probe pad further from the core region than the inner core pad; and forming an outer bond pad on the semiconductor substrate and adjacent the inner bond pad with the outer bond pad having an outer core pad and an outer probe pad with the outer probe pad closer to the core region than the outer core pad, and the inner probe pad and the outer probe pad aligned parallel to the core side.Type: GrantFiled: November 5, 2009Date of Patent: December 10, 2013Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Alfred Yeo, Kai Chong Chan
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Publication number: 20130233370Abstract: The invention relates to a dye-sensitized solar cell and a method of preparing the same, and it can increase the efficiency and productivity of dye-sensitized solar cells at the same time by replacing all or part of the expensive light-absorbing dyes by carbon nanotubes (CNT), graphenes or carbon blacks.Type: ApplicationFiled: April 26, 2013Publication date: September 12, 2013Applicant: Dongjin Semichem Co., Ltd.Inventors: Chong-Chan Lee, Chan-Seok Park
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Patent number: 8405814Abstract: A liquid crystal display device and fabricating method thereof are disclosed, by which insufficient or excessive filling of liquid crystals can be cured by adjusting a liquid crystal quantity in a liquid crystal display device having the insufficient or excessive filling of liquid crystals generated thereon. The present invention includes the steps of preparing a liquid crystal cell including a first substrate, a second substrate and a liquid crystal layer between the first and second substrates, checking a liquid crystal quantity within the liquid crystal cell, forming a hole in the liquid crystal cell, adjusting the liquid crystal quantity through the hole, and blocking the hole.Type: GrantFiled: June 30, 2006Date of Patent: March 26, 2013Assignee: LG Display Co., Ltd.Inventors: Chong Chan Eun, Tae Man Kim
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Publication number: 20120074519Abstract: An improved crack stop structure (and method of forming) is provided within a die seal ring of an integrated circuit die to increase crack resistance during the dicing of a semiconductor wafer. The crack stop structure includes a stack layer (of alternating insulating and conductive layers) and an anchor system extending from the stack layer to a predetermined point below the surface of the substrate. A crack stop trench is formed in the substrate and filled with material having good crack resistance to anchor the stack layer to the substrate.Type: ApplicationFiled: September 26, 2011Publication date: March 29, 2012Applicant: Chartered Semiconductor Manufacturing, Ltd.Inventors: Alfred Yeo, Kai Chong Chan
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Publication number: 20120037270Abstract: This disclosure relates to a dye solution monitoring device and a dye solution controlling device for a dye-sensitized solar cell, more particularly, to a dye solution monitoring device for a dye-sensitized solar cell comprising a light-absorption device for measuring absorbance of a dye solution for a dye-sensitized solar cell, and a pH measuring device for measuring pH of a dye solution for a dye-sensitized solar cell; and, a dye solution controlling device for a dye-sensitized solar cell further comprising a dye supply device supplying dye of high concentration, and an acid or base supply device for pH control, in addition to the monitoring device. According to the present invention, a dye adsorption process may be optimized in real time to manufacture a solar cell of high quality with high productivity, maximize utilization of expensive dye, and minimize the waste, thereby reducing production cost.Type: ApplicationFiled: March 10, 2009Publication date: February 16, 2012Applicant: DONGJIN SEMICHEM CO., LTDInventors: Chong-chan Lee, Yoon-Gil Yim