Abstract: Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate has a triple well structure such that a bias is applied to a p-well corresponding to a substrate of a ggNMOS device. Thus, a trigger voltage of the SCR is reduced. In addition, two discharge paths are formed using two SCRs including PNP and NPN bipolar transistors. As a result, the ESD protection circuit can have greater discharge capacity.

Abstract: Provided are a low voltage differential signal driver circuit and a method for controlling the same. The differential signal driver circuit includes: a differential amplification signal generator disposed between a power supply voltage terminal and a ground terminal, and outputting first and second differential amplification signals to first and second output terminals in response to first and second differential input signals, respectively; a common mode voltage generator for generating a common mode voltage in response to DC (direct current) offset voltages of the first and second differential amplification signals; and a variable load portion for controlling a resistance between the power supply voltage terminal and the first output terminal and a resistance between the power supply voltage terminal and the second output terminal in response to the common mode voltage such that the first and second differential amplification signals have constant DC offset voltages.

Abstract: A digital-to-analog converter (DAC) for a sigma-delta modulator is provided. The DAC has a switched capacitor structure using an operational amplifier (OP amp) and performs a function exceeding 3-level using a switching method employing only one capacitor in single ended form. Thus, DAC non-linearity caused by capacitor mismatching does not occur, and the number of output levels of the DAC is increased. Also, the DAC capacitor may be applied to a general DAC to increase the ratio of DAC output levels to capacitors.

Abstract: Provided is a digital-to-analog converter converting a digital signal into an analog signal. The digital-to-analog converter includes a decoder for selecting a current source from digital inputs, a current switch driver for driving a current switch of the current source, and a random selection switch disposed between the decoder and the current switch driver, and randomly resetting a connection relationship between outputs of the decoder and inputs of the current switch driver every clock. According to the present invention, the linearity of the digital-to-analog converter may be enhanced by changing the current source selected every clock signal to compensate for non-linearity of the digital-to-analog converter according to the spatial arrangement of the current sources.

Abstract: Disclosed is a CMOS variable gain amplifier (VGA). The variable gain amplifier comprises a voltage-current converter for converting voltages of a wide input range into currents, a current shared circuit for receiving the currents from the voltage-current converter and controlling values of output currents depending on first and second control voltages, and a current-voltage converter for converting the output currents from the current shared circuit into differential voltages depending on a bias voltage in order to obtain a variable gain. The voltage amplifier having a variable gain is provided by controlling the value of the output current of the drain terminal against the gate voltage of the NMOS transistor constituting the current shared circuit. Therefore, an integrated circuit (IC) type variable gain amplifier operating a high speed at a low supply voltage can be obtained.

Abstract: Provided are a low voltage differential signal driver circuit and a method for controlling the same. The differential signal driver circuit includes: a differential amplification signal generator disposed between a power supply voltage terminal and a ground terminal, and outputting first and second differential amplification signals to first and second output terminals in response to first and second differential input signals, respectively; a common mode voltage generator for generating a common mode voltage in response to DC (direct current) offset voltages of the first and second differential amplification signals; and a variable load portion for controlling a resistance between the power supply voltage terminal and the first output terminal and a resistance between the power supply voltage terminal and the second output terminal in response to the common mode voltage such that the first and second differential amplification signals have constant DC offset voltages.

Abstract: Disclosed is a CMOS variable gain amplifier. The variable gain amplifier comprises a first means for first and second differential input voltages, a second means for controlling its transconductance to generate an output current according to a control voltage, a third means for a bias voltage to generate bias current by current mirror, and to supply a stabilized bias current to the second means using the replica current, and a fourth means for generating an output voltage with a variable gain according to control voltage by its output current generated in the second means. Therefore, the present invention provides a function of controlling low distortion and high linearity in low voltage and a high-speed operation by the supply of a stabilized sharing current bias, and can control a voltage gain in a wide range by the control voltage.

Abstract: Disclosed is a current-steering digital-to-analog converter (DAC) which comprises a decoder for receiving an N-bit digital input signal and converting the same into first and second (N?1)-bit digital signals, M (=2N?1) current cells for supplying the current based on the two digital signals, a current cell driver for generating a first analog voltage and a second analog voltage corresponding to the currents based on the two (N?1)-bit digital signals by control of a first clock signal and a second clock signal, and an amplifying circuit for sampling and holding the first and second analog voltage with reference to the first and second clock signals to generate a glitch-removed signal.

Abstract: Disclosed is a variable gain amplifier having low voltage, low distortion, high linearity and wideband operating characteristics.

Abstract: Disclosed is a current-steering digital-to-analog converter (DAC) which comprises a decoder for receiving an N-bit digital input signal and converting the same into first and second (N-1)-bit digital signals, M (=2N-1) current cells for supplying the current based on the two digital signals, a current cell driver for generating a first analog voltage and a second analog voltage corresponding to the currents based on the two (N-1)-bit digital signals by control of a first clock signal and a second clock signal, and an amplifying circuit for sampling and holding the first and second analog voltage with reference to the first and second clock signals to generate a glitch-removed signal.

Abstract: Disclosed is a CMOS variable gain amplifier. The variable gain amplifier comprises a first means for first and second differential input voltages, a second means for controlling its transconductance to generate an output current according to a control voltage, a third means for a bias voltage to generate bias current by current mirror, and to supply a stabilized bias current to the second means using the replica current, and a fourth means for generating an output voltage with a variable gain according to control voltage by its output current generated in the second means. Therefore, the present invention provides a function of controlling low distortion and high linearity in low voltage and a high-speed operation by the supply of a stabilized sharing current bias, and can control a voltage gain in a wide range by the control voltage.

Abstract: Disclosed is a variable gain amplifier having low voltage, low distortion, high linearity and wideband operating characteristics.

Abstract: Disclosed is a CMOS variable gain amplifier (VGA). The variable gain amplifier comprises a voltage-current converter for converting voltages of a wide input range into currents, a current shared circuit for receiving the currents from the voltage-current converter and controlling values of output currents depending on first and second control voltages, and a current-voltage converter for converting the output currents from the current shared circuit into differential voltages depending on a bias voltage in order to obtain a variable gain. The voltage amplifier having a variable gain is provided by controlling the value of the output current of the drain terminal against the gate voltage of the NMOS transistor constituting the current shared circuit. Therefore, an integrated circuit (IC) type variable gain amplifier operating a high speed at a low supply voltage can be obtained.