Patents by Inventor Chong Shin

Chong Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230180719
    Abstract: A pet toilet that identifies a pet device by using the pet device worn by a pet includes an electromagnetic signal receiver that receives a first electromagnetic signal including pet device information from a plurality of pet devices, a connection unit that is connected to at least one of the plurality of pet devices based on the strength of the received first electromagnetic signal, an electromagnetic signal transmitter that transmits a second electromagnetic signal to the at least one pet device, and an identification unit that identifies a specific pet device worn by a specific pet from the pet device information based on the strength of the second electromagnetic signal received by the at least one pet device from the at least one pet device.
    Type: Application
    Filed: November 23, 2022
    Publication date: June 15, 2023
    Applicant: PurrSong, Inc.
    Inventors: Tae Gu NOH, Eeon Chong SHIN, Jin Won PARK, Chang Hyeon BAK
  • Patent number: 10684979
    Abstract: A memory system configured to support internal data (DQ) termination of a data buffer is provided. The memory system includes a first memory module, which is a target memory module accessed by an external device, and a second memory module, which is a non-target memory module not accessed by the external device. The second memory module performs the internal DQ termination on an internal data path during an internal operation mode in which data communication is performed by using the internal data path between internal memory chips. Signal reflection over the internal data path is reduced or prohibited due to the internal DQ termination, and thus, signal integrity is improved.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: June 16, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-young Lim, Hui-chong Shin, In-su Choi, Young-ho Lee
  • Publication number: 20200065289
    Abstract: A memory system configured to support internal data (DQ) termination of a data buffer is provided. The memory system includes a first memory module, which is a target memory module accessed by an external device, and a second memory module, which is a non-target memory module not accessed by the external device. The second memory module performs the internal DQ termination on an internal data path during an internal operation mode in which data communication is performed by using the internal data path between internal memory chips. Signal reflection over the internal data path is reduced or prohibited due to the internal DQ termination, and thus, signal integrity is improved.
    Type: Application
    Filed: November 1, 2019
    Publication date: February 27, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sun-young Lim, Hui-chong Shin, ln-su Choi, Young-ho Lee
  • Patent number: 10496584
    Abstract: A memory system configured to support internal data (DQ) termination of a data buffer is provided. The memory system includes a first memory module, which is a target memory module accessed by an external device, and a second memory module, which is a non-target memory module not accessed by the external device. The second memory module performs the internal DQ termination on an internal data path during an internal operation mode in which data communication is performed by using the internal data path between internal memory chips. Signal reflection over the internal data path is reduced or prohibited due to the internal DQ termination, and thus, signal integrity is improved.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: December 3, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-young Lim, Hui-chong Shin, In-su Choi, Young-ho Lee
  • Publication number: 20180329850
    Abstract: A memory system configured to support internal data (DQ) termination of a data buffer is provided. The memory system includes a first memory module, which is a target memory module accessed by an external device, and a second memory module, which is a non-target memory module not accessed by the external device. The second memory module performs the internal DQ termination on an internal data path during an internal operation mode in which data communication is performed by using the internal data path between internal memory chips. Signal reflection over the internal data path is reduced or prohibited due to the internal DQ termination, and thus, signal integrity is improved.
    Type: Application
    Filed: March 9, 2018
    Publication date: November 15, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sun-young Lim, Hui-chong Shin, In-su Choi, Young-ho Lee
  • Patent number: 9731063
    Abstract: A portable functional vaginal cleansing apparatus is provided to prevent inflammation in vagina, to maintain cleanness, and to enhance massage effect. A portable functional vaginal cleansing apparatus comprises: a doughnut-shaped main body; a semicylinder water tank with a water level indicator (100) on the outside and a coupling protrusion inside; a handle part (380) with a coupling groove mounted at the coupling protrusion; a pumping unit (210) with a motor and a pump; and a control unit (290) with a rotator which is formed to rotate within a predetermined range, a insertion protrusion connected to a hose, an insertion unit with a nozzle part, an on and off switch, a water level controller, and an operation lamp.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: August 15, 2017
    Inventors: Mi Chong Shin, In Sung Shin
  • Publication number: 20170146778
    Abstract: The present invention comprises: a first lens having a negative refractive index, the first lens being a meniscus lens wherein the surface facing an object is convex toward the object and the surface facing an image is concave; a second lens having a negative refractive index, the second lens being a meniscus lens wherein the surface facing the first lens is convex toward the first lens and the surface facing the image is concave; a third lens having a negative refractive index, the third lens being a lens wherein the surface facing the image is concave; a fourth lens having a positive refractive index, wherein both surfaces are concave; a fifth lens which is located behind the fourth lens and configured in such a way that a third unit lens having a positive refractive index is bonded with a fourth unit lens having a negative refractive index; and a sixth lens which is biconvex and has a positive refractive index.
    Type: Application
    Filed: June 8, 2015
    Publication date: May 25, 2017
    Inventors: Jae Cheol Jeong, Hoe Sun Lee, Jong Sang Jung, Seung Chong Shin, Hyung Kyu Park
  • Patent number: 9520160
    Abstract: A memory module includes a plurality of semiconductor memory devices and a circuit board. The circuit board is electrically connected to the plurality of semiconductor memory devices, and a signal line is disposed in the outermost layer of the circuit board. An electrical reference for the signal line is provided in a layer of the circuit board that is not adjacent to the outermost layer. Accordingly, an impedance of the signal line may be increased, and signal integrity of a signal transmitted through the signal line may be improved.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: December 13, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chil-Nam Yoon, Seon-Ryeong Kang, Hui-Chong Shin
  • Publication number: 20140301125
    Abstract: A memory module includes a plurality of semiconductor memory devices and a circuit board. The circuit board is electrically connected to the plurality of semiconductor memory devices, and a signal line is disposed in the outermost layer of the circuit board. An electrical reference for the signal line is provided in a layer of the circuit board that is not adjacent to the outermost layer. Accordingly, an impedance of the signal line may be increased, and signal integrity of a signal transmitted through the signal line may be improved.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 9, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: CHIL-NAM YOON, SEON-RYEONG KANG, HUI-CHONG SHIN
  • Publication number: 20140276429
    Abstract: A portable functional vaginal cleansing apparatus is provided to prevent inflammation in vagina, to maintain cleanness, and to enhance massage effect. A portable functional vaginal cleansing apparatus comprises: a doughnut-shaped main body; a semicylinder water tank with a water level indicator (100) on the outside and a coupling protrusion inside; a handle part (380) with a coupling groove mounted at the coupling protrusion; a pumping unit (210) with a motor and a pump; and a control unit (290) with a rotator which is formed to rotate within a predetermined range, a insertion protrusion connected to a hose, an insertion unit with a nozzle part, an on and off switch, a water level controller, and a operation lamp.
    Type: Application
    Filed: December 12, 2011
    Publication date: September 18, 2014
    Inventors: Mi Chong Shin, In Sung Shin
  • Patent number: 7814379
    Abstract: A memory module packaging test system may include a plurality of test slots into which a plurality of memory modules may be installed so that the system may simultaneously test the memory modules. The memory module packaging test system may use a server system for a registered dual in-line memory module (RDIMM) or a fully buffered dual in-line memory module (FBDIMM) so that the system may test an unbuffered dual in-line memory module (UDIMM).
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: October 12, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-kuk Lee, You-keun Han, Hui-chong Shin
  • Patent number: 7606110
    Abstract: A memory module, a memory unit, and a hub with a non-periodic clock and methods for using the same. An example memory module may include a phased locked loop, receiving an external, periodic clock and generating one or more internal periodic clocks and a plurality of memory units, receiving one of the internal periodic clocks or a non-periodic clock from an external source.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: October 20, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: You-Keun Han, Hui-Chong Shin, Seung-Jin Seo, Byung-Se So, Young-Man Ahn, Seung-Man Shin, Jung-Kuk Lee, Ho-Suk Lee
  • Patent number: 7519873
    Abstract: Methods and apparatuses for entering at least one memory into a test mode are provided. At least one test MRS bit may be stored in a first register for controlling the memory. At least one test MRS code may be programmed into a second register. Each of the at least one bits stored in the first register may correspond one of the at least one test MRS codes stored in the second register.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: April 14, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Man Shin, Seung-Jin Seo, You-Keun Han, Hui-Chong Shin, Jong-Geon Lee, Kyung-Hee Han
  • Publication number: 20080070094
    Abstract: Disclosed is an organic/inorganic composite electrolyte membrane comprising: (a) a sulfonated fluorine-free hydrocarbon-based polymer; and (b) inorganic particles capable of collecting moisture, wherein the inorganic particles include zeolite. Also, disclosed are an electrode comprising the zeolite as a component for forming a catalyst layer, a membrane electrode assembly comprising the electrolyte membrane and/or the electrode, and a fuel cell having the membrane electrode assembly. The organic/inorganic composite electrolyte membrane using the hydrophilic zeolite in combination with the sulfonated fluorine-free hydrocarbon-based polymer shows high proton conductivity, and thus can impart excellent quality to a fuel cell even under high-temperature and low-humidity conditions.
    Type: Application
    Filed: June 19, 2007
    Publication date: March 20, 2008
    Applicant: LG CHEM, LTD.
    Inventors: Yong Park, Chong Shin, Kwon Sohn, Bong Lee, Jae Chang, Eun Ju Kim
  • Publication number: 20080016400
    Abstract: A memory module packaging test system may include a plurality of test slots into which a plurality of memory modules may be installed so that the system may simultaneously test the memory modules. The memory module packaging test system may use a server system for a registered dual in-line memory module (RDIMM) or a fully buffered dual in-line memory module (FBDIMM) so that the system may test an unbuffered dual in-line memory module (UDIMM).
    Type: Application
    Filed: June 20, 2007
    Publication date: January 17, 2008
    Inventors: Jung-kuk Lee, You-keun Han, Hui-chong Shin
  • Publication number: 20070148520
    Abstract: Disclosed herein are a metal(III)-chromium-phosphate complex represented by a formula of M(III)xCr(HPO4)y(H2PO4)z and the use thereof. More particularly, disclosed are an organic/inorganic composite electrolyte membrane comprising said complex, an electrode comprising said complex, a membrane-electrode assembly (MEA) comprising said organic/inorganic composite electrolyte membrane and/or electrode, and a fuel cell comprising said membrane-electrode assembly.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Inventors: Chong Shin, Jung Won, Bong Lee, Yong Park, Jae Chang, Dong Kim
  • Publication number: 20070030814
    Abstract: A memory module and method thereof are provided. In the example method, a test signal may be applied to a plurality of memory chips included in the memory module. Output data from the plurality of memory chips may be received in response to the applied test signal. The received, output data may be divided into a plurality of groups. At least one of the plurality of groups may be selected in response to an output group selection signal. The at least one selected group may be output (e.g., to an external device). The example memory module may include a plurality of chips and a hub. The example memory module may be configured to perform the above-described example method.
    Type: Application
    Filed: July 20, 2006
    Publication date: February 8, 2007
    Inventors: Seung-Man Shin, Hui-Chong Shin, Jong-Geon Lee, Kyung-Hee Han
  • Publication number: 20070022335
    Abstract: Methods and apparatuses for entering at least one memory into a test mode are provided. At least one test MRS bit may be stored in a first register for controlling the memory. At least one test MRS code may be programmed into a second register. Each of the at least one bits stored in the first register may correspond one of the at least one test MRS codes stored in the second register.
    Type: Application
    Filed: September 8, 2006
    Publication date: January 25, 2007
    Inventors: Seung-Man Shin, Seung-Jin Seo, You-Keun Han, Hui-Chong Shin, Jong-Geon Lee, Kyung-Hee Han
  • Patent number: 7102178
    Abstract: An optoelectronic package (10) includes a base substrate (40), a plurality of solder pads (21) and a can (30). The base substrate includes a mounting seat (41) laminated first and second layer (421,422). The solder pads (21) respectively attach to a top surface (412) and a bottom surface (4212) of the base substrate and are electrically interconnected with each other via conductive material filled the through-holes (411,4223,4213) and conductor trace (45,45?). Optoelectronic components (not shown) are attached to the top surface of the base substrate and make electrical connection with the solder pads. The can includes a transparent device (31), an metal enclosure (32) and a housing (33), which hermetically seals to the base substrate protecting the optoelectronic components.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: September 5, 2006
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: Nan-Tsung Huang, Chong Shin Mou
  • Publication number: 20060160960
    Abstract: Disclosed is a sulfonated multiblock copolymer, which comprises a hydrophilic block (X) having a repeating unit represented by the following formula 1a, and a hydrophobic block (Y) having a repeating unit represented by the following formula 2, wherein the number (m) of the repeating unit of formula 1a in the hydrophilic block (X) and the number (n) of the repeating unit of formula 2 in the hydrophobic block (Y) satisfy the conditions of 4?m?400 and 4?n?400.
    Type: Application
    Filed: December 13, 2005
    Publication date: July 20, 2006
    Applicant: LG CHEM, LTD.
    Inventors: Jae Chang, Young Tae, Chong Shin, Bong Lee