Patents by Inventor Choon Chung

Choon Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11317514
    Abstract: The present invention relates to a method for forming a circuit using a seed layer. The method for forming a circuit using a seed layer according to the present invention, may realize a fine pitch, increase the adhesion of the circuit, and prevent the migration phenomenon.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: April 26, 2022
    Assignee: InkTec Co., Ltd.
    Inventors: Kwang-Choon Chung, Byung Woong Moon, Su Han Kim, Jung Yoon Moon, Hyeon-Jun Seong, Jae Rin Kim
  • Patent number: 11160171
    Abstract: The present invention relates to an etching solution composition for selectively etching only silver, a silver alloy, or a silver compound, and to a circuit forming method using the composition. The circuit forming method according to the present invention is characterized in that, in a substrate material in which an electrically conductive seed layer and a circuit layer are formed of heterogeneous metals, only the seed layer is selectively etched to enable the implementation of fine pitches. In addition, the present invention relates to a circuit forming method and an etching solution composition, wherein only a seed layer of silver (Ag), a silver alloy, or a silver compound is selectively etched without etching a copper (Cu) plated circuit.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: October 26, 2021
    Assignee: InkTee Co., Ltd.
    Inventors: Kwang-Choon Chung, Su Han Kim, Jung Yoon Moon, Hyeon-Jun Seong, Byung Woong Moon
  • Patent number: 11089691
    Abstract: The disclosure relates to a microcircuit forming method. The microcircuit forming method according to the disclosure comprises: a seed-layer forming step for forming a high-reflectivity seed layer on a substrate material by using a conductive material; a pattern-layer forming step for forming a pattern layer on the seed layer, the pattern layer having a pattern hole arranged thereon to allow the seed layer to be selectively exposed therethrough; a plating step for filling the pattern hole with a conductive material; a pattern-layer removing step for removing the pattern layer; and a seed-layer patterning step for removing a part of the seed layer which does not overlap the conductive material in the plating step, wherein the high-reflectivity seed layer has a specular reflection property.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: August 10, 2021
    Assignee: InkTec Co., Ltd.
    Inventors: Su Han Kim, Kwang-Choon Chung, Jung Yoon Moon, Sung In Ha, Byung Woong Moon
  • Patent number: 10887997
    Abstract: The present disclosure relates to an apparatus for manufacturing flexible printed circuit board (FPCB) and method for manufacturing the FPCB, having no limitations of length of a circuit pattern being formed on a base film.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: January 5, 2021
    Assignee: INKTEC CO., LTD.
    Inventors: Kwang-Choon Chung, Byung Woong Moon
  • Publication number: 20200389979
    Abstract: The present invention relates to an etching solution composition for selectively etching only silver, a silver alloy, or a silver compound, and to a circuit forming method using the composition. The circuit forming method according to the present invention is characterized in that, in a substrate material in which an electrically conductive seed layer and a circuit layer are formed of heterogeneous metals, only the seed layer is selectively etched to enable the implementation of fine pitches. In addition, the present invention relates to a circuit forming method and an etching solution composition, wherein only a seed layer of silver (Ag), a silver alloy, or a silver compound is selectively etched without etching a copper (Cu) plated circuit.
    Type: Application
    Filed: February 14, 2018
    Publication date: December 10, 2020
    Applicant: InkTec Co., Ltd.
    Inventors: Kwang-Choon CHUNG, Su Han KIM, Jung Yoon MOON, Hyeon-Jun SEONG, Byung Woong MOON
  • Publication number: 20200221578
    Abstract: The present invention relates to a method for forming a circuit using a seed layer. The method for forming a circuit using a seed layer according to the present invention, may realize a fine pitch, increase the adhesion of the circuit, and prevent the migration phenomenon.
    Type: Application
    Filed: February 9, 2018
    Publication date: July 9, 2020
    Applicant: Ink Tec Co., Ltd.
    Inventors: Kwang-Choon CHUNG, Byung Woong MOON, Su Han KIM, Jung Yoon MOON, Hyeon-Jun SEONG, Jae Rin KIM
  • Patent number: 10680339
    Abstract: Disclosed are exemplary embodiments of antennas that may be configured to be low profile, omnidirectional, ceiling mountable, and/or multiple-input multiple-output (MIMO). In an exemplary embodiment, an antenna generally includes first and second radiators and a ground plane. First and second edge portions of the ground plane may configured to be operable for reducing null at azimuth plane to thereby allow the antenna to have more omnidirectional radiation patterns for the azimuth plane. The antenna may be configured to have an asymmetrical perpendicular dipole configuration. A neutral line may be spaced apart from and proximity coupled to the ground plane. The ground plane may comprise first and second ground plane extension arms and/or a slant cutout defined between spaced-apart first and second lower portions of the ground plane. The ground plane may include a bridge portion extending between the spaced-apart first and second lower portions of the ground plane.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: June 9, 2020
    Assignee: Laird Connectivity, Inc.
    Inventors: Kok Jiunn Ng, Choon Chung Su, Yen Siang Tan
  • Publication number: 20200163219
    Abstract: The disclosure relates to a microcircuit forming method. The microcircuit forming method according to the disclosure comprises: a seed-layer forming step for forming a high-reflectivity seed layer on a substrate material by using a conductive material; a pattern-layer forming step for forming a pattern layer on the seed layer, the pattern layer having a pattern hole arranged thereon to allow the seed layer to be selectively exposed therethrough; a plating step for filling the pattern hole with a conductive material; a pattern-layer removing step for removing the pattern layer; and a seed-layer patterning step for removing a part of the seed layer which does not overlap the conductive material in the plating step, wherein the high-reflectivity seed layer has a specular reflection property.
    Type: Application
    Filed: February 27, 2018
    Publication date: May 21, 2020
    Applicant: Ink Tec Co., Ltd.
    Inventors: Su Han KIM, Kwang-Choon CHUNG, Jung Yoon MOON, Sung In HA, Byung Woong MOON
  • Publication number: 20200053881
    Abstract: The disclosure relates to a method for manufacturing a transfer film including an electrode layer, the method comprising: an electrode layer formation step of forming an electrode layer on a carrier member by using a conductive material; a placement step of placing the carrier member on at least one side of an insulating resin layer respectively; a bonding step of bonding the carrier member and the insulating resin layer together by applying pressure thereto; and a transfer step of removing the carrier member to transfer the electrode layer on the insulating resin layer.
    Type: Application
    Filed: February 20, 2018
    Publication date: February 13, 2020
    Applicant: InkTec Co., Ltd.
    Inventors: Kwang-Choon CHUNG, Byung Woong MOON, Su Han KIM, Jae Rin KIM
  • Patent number: 10383212
    Abstract: The present disclosure relates a printed circuit board having an EMI shielding function. In an example embodiment, the printed circuit board includes a substrate, a signal unit disposed on the substrate, a ground unit disposed in parallel with the signal unit, an insulation layer disposed above the substrate and covering the signal unit and the ground unit, an EMI shielding layer disposed on the insulation layer and under the substrate, respectively, and a shielding bridge passing through the substrate and the insulation layer at opposite sides of the signal unit and electrically connecting the EMI shielding layer disposed on the insulation layer to the EMI shielding layer disposed under the substrate.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: August 13, 2019
    Assignee: INKTEC CO., LTD.
    Inventors: Kwang-Choon Chung, Byung Woong Moon
  • Patent number: 10205241
    Abstract: Disclosed are exemplary embodiments of a low profile wideband and/or multiband omnidirectional antennas. In an exemplary embodiment, an antenna generally includes a radiator and a ground plane. The ground plane may include a slanted surface along or defining an edge portion of the ground plane. The slanted surface may be configured to be operable for reducing null at azimuth plane to thereby allow the antenna to have more omnidirectional radiation patterns for the azimuth plane. In another exemplary embodiment, an antenna generally includes a substrate, a radiator along the substrate, and electrically-conductive tape or foil defining at least part of a ground plane. The electrically-conductive tape or foil is coupled to a ground of the radiator via proximity coupling and electrically insulated by masking of the substrate.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: February 12, 2019
    Assignee: Laird Technology, Inc.
    Inventors: Kok Jiunn Ng, Choon Chung Su, Chit Yong Hang
  • Patent number: 10178773
    Abstract: Provided is a method for manufacturing a metal printed circuit board, the method including: printing a circuit pattern on a release film; applying a heat conductive insulating layer on the circuit pattern; laminating a heat conductive base layer on the heat conductive insulating layer and hot pressing the laminated heat conductive base layer and the heat conductive insulating layer; and removing the release film therefrom.
    Type: Grant
    Filed: December 24, 2012
    Date of Patent: January 8, 2019
    Assignee: INKTEC CO., LTD.
    Inventors: Kwang-Choon Chung, Nam Boo Cho, Young-Koo Han, Myung Bong Yoo, Woong Ku On
  • Publication number: 20190008033
    Abstract: The present disclosure relates a printed circuit board having an EMI shielding function. In an example embodiment, the printed circuit board includes a substrate, a signal unit disposed on the substrate, a ground unit disposed in parallel with the signal unit, an insulation layer disposed above the substrate and covering the signal unit and the ground unit, an EMI shielding layer disposed on the insulation layer and under the substrate, respectively, and a shielding bridge passing through the substrate and the insulation layer at opposite sides of the signal unit and electrically connecting the EMI shielding layer disposed on the insulation layer to the EMI shielding layer disposed under the substrate.
    Type: Application
    Filed: July 2, 2018
    Publication date: January 3, 2019
    Inventors: KWANG-CHOON CHUNG, BYUNG WOONG MOON
  • Publication number: 20180309204
    Abstract: Disclosed are exemplary embodiments of antennas that may be configured to be low profile, omnidirectional, ceiling mountable, and/or multiple-input multiple-output (MIMO). In an exemplary embodiment, an antenna generally includes first and second radiators and a ground plane. First and second edge portions of the ground plane may configured to be operable for reducing null at azimuth plane to thereby allow the antenna to have more omnidirectional radiation patterns for the azimuth plane. The antenna may be configured to have an asymmetrical perpendicular dipole configuration. A neutral line may be spaced apart from and proximity coupled to the ground plane. The ground plane may comprise first and second ground plane extension arms and/or a slant cutout defined between spaced-apart first and second lower portions of the ground plane. The ground plane may include a bridge portion extending between the spaced-apart first and second lower portions of the ground plane.
    Type: Application
    Filed: March 26, 2018
    Publication date: October 25, 2018
    Inventors: Kok Jiunn NG, Choon Chung SU, Yen Siang TAN
  • Patent number: 10080299
    Abstract: Provided is a manufacturing method of a double-sided printed circuit board. In the method, a first conductive circuit pattern configuring a circuit is formed on an upper side of an insulation layer, and a second conductive circuit pattern configuring a circuit is formed on a lower side of the insulation layer. A through hole vertically passing through the insulation layer is formed, and a conductive material is formed on an inner circumferential surface of the through hole such that the first circuit pattern and the second circuit pattern are electrically connected by the through hole.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: September 18, 2018
    Assignee: INKTEC CO., LTD.
    Inventors: Kwang-Choon Chung, Young-Koo Han, Myung-Bong Yoo, Kwang-Baek Yoon, Bong-Ki Jung
  • Patent number: 10074909
    Abstract: Disclosed are exemplary embodiments of omnidirectional single-input single-output (SISO) multiband/broadband antennas. In an exemplary embodiment, an omnidirectional SISO multiband/broadband antenna generally includes a radiator element having a single piece construction with a stamped cone shape defined by multiple stamped portions.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: September 11, 2018
    Assignee: Laird Technologies, Inc.
    Inventors: Choon Chung Su, Athanasios Petropoulos, Kok Jiunn Ng
  • Patent number: 9914743
    Abstract: Provided herein is a method for preparing a silver complex. The method includes reacting a silver oxide with a mixture of ammonium carbamate and isopropyl amine at room temperature in the presence of methanol.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: March 13, 2018
    Assignee: Inktec Co., Ltd.
    Inventors: Kwang-Choon Chung, Hyun-Nam Cho, Myoung-Seon Gong, Yi-Sup Han, Jeong-Bin Park, Dong-Hun Nam, Seong-Yong Uhm, Young-Kwan Seo
  • Patent number: 9839138
    Abstract: The present invention relates to a method for fabricating blackened conductive patterns, which includes (i) forming a resist layer on a non-conductive substrate; (ii) forming fine pattern grooves in the resist layer using a laser beam; (iii) forming a mixture layer containing a conductive material and a blackening material in the fine pattern grooves; and (iv) removing the resist layer remained on the non-conductive substrate.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: December 5, 2017
    Assignee: Inktec Co., Ltd.
    Inventors: Kwang Choon Chung, Ji Hoon Yoo, Su-Han Kim, Byung Hun Kim
  • Patent number: 9831487
    Abstract: Provided herein is a method for forming a transparent electrode film, the method comprising forming an electrode pattern by printing an electrode pattern on a release film using a metal ink composition; forming an insulating layer by applying a curable resin on the release film on which the electrode pattern has been formed; forming a substrate layer by laminating a substrate on the insulating layer; removing the release film; and forming a conductive layer by applying a conductive material on the electrode pattern from which the release film has been removed.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: November 28, 2017
    Assignee: INKTEC CO., LTD.
    Inventors: Kwang-Choon Chung, In-Sook Yi, Ji Hoon Yoo, Joonki Seong, Dae Sang Han
  • Patent number: 9832881
    Abstract: Provided herein is a method for forming a transparent electrode film for display and the transparent electrode film for display, the method comprising forming an electrode pattern by printing a fine electrode pattern on a release film using a conductive ink composition; forming an insulating layer by applying an insulating resin on the release film on which the electrode pattern has been formed; forming a substrate layer by laminating a substrate on the insulating layer; and removing the release film.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: November 28, 2017
    Assignee: INKTEC CO., LTD.
    Inventors: Kwang-Choon Chung, Ji Hoon Yoo, Joonki Seong, Dae sang Han