Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12094894
    Abstract: An integrated circuit includes a ramp signal generator circuit, a comparator, a counter and a control circuit. The ramp signal generator circuit is configured to generate a ramp reference signal. The comparator configured to compare a pixel output signal and the ramp reference signal thereby generating a comparator output signal. The counter is coupled to the comparator, and configured to be enabled or disabled in response to the comparator output signal. The control circuit coupled to the comparator, and configured to enable or disable the comparator by a first enable signal, the first enable signal generated in response to at least the comparator output signal.
    Type: Grant
    Filed: July 11, 2023
    Date of Patent: September 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Yu Chou, Shang-Fu Yeh
  • Patent number: 12093054
    Abstract: A moving target following method, which is executed by one or more processors of a robot that includes a camera and a sensor electrically coupled to the one or more processors, includes: performing a body detection to a body of a target based on images acquired by the camera to obtain a body detection result; performing a leg detection to legs of the target based on data acquired by die sensor to obtain a leg detection result; and fusing the body detection result and the leg detection result to obtain a fusion result, and controlling the robot to follow the target based on the fusion result.
    Type: Grant
    Filed: April 25, 2021
    Date of Patent: September 17, 2024
    Assignee: UBKANG (QINGDAO) TECHNOLOGY CO., LTD.
    Inventors: Dejun Guo, Ting-Shuo Chou, Yang Shen, Huan Tan
  • Patent number: 12094983
    Abstract: A display device is provided. The display device includes a substrate, a channel layer, a first metal layer, and a second metal layer. The channel layer is disposed on the substrate and includes a first channel layer and a second channel layer. The first metal layer is disposed on the channel layer and includes a first gate and a second gate. The second metal layer is disposed over the first metal layer and includes a first source, a first drain, and a second source. The first gate, the first source, the first drain, and the first channel layer form a first transistor. The second gate, the second source, the first drain, and the second channel layer form a second transistor. The first transistor and the second transistor are connected in parallel.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: September 17, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Chin-Lung Ting, Cheng-Hsu Chou, Ming-Chun Tseng, Yun-Sheng Chen, Chih-Hsiung Chang, Liang-Lu Chen
  • Patent number: 12091404
    Abstract: The present disclosure provides GLP-1R agonists, and compositions, methods, and kits thereof. Such compounds are generally useful for treating a GLP-1R mediated disease or condition in a human.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: September 17, 2024
    Assignee: Gilead Sciences, Inc.
    Inventors: Gediminas J. Brizgys, Chienhung Chou, Jeromy J. Cottell, Chao-I Hung, Michael L. Mitchell, James G. Taylor, Rhiannon Thomas-Tran, Nathan E. Wright, Zheng-Yu Yang, Sheila M. Zipfel
  • Patent number: 12089961
    Abstract: The present invention provides a signal quality detection method for an ear-chip physiological measurement device. The signal quality detection method includes receiving a sensing signal from the ear-clip physiological measurement device; filtering the sensing signal to generate a pre-processed signal; calculating a physiological index according to the pre-processed signal; and calculating a similarity of a red light alternating current (AC) component and an infrared light AC component of the pre-processed signal and a plurality of correlation coefficients of the red light AC component, and generating a reliability index of the physiological index accordingly. The reliability index indicates one of a plurality of signal qualities.
    Type: Grant
    Filed: January 10, 2021
    Date of Patent: September 17, 2024
    Assignee: Wistron Corporation
    Inventors: Hsuan-Tsung Chang, Kuo-Ting Huang, Ching-An Cho, Hao-Gong Chou
  • Patent number: 12096203
    Abstract: An audio system is proposed, dynamically playing optimized audio signals based on user position. A sensor circuits dynamically senses a target space to generate field context information. First speaker and second speaker are arranged for audio playback. A host device recognizes a user from the field context information, determines the user position corresponding to the target space, and adaptively assigns the user position as a target listening spot. A sensor circuit contains a camera capturing an ambient image out of the target space. A control circuit utilizes a user interface circuit to perform a configuration procedure which determines location, size and acoustic attribute information of an ambient object, allowing the control circuit to accordingly perform an object-based compensation operation on the target listening spot to generate optimized first channel audio signal and second channel audio signal.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: September 17, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventor: Kai-Hsiang Chou
  • Patent number: 12093473
    Abstract: An information handling system stylus transmits a wireless signal at a writing tip to enhance touch detection of the writing tip by a touchscreen display and receives wireless signals from the touchscreen display at a receiving antenna. To enhance control of wireless energy distributed at the writing tip, the receiving antenna is selectively coupled to the writing tip, such as by transitioning from a float of the receiving antenna to an interface with the stylus power source at transmit by the writing tip. Charge at the receiving antenna helps to shape the energy distribution from the writing tip, such as to match the energy distribution of other styluses in use at the touchscreen display.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: September 17, 2024
    Assignee: Dell Products L.P.
    Inventors: Kuo-Wei Tseng, How-Lan Eric Lin, Yu-Chen Liu, Chi-Fong Lee, Wei-Chou Chen
  • Patent number: 12094516
    Abstract: A method and apparatus for intensifying current leakage between adjacent memory cells includes that: a write operation is performed on a memory array, to form a column strip test pattern, the column strip test pattern being formed by arranging low-level memory cells and high-level memory cells in columns, and N columns of high-level memory cells being present between two adjacent columns of low-level memory cells, N?2; and voltage adjustment is performed on the low-level memory cells and the high-level memory cells, to increase potential differences between the low-level memory cells and the high-level memory cells.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: September 17, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Huanhuan Liu, Wei-Chou Wang
  • Patent number: 12094720
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The manufacturing method includes: forming a stacked structure on the substrate, the stacked structure at least including a first material layer, a second material layer and a third material layer from bottom to top; patterning the stacked structure to obtain a first pattern structure; forming a spacer structure on a side wall of the first pattern structure, a top of the spacer structure being not lower than a top of the first material layer; and removing the third material layer, wherein during removing the third material layer, an etching selectivity of the third material layer to the second material layer is greater than 1.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: September 17, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Chung-Yen Chou
  • Patent number: 12092672
    Abstract: A capacitance measure circuit includes a charge to voltage converter (CVC), and the CVC includes an excitation signal generation circuit that is arranged to generate and connect an excitation signal to a first terminal of a capacitance sensor, a differential amplifier, a first switch circuit, and at least one first variable capacitor. The inverting input terminal of the differential amplifier is arranged to receive a sensing capacitance value from a second terminal of the capacitance sensor. The first switch circuit is coupled between the inverting input terminal and the non-inverting output terminal of the differential amplifier, and is connected in parallel with the at least one first variable capacitor at the inverting input terminal and the non-inverting output terminal of the differential amplifier.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: September 17, 2024
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Yi-Chou Huang
  • Patent number: 12094914
    Abstract: A display apparatus is disclosed. The display apparatus includes a sensor layer including a plurality of sensors, a pixel layer disposed on the sensor layer and including a plurality of pixel areas and a plurality of pixels in the pixel areas, and an opaque layer disposed between the sensor layer and the pixel layer and including holes corresponding to at least one of the pixel areas.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: September 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Min Lin, Cheng San Chou
  • Patent number: 12096590
    Abstract: A rails assembly includes outer and inner rails, an elastic assembly, a hook member. The outer and inner rails are provided with first and second opening portions. The inner rail is disposed on the outer rail. The elastic assembly is disposed on the inner rail. The hook member is connected to the inner rail and opposite to the second opening portion. When the hook member is located at a first position by sliding the inner rail relative to the outer rail, the hook member is pushed by the elastic assembly to pass through the second opening portion. When the hook member is located at a second position in the same manner, the second and first opening portions are opposite to each other and the hook member is pushed by the elastic assembly to pass through the second and first opening portions. An electronic equipment including the rails assembly is provided.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: September 17, 2024
    Assignee: Wistron Corporation
    Inventors: Yong-Qing Zhong, Zhong-Hui Mao, Zhao-Ping Fu, Chih Yao Chou
  • Patent number: 12094728
    Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: September 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Zi-Jheng Liu, Yu-Hsiang Hu, Jo-Lin Lan, Sih-Hao Liao, Chen-Cheng Kuo, Hung-Jui Kuo, Chung-Shi Liu, Chen-Hua Yu, Meng-Wei Chou
  • Patent number: 12095565
    Abstract: A system information transmission method is provided. The system information transmission method includes the following steps. A first preamble for system information request is transmitted by a UE to a base station. When an acknowledgement message from the base station is not received, the first preamble for system information request is retransmitted by the UE to the base station. When the acknowledgement message from the base station is received, system information is received by the UE from the base station.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: September 17, 2024
    Assignee: Hannibal IP LLC
    Inventor: Chie-Ming Chou
  • Patent number: 12089663
    Abstract: The present invention provides a garment with cups, which includes a garment body, a cup part and an elastic support structure. The cup part is located at the position of the garment body corresponding to the breasts of a wearer, and has a cladding portion, a cup neck portion and an underwire portion. The cup neck portion and the underwire portion are respectively arranged on both sides of the cladding portion. The elastic support structure is set on the cladding portion of the cup part and provides a supporting force from the underwire portion to the cup neck portion.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: September 17, 2024
    Assignee: SOFT SENSE LIFE TECH PTE. LTD.
    Inventor: Kuan-Chien Chou
  • Patent number: 12094770
    Abstract: In some implementations, one or more semiconductor processing tools may form a via within a substrate of a semiconductor device. The one or more semiconductor processing tools may deposit a ruthenium-based liner within the via. The one or more semiconductor processing tools may deposit, after depositing the ruthenium-based liner, a copper plug within the via.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: September 17, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Min Liu, Ming-Yuan Gao, Ming-Chou Chiang, Shu-Cheng Chin, Huei-Wen Hsieh, Kai-Shiang Kuo, Yen-Chun Lin, Cheng-Hui Weng, Chun-Chieh Lin, Hung-Wen Su
  • Patent number: 12094922
    Abstract: An inductance structure is provided and includes a plurality of inductance traces embedded in an insulating body and at least one shielding layer that is embedded in the insulating body and free from being electrically connected to the inductance traces. The shielding layer has a plurality of line segments that are free from being connected to one another. The shielding layer shields the inductance traces to improve the inductance value and quality factor.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: September 17, 2024
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Pao-Hung Chou, Chun-Hsien Yu, Shih-Ping Hsu
  • Patent number: 12095142
    Abstract: A semiconductor package includes a first package having a first side and a second side opposing the first side. The first package comprises a first electronic component and a second electronic component arranged in a side-by-side manner on the second side. A second package is mounted on the first side of the first package. The second package comprises a radiative antenna element. A connector is disposed on the second side.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: September 17, 2024
    Assignee: MEDIATEK INC.
    Inventors: Wen-Chou Wu, Yi-Chieh Lin, Chia-Yu Jin, Hsing-Chih Liu
  • Patent number: 12095711
    Abstract: An integrated circuit includes first through fourth devices positioned over one or more substrates, a first radio frequency interconnect (RFI) including a first transmitter included in the first device, a first receiver included in the second device, and a first guided transmission medium coupled to each of the first transmitter and the first receiver, a second RFI including a second transmitter included in the first device, a second receiver included in the third device, and a second guided transmission medium coupled to each of the second transmitter and the second receiver, and a third RFI including a third transmitter included in the first device, a third receiver included in the fourth device, and the second guided transmission medium coupled to each of the third transmitter and the third receiver.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: September 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Neng Chen, William Wu Shen, Chewn-Pu Jou, Feng Wei Kuo, Lan-Chou Cho, Tze-Chiang Huang, Jack Liu, Yun-Han Lee
  • Patent number: D1042519
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: September 17, 2024
    Inventors: Jen-Chung Chou, Qingyun Chen