Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240137810
    Abstract: Briefly, in accordance with one or more embodiments, virtualized network function resources may be managed in a network. Performance measurements may be received for at least one mobility management entity (MME) in an MME pool, or for other network elements. If at least one of the performance measurements exceeds at least one predetermined threshold, instantiation of a new mobility management entity virtual network function (MME VNF) may be requested, and the MME VNF may be instantiated in response to the request. One or more user equipment (UE) devices managed by the MME pool may be connected to the added MME VNF.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 25, 2024
    Inventors: Meghashree Dattatri KEDALAGUDDE, Joey CHOU, Muthaiah VENKATACHALAM
  • Publication number: 20240133918
    Abstract: In a method for obtaining the equivalent oxide thickness of a dielectric layer, a first semiconductor capacitor including a first silicon dioxide layer and a second semiconductor capacitor including a second silicon dioxide layer are provided and a modulation voltage is applied to the semiconductor capacitors to measure a first scanning capacitance microscopic signal and a second scanning capacitance microscopic signal. According to the equivalent oxide thicknesses of the silicon dioxide layers and the scanning capacitance microscopic signals, an impedance ratio is calculated. The modulation voltage is applied to a third semiconductor capacitor including a dielectric layer to measure a third scanning capacitance microscopic signal. Finally, the equivalent oxide thickness of the dielectric layer is obtained according to the equivalent oxide thickness of the first silicon dioxide layer, the first scanning capacitance microscopic signal, third scanning capacitance microscopic signal, and the impedance ratio.
    Type: Application
    Filed: April 12, 2023
    Publication date: April 25, 2024
    Inventors: MAO-NAN CHANG, CHI-LUN LIU, HSUEH-LIANG CHOU, YI-SHAN WU, CHIAO-JUNG LIN, YU-HSUN HSUEH
  • Publication number: 20240134149
    Abstract: An imaging lens module with auto focus function includes an imaging lens assembly, an electromagnetic driving component assembly and a lens carrier. The imaging lens assembly has an optical axis. The electromagnetic driving component assembly drives the imaging lens assembly to move in a direction parallel to the optical axis by a Lorentz force. The imaging lens assembly is mounted to the lens carrier such that the imaging lens assembly can be wholly driven by the Lorentz force. The lens carrier includes an object-side part, a mounting structure and a plurality of plate portions. The object-side part includes a tip-end minimal aperture configured for light to travel through; and a tapered surface which surrounds an area tapered off from image side to object side. The mounting structure and the plate portions are configured for at least a part of the electromagnetic driving component assembly to be mounted thereto.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: LARGAN DIGITAL CO.,LTD.
    Inventors: Chun-Hua TSAI, Ming-Ta CHOU, Ming-Shun CHANG
  • Publication number: 20240134258
    Abstract: A projection device of the present invention includes a casing, a light source module, a light source thermal module, a fan, and a projection lens; wherein the light source module, the light source thermal module, the fan and the projection lens are disposed in the casing, and the casing has a first side wall, a second side wall, and a bottom plate, wherein the first side wall includes a first air inlet, and the second side wall includes an air outlet; the orthographic projection range of the air outlet on the first side wall overlaps with the orthographic projection range of the light source thermal module on the first side wall, and the orthographic projection range of the projection lens on the first side wall does not overlap with the orthographic projection range of the light source thermal module on the first side wall.
    Type: Application
    Filed: October 22, 2023
    Publication date: April 25, 2024
    Applicant: Coretronic Corporation
    Inventors: Wei-Min Chien, Tung-Chou Hu
  • Publication number: 20240134538
    Abstract: A memory operation method, comprising: when a first super block of a memory device is a open block (or in programming state), obtaining a first read count of one of a plurality of first memory blocks in the first super block, wherein the first read count is a number of times that data of one of the first memory blocks is read out; determining whether the first read count is larger than a first threshold; and when the first read count is larger than the first threshold, moving a part of the data in the first super block to a safe area in the memory device, wherein the part of the data comprises data in the first memory block.
    Type: Application
    Filed: June 5, 2023
    Publication date: April 25, 2024
    Inventors: Po-Sheng CHOU, Hsiang-Yu HUANG, Yan-Wen WANG
  • Patent number: 11967652
    Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: April 23, 2024
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventors: Fu-Chou Liu, Jui-Hung Hsu, Yu-Chiang Peng, Chien-Chen Lee, Ya-Han Chang, Li-Chun Hung
  • Patent number: 11968559
    Abstract: A device to host a service producer in a 5G system (or 5G system architecture), a method to be performed at the device, and a non-transitory storage device storing instructions to be executed at the device. The method includes: decoding a request from a service consumer to manage one or more 5G quality of service (QoS) indicators (5QIs), each 5QI including a 5QI value and corresponding 5QI characteristics; configuring one or more network functions (NFs) of the 5GS with the 5QIs based on the request; and encoding for transmission to the service consumer a message including a result of managing the one or more 5QIs.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 23, 2024
    Assignee: Intel Corporation
    Inventors: Yizhi Yao, Joey Chou
  • Patent number: 11966271
    Abstract: An Ethernet communication device includes a data interface and circuitry. The data interface is configured for communicating with a neighbor device. The circuitry is configured to exchange Ethernet data frames with the neighbor device over the data interface, wherein successive data frames are separated in time by an Inter-Packet Gap (IPG) having at least a predefined minimal duration, and to further exchange with the neighbor device, over the data interface, during the IPG between Ethernet frames exchanged on the data interface, a wake-up/sleep command that instructs switching between an active mode and a sleep mode.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: April 23, 2024
    Assignee: MARVELL ASIA PTE LTD
    Inventors: Dance Wu, Christopher Mash, Daryl J. Hoot, Hong Yu Chou
  • Patent number: 11968568
    Abstract: Technology for a service producer of a Next Generation NodeB (gNB) operable to generate performance measurements in a Next Generation radio access network (NG-RAN) is disclosed. The service producer can decode raw performance measurements 5 received from a plurality of gNBs. The service producer can generate performance measurements related to at least one of an inter-gNB handover or a protocol data unit (PDU) session resource setup for the plurality of gNBs based on the raw performance measurements.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: April 23, 2024
    Assignee: APPLE INC.
    Inventors: Yizhi Yao, Joey Chou
  • Patent number: 11965019
    Abstract: Provided herein are stabilized chimeric Fabs derived from a parent chimeric Fab having a lambda light chain. The stabilized chimeric Fabs comprise an immunoglobulin heavy chain polypeptide construct from the parent chimeric Fab, having a CH1 sequence and a VH sequence, as well as a Vlambda-Ckappa chimeric light chain construct. The Vlambda sequence of the chimeric light chain construct corresponds to that of the parent chimeric Fab, and comprises one or more stabilizing amino acid modifications that increase the thermal stability of the stabilized chimeric Fab compared to the parent chimeric Fab. The stabilized Fabs are useful as therapeutic polypeptides, or can be used to prepare antibody constructs in other formats. The stabilized chimeric Fabs may also be useful generally to increase the stability of antibodies having lambda light chains.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: April 23, 2024
    Assignee: ZYMEWORKS BC INC.
    Inventors: Dunja Urosev, Yang-Chieh Chou
  • Patent number: 11966783
    Abstract: A method of assigning processing resources is described. The method includes receiving an application and analyzing the application to determine an expected run time use of the processing resources. At least a portion of the processing resources are assigned to the application based on the expected run time use of the processing resources. A computing system architecture including a processing resource pool, an interface, and a special purpose optimization coprocessor is also described. The interface receives an application to be executed. The special purpose optimization coprocessor receives information about the application and the processing resource pool and outputs an allocation scheme for allocating tasks of the application to the processing resource pool.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: April 23, 2024
    Assignee: Sync Computing Corp.
    Inventors: Erica Lin, Jeffrey Chou, Suraj Bramhavar, Titash Rakshit, Jeffrey G. Bernstein
  • Patent number: 11966255
    Abstract: A fixing structure used to connect a display panel to a housing of an electronic device during manufacture of the electronic device includes a fixing member, an auxiliary member spaced apart from the fixing member, and supporting posts disposed between the fixing member and the auxiliary member. The fixing member is to be bonded to the display panel. A projection of an outer edge of the auxiliary member on a plane of the fixing member is outside of an outer edge of the fixing member. The supporting posts and the auxiliary member are removed after the display panel is bonded to the fixing member. A method for assembling the display panel with the fixing structure is also disclosed.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: April 23, 2024
    Assignee: Chiun Mai Communication Systems, Inc.
    Inventors: Chia-Ju Lin, Fu-Hsin Sung, Meng-Yu Chou
  • Publication number: 20240126559
    Abstract: The present invention discloses a processor control method including: controlling a processor to execute a first operating system in a first state; when the processor executing the first operating system satisfies a predetermined condition, controlling the processor to switch from the first state to a second state; and controlling the processor to execute a second operating system in the second state, wherein an authority of the first state is higher than an authority of the second state.
    Type: Application
    Filed: March 15, 2023
    Publication date: April 18, 2024
    Inventors: Cheng-Chi HUANG, Shu-Cheng CHOU, Yu-Hsiang LIN
  • Publication number: 20240128083
    Abstract: A semiconductor device structure includes a first hard mask pattern disposed over a metal layer. The semiconductor device structure also includes a second hard mask pattern disposed over the metal layer and spaced apart from the first hard mask pattern. A bottom surface of the first hard mask pattern is coplanar with a bottom surface of the second hard mask pattern.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 18, 2024
    Inventor: LIANG-PIN Chou
  • Publication number: 20240128341
    Abstract: The disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a base pattern including a channel region and a drain region, a first semiconductor layer on the channel region of the base pattern, and a gate structure on the first semiconductor layer. The gate structure includes a first stack disposed on the first semiconductor layer and a second stack disposed on the first stack. The first stack includes a first sidewall adjacent to the drain region and a second sidewall opposite to the first sidewall in a first direction parallel to a top surface of the base pattern. The first sidewall is at a first distance from the second stack in the first direction, and the second sidewall is at a second distance from the second stack in the first direction. The first distance is greater than the second distance.
    Type: Application
    Filed: December 14, 2022
    Publication date: April 18, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Chia-Hao Chang, Jih-Wen Chou, Hwi-Huang Chen, Hsin-Hong Chen, Yu-Jen Huang
  • Publication number: 20240125705
    Abstract: The present invention provides, among other things, devices, kits, apparatus, and methods for rapid homogenous cell staining and imaging. Particularly, in some embodiments, the present invention can immunochemically stain a cell or a tissue in less than 60 seconds without washing. In some embodiments, the present invention stains and observes analyte (protein or nucleic acid) inside a cell in 60 seconds without washing.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 18, 2024
    Applicant: Essenlix Corporation
    Inventors: Stephen Y. CHOU, Wei DING, Ji LI, Shengjian Cai, Yufan Zhang, Jia Peng
  • Publication number: 20240124580
    Abstract: The present application provides constructs comprising a single-domain antibody (sdAb) moiety that specifically recognizes TIGIT. Also provided are methods of making and using these constructs.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Wang ZHANG, Shu WU, Shuai YANG, Qi PAN, Chuan-Chu CHOU
  • Publication number: 20240128084
    Abstract: A semiconductor device structure includes a first hard mask pattern disposed over a metal layer. The semiconductor device structure also includes a second hard mask pattern disposed over the metal layer and spaced apart from the first hard mask pattern. A bottom surface of the first hard mask pattern is coplanar with a bottom surface of the second hard mask pattern.
    Type: Application
    Filed: July 13, 2023
    Publication date: April 18, 2024
    Inventor: LIANG-PIN CHOU
  • Publication number: 20240128033
    Abstract: A tilt ball switch includes a cover, a first positioning unit, a plurality of conductive members, a conductive ball, a base wall, a surrounding wall that extends from a periphery of the base wall, and an opening that is formed at one end of the surrounding wall opposite to the base wall. The cover closes the opening, and cooperates with the base wall and the surrounding wall to define a receiving space. The first positioning unit is disposed in the receiving space, and is positioned between the base wall and the cover. The conductive ball is convertible between a conducting state, in which the conductive ball is in contact with at least two of the conductive members, and a non-conducting state, in which the conductive ball is spaced apart from the conductive members.
    Type: Application
    Filed: September 20, 2023
    Publication date: April 18, 2024
    Inventor: Tien-Ming CHOU
  • Publication number: 20240127109
    Abstract: A federated learning method includes: providing importance parameters and performance parameters by client devices respectively to a central device, performing a training procedure by the central device, wherein the training procedure includes: selecting target devices from the client devices according to a priority order associated with the importance parameters, dividing the target devices into training groups according to a similarity of the performance parameters, notifying the target devices to perform iterations according to the training groups respectively to generate trained models, transmitting the trained models to the central device, and updating a global model based on the trained models, performing the training procedure again or outputting the global model to the client devices based on a convergence value of the global model and the number of times of performing the training procedure.
    Type: Application
    Filed: November 10, 2022
    Publication date: April 18, 2024
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Ping Feng WANG, Chiun Sheng HSU, Chi-Yuan CHOU, Fu-Chiang CHANG