Abstract: Apparatus and methods for tunable filters are provided. In certain configurations, a tunable filter includes a semiconductor die attached to a laminated substrate, such as a substrate of a multi-chip module (MCM). The tunable filter includes a vector inductor implemented using two or more conductors arranged on different conductive layers of the laminated substrate. The vector inductor's conductors are inductively coupled to one another and electrically connected in parallel to provide the vector inductor with high quality factor (Q-factor). The semiconductor die includes a variable capacitor that is electrically connected with the vector inductor to operate as a tunable resonator. Additionally, a frequency characteristic of the tunable filter, such as a passband, can be controlled by selecting a capacitance value of the variable capacitor, thereby tuning a resonance of the resonator.

Abstract: A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

Abstract: A power amplifier is described. A power amplifier includes at least a first amplifier stage. The power amplifier also includes a first notch filter coupled with the first amplifier stage. The first notch filter is configured to tune to a first frequency. The first notch filter including at least one first set of metal oxide semiconductor variable capacitor arrays. Moreover, the power amplifier includes a first mirrored notch filter coupled with said first amplifier stage. The first mirror notch filter is configured to tune to the mirror of the first frequency. The first mirror notch filter including at least one second set of metal oxide semiconductor variable capacitor arrays.

Abstract: A direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply is disclosed. The charge pump buck power supply includes a charge pump buck converter, a first inductive element, and an energy storage element. The charge pump buck converter and the first inductive element are coupled in series between a DC power supply, such as a battery, and the energy storage element. The buck power supply includes a buck converter, a second inductive element, and the energy storage element. The buck converter and the second inductive element are coupled in series between the DC power supply and the energy storage element. As such, the charge pump buck power supply and the buck power supply share the energy storage element.

Abstract: A power amplifier is described. The power amplifier includes at least a first power amplifier stage coupled with a power supply. The first power amplifier stage is configured to adjust a first output power of the first power amplifier stage based on a power supply voltage of the power supply. The power amplifier also includes at least a first tunable loadline matching network. The first tunable loadline matching network is configured to adjust a loadline value of the power amplifier. The first tunable loadline matching network includes at least a first set of metal oxide semiconductor variable capacitor arrays.

Abstract: A notch filter is described. A notch filter including an input, an output and at least one variable capacitor coupled in series between the input and the output. The at least one variable capacitor including at least a first set of metal oxide semiconductor variable capacitor arrays. The notch filter also including at least a first inductor coupled in series between the input and the output and in parallel with the at least one variable capacitor. Moreover, the notch filter includes at least a second inductor coupled with the output in a shunt configuration to the at least one variable capacitor and the first inductor. And, the first capacitor coupled with the second inductor and configured to couple with a voltage reference.

Abstract: A radio frequency (RF) switch semiconductor die and an RF supporting structure are disclosed. The RF switch semiconductor die is attached to the RF supporting structure. The RF switch semiconductor die has a first edge and a second edge, which may be opposite from the first edge. The RF supporting structure has a group of alpha supporting structure connection nodes, which is adjacent to the first edge; a group of beta supporting structure connection nodes, which is adjacent to the second edge; and an alpha AC grounding supporting structure connection node, which is adjacent to the second edge. When the group of alpha supporting structure connection nodes and the alpha AC grounding supporting structure connection node are active, the group of beta supporting structure connection nodes are inactive.

Abstract: A power amplifier is described. The power amplifier including at least a first amplifier stage, and at least a first tunable matching network. The first tunable matching network is configured to couple between a first impedance and a second impedance. The first matching network including at least one first set of metal oxide semiconductor variable capacitor arrays.

Abstract: A power amplifier is described. A power amplifier includes at least a first amplifier stage. The power amplifier also includes a first notch filter coupled with the first amplifier stage. The first notch filter is configured to tune to a first frequency. The first notch filter including at least one first set of metal oxide semiconductor variable capacitor arrays. Moreover, the power amplifier includes a first mirrored notch filter coupled with said first amplifier stage. The first mirror notch filter is configured to tune to the mirror of the first frequency. The first mirror notch filter including at least one second set of metal oxide semiconductor variable capacitor arrays.

Abstract: A radio frequency system is described. A radio frequency system including at least a first tunable phasing network including at least one first set of metal oxide semiconductor variable capacitor arrays. The first tunable phasing network is configured to shift a phase of a radio frequency signal. And, at least a first switch coupled with the first tunable phasing network. The first switched configured to switch between one or more receiver circuits.

Abstract: Apparatus and methods for tunable filters are provided. In certain configurations, a tunable filter includes a semiconductor die attached to a laminated substrate, such as a substrate of a multi-chip module (MCM). The tunable filter includes a vector inductor implemented using two or more conductors arranged on different conductive layers of the laminated substrate. The vector inductor's conductors are inductively coupled to one another and electrically connected in parallel to provide the vector inductor with high quality factor (Q-factor). The semiconductor die includes a variable capacitor that is electrically connected with the vector inductor to operate as a tunable resonator. Additionally, a frequency characteristic of the tunable filter, such as a passband, can be controlled by selecting a capacitance value of the variable capacitor, thereby tuning a resonance of the resonator.

Abstract: RF PA circuitry and a DC-DC converter, which includes an RF PA envelope power supply and DC-DC control circuitry, are disclosed. The PA envelope power supply provides an envelope power supply signal to the RF PA circuitry. The DC-DC control circuitry has a DC-DC look-up table (LUT) structure, which has at least a first DC-DC LUT. The DC-DC control circuitry uses DC-DC LUT index information as an index to the DC-DC LUT structure to obtain DC-DC converter operational control parameters. The DC-DC control circuitry then configures the PA envelope power supply using the DC-DC converter operational control parameters. Using the DC-DC LUT structure provides flexibility in configuring the DC-DC converter for different applications, for multiple static operating conditions, for multiple dynamic operating conditions, or any combination thereof.

Abstract: The present disclosure provides a power amplifier controller for starting up, operating, and shutting down a power amplifier. The power amplifier controller includes current sense amplifier circuitry adapted to monitor a main current of the power amplifier. A bias generator is also included and adapted to provide a predetermined standby bias voltage and an operational bias voltage based upon a main current level sensed by the current sense amplifier circuitry. The power amplifier controller further includes a sequencer adapted to control startup and shutdown sequences of the power amplifier. In at least one embodiment, the power amplifier is a gallium nitride (GaN) device, and the main current level sensed is a drain current of the GaN device. Moreover, the bias generator is a gate bias generator provided that the power amplifier is a field effect transistor (FET) device.

Abstract: Analog-to-digital pulse width modulation circuitry includes thermometer code generator circuitry, clock generator circuitry, delay selection circuitry, and an output stage. The thermometer code generator circuitry is adapted to generate a digital thermometer code based upon a received analog input voltage. The clock generator circuitry is adapted to generate a reference clock and a plurality of delayed clock signals. The delay selection circuitry is connected between the thermometer code generator circuitry and the clock generator circuitry, and is adapted to select one of the delayed clock signals to present to the output stage based upon the generated thermometer code. The selected delayed clock signal is delayed by an amount of time that is proportional to the generated thermometer code. The reference clock signal and the selected delayed clock signal are delivered to the output stage where they are used to generate a pulse width modulated output signal.

Abstract: The present disclosure relates to a flexible direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply. The charge pump buck power supply and the buck power supply are voltage compatible with one another at respective output inductance nodes to provide flexibility. In one embodiment of the DC-DC converter, capacitances at the output inductance nodes are at least partially isolated from one another by using at least an isolating inductive element between the output inductance nodes to increase efficiency. In an alternate embodiment of the DC-DC converter, the output inductance nodes are coupled to one another, such that the charge pump buck power supply and the buck power supply share a first inductive element, thereby eliminating the isolating inductive element, which reduces size and cost but may also reduce efficiency.

Abstract: Circuitry, which includes a direct current (DC)-DC converter having a first switching power supply is disclosed. The first switching power supply includes a first switching converter, an energy storage element, a first inductive element, which is coupled between the first switching converter and the energy storage element, and a first snubber circuit, which is coupled across the first inductive element. The first switching power supply receives and converts a DC power supply signal to provide a first switching power supply output signal based on a setpoint.

Abstract: A circuit and method is disclosed that dithers a switching frequency of a DC-to-DC converter which gets modulated onto an RF carrier such that switching noise is spread over a given bandwidth that is wider than a communications measurements bandwidth. The circuit includes a switching circuitry adapted to transfer energy from a source to a load using a switching signal having a series of switching cycles and a switching frequency. Also included is a control circuitry adapted to generate a pseudo-random value near a beginning of each of the series of switching cycles to determine a maximum switching frequency value based upon the pseudo-random value. The method includes adjusting the switching frequency of the switching signal incrementally from a fixed minimum switching frequency value to the maximum frequency value and vice versa as a function of time during each of the series of switching cycles of the switching circuit.

Abstract: A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

Abstract: A radio frequency (RF) communications system, which includes an RF power amplifier (PA) and an envelope tracking power supply, is disclosed. The RF communications system processes RF signals associated with at least a first RF communications band, which has a first bandwidth. The RF PA receives and amplifies an RF input signal to provide an RF transmit signal using an envelope power supply signal. The envelope tracking power supply provides the envelope power supply signal, which has switching ripple based on a programmable switching frequency. The programmable switching frequency is selected to be greater that the first bandwidth.

Abstract: Radio Frequency (RF) signal conditioning circuitry, which includes RF detection circuitry and RF attenuation circuitry is disclosed. The RF detection circuitry receives and detects an RF sample signal to provide an RF detection signal. The RF attenuation circuitry has an attenuation circuitry input, and receives and attenuates the RF sample signal via the attenuation circuitry input to provide an attenuated RF signal. The RF attenuation circuitry presents an attenuation circuitry input impedance at the attenuation circuitry input. The attenuated RF signal and the RF detection signal are provided concurrently.