Abstract: According to an example, data corruption and single point of failure is prevented in a fault-tolerant memory fabric with multiple redundancy controllers by granting, by a parity media controller, a lock of a stripe to a redundancy controller to perform a sequence on the stripe. The lock may be broken in response to determining a failure of the redundancy controller prior to completing the sequence. In response to breaking the lock, the parity cacheline of the stripe may be flagged as invalid. Also, a journal may be updated to document the breaking of the lock.

Abstract: An apparatus (10) for coupling with a pipe (12), the apparatus (10) including a body assembly (13) having a body (14) adapted to fit with the pipe (12), and at least two gripping parts (16) moveably coupled to the body (14), the at least two gripping parts (16) being adapted to be moveable between an insertion condition, in which the gripping parts (16) are resiliently depressible to allow movement of the pipe (12) in a first insertion direction, and a gripping condition in which the gripping parts (16) each engage with opposing side walls (18) of the pipe (12) to restrict movement of the pipe (12) in a second opposing direction thereby coupling the apparatus (10) and the pipe (12).

Abstract: Examples disclosed herein relate to very large-scale integration (VLSI) circuit implementations of list decode circuits. In accordance with some examples disclosed herein, a device may include a first and second polynomial evaluation circuit, a field division circuit, a discrepancy filter, and an enhanced error locator polynomial (ELP) circuit. The first and second polynomial evaluation circuits may respectively evaluate a first and second polynomial output from a Berlekamp-Massey algorithm over a plurality of values in a finite field. The field division circuit may divide the outputs from the evaluations to generate a plurality of speculative discrepancy values for an additional iteration of the Berlekamp-Massey algorithm. The discrepancy filter circuit may filter the speculative discrepancy values down to a list of potentially valid discrepancy values that may be used by the enhanced ELP circuit to generate an enhanced ELP.

Abstract: In one example in accordance with the present disclosure, a system comprises a plurality of memory dies, a first region of memory allocated for primary ECC spread across a first subset of at least one memory die belonging to the plurality of memory die, wherein a portion of the primary ECC is allocated to each data block and a second region of memory allocated for secondary ECC spread across a second subset of at least one memory die included in the plurality of memory die. The system also comprises a memory controller configured to determine that an error within the first data block cannot be corrected using a first portion of the primary ECC allocated to the first data block, access the second region allocated for secondary ECC stored on the at least one memory die belonging to the plurality of memory die and attempt to correct the error using the primary and secondary ECC.

Abstract: Disclosed are systems and methods of using integrated computational elements to determine unknown interferents in a fluid being monitored. One method includes monitoring a fluid with an optical computing device comprising at least two integrated computational element (ICE) cores configured to optically interact with a fluid and detect a corresponding at least two characteristics of the fluid, each ICE core being designed and manufactured with reference to known spectra related to the at least two characteristics of the fluid, generating output signals corresponding to the at least two characteristics of the fluid with the optical computing device, wherein an intensity of each output signal corresponds to a concentration of the at least two characteristics of the fluid, and calculating a representative spectrum of the fluid with a signal processor based on the known spectra of the at least two characteristics and the intensity of each output signal.

Abstract: A method is provided. In an example, the method includes identifying a memory module that includes a plurality of memory dies. Each memory die of the plurality of memory dies includes a plurality of memory regions, and each memory die of the plurality of memory dies services a respective portion of a data access. An error pattern is detected in a first memory region of the plurality of memory regions. The first memory region is associated with a first memory die of the plurality of memory dies. Based on the detected error pattern, the first memory region of the first memory die is marked as erased without marking a second memory region of the first memory die as erased.

Abstract: Examples disclosed herein relate to very large-scale integration (VLSI) circuit implementations of circuits for managing results from list decode methods. In accordance with some examples disclosed herein, a plurality of potential error patterns for correcting errors in a codeword may be received. The plurality of potential error patterns may be generated using a plurality of different list decode methods. Error patterns among the plurality of potential error patterns may be determined and marked as candidate error patterns using a set of error pattern screens. Error weights may be assigned to the candidate error patterns based on a quantity of bit errors in each symbol included therein. Weights for candidate error patterns that are indicative of a memory device failure may be adjusted using a scaling factor. An error pattern among the candidate error patterns may be selected to correct the errors in the codeword based on the assigned error weights.

Abstract: A technique includes determining that a given memory device of a plurality of memory devices has failed and in response to the determination that the given memory device has failed, re-encoding a data unit associated with the given memory device. The data unit is associated with a payload and a symbol-based error correction code. The re-encoding includes determining a bit-based error correction code for the payload and replacing the data unit in the memory with the payload and the bit-based error correction code.

Abstract: Methods and systems are provided for classification of the type and weight of a trailer being towed by a vehicle. The classification is based on a comparison between a real-time road gradient as determined by the vehicle system and an expected road gradient as determined from an off-board or an onboard map. Vehicle operations may be adjusted based on the classification of the attached trailer.

Abstract: Example implementations relate to a memory controller. For example, an apparatus includes a data storage device and a memory controller coupled to the data storage device. The memory controller is to perform, during a memory scrubbing operation, a corrective action to correct an error associated with a data block stored in the data storage device. The memory control is to determine, during the memory scrubbing operation, whether the corrective action is successful. In response to a determination that the corrective action is a failed corrective action, the memory controller is to fix a hardware failure of the data storage device based on a type of the hardware failure.

Abstract: In one example in accordance with the present disclosure, a system comprises a plurality of memory dies, a first region of memory allocated for primary ECC spread across a first subset of at least one memory die belonging to the plurality of memory die, wherein a portion of the primary ECC is allocated to each data block and a second region of memory allocated for secondary ECC spread across a second subset of at least one memory die included in the plurality of memory die. The system also comprises a memory controller configured to determine that an error within the first data block cannot be corrected using a first portion of the primary ECC allocated to the first data block, access the second region allocated for secondary ECC stored on the at least one memory die belonging to the plurality of memory die and attempt to correct the error using the primary and secondary ECC.

Abstract: A method is provided. In an example, the method includes identifying a memory module that includes a plurality of memory dies. Each memory die of the plurality of memory dies includes a plurality of memory regions, and each memory die of the plurality of memory dies services a respective portion of a data access. An error pattern is detected in a first memory region of the plurality of memory regions. The first memory region is associated with a first memory die of the plurality of memory dies. Based on the detected error pattern, the first memory region of the first memory die is marked as erased without marking a second memory region of the first memory die as erased.

Abstract: Examples disclosed herein relate to very large-scale integration (VLSI) list manipulation circuits. In accordance with some examples disclosed herein, a list manipulation circuit may include a progressive population count circuit to generate population count values. The population count values may be fed into various types of circuits, such as list conversion circuits, list compactor circuits, and list reordering circuits.

Abstract: Examples disclosed herein relate to very large-scale integration (VLSI) circuit implementations of circuits for managing results from list decode methods. In accordance with some examples disclosed herein, a plurality of potential error patterns for correcting errors in a codeword may be received. The plurality of potential error patterns may be generated using a plurality of different list decode methods. Error patterns among the plurality of potential error patterns may be determined and marked as candidate error patterns using a set of error pattern screens. Error weights may be assigned to the candidate error patterns based on a quantity of bit errors in each symbol included therein. Weights for candidate error patterns that are indicative of a memory device failure may be adjusted using a scaling factor. An error pattern among the candidate error patterns may be selected to correct the errors in the codeword based on the assigned error weights.

Abstract: Examples disclosed herein relate to very large-scale integration (VLSI) circuit implementations of list decode circuits. In accordance with some examples disclosed herein, a device may include a first and second polynomial evaluation circuit, a field division circuit, a discrepancy filter, and an enhanced error locator polynomial (ELP) circuit. The first and second polynomial evaluation circuits may respectively evaluate a first and second polynomial output from a Berlekamp-Massey algorithm over a plurality of values in a finite field. The field division circuit may divide the outputs from the evaluations to generate a plurality of speculative discrepancy values for an additional iteration of the Berlekamp-Massey algorithm. The discrepancy filter circuit may filter the speculative discrepancy values down to a list of potentially valid discrepancy values that may be used by the enhanced ELP circuit to generate an enhanced ELP.

Abstract: Examples disclosed herein relate to very large-scale integration (VLSI) circuit implementations of list decode circuits. In accordance with some examples disclosed herein, a list decode circuit may include a syndrome calculation circuit, a symbol erasure circuit, an erasure syndrome calculation circuit and a Berlekamp-Massey algorithm circuit (BMA), and an error locator polynomial (ELP) evaluation circuit. The syndrome calculation circuit may calculate a baseline syndrome and erasure syndrome calculation circuit may calculate erasure syndromes from error locator polynomials calculated by the symbol erasure circuit. The BMA circuit may use the calculated syndromes to generate a series of ELPs, which may be used by the ELP evaluation circuit to identify error locations in a codeword.

Abstract: A single content region in a chat history display is used to display entries representative of a plurality of messages corresponding to all chat histories for all of chat threads currently engaged in by a given mobile terminal. Additionally, a buddy list display supports management of chat buddies, a detail view display allows otherwise truncated messages to be displayed, and a text message editor display supports the composition of text messages. Each chat user may designate public display identifiers for purposes of identification to other chat users. Additionally, each user may designate private display identifiers for each of his/her buddies, which private display identifiers may be used to replace the public display identifiers for that user's buddies when displayed on the user's mobile terminal. In this manner, the use of speech and text based group chatting and similar services in wireless communication environments is more readily enabled.

Abstract: A single content region in a chat history display is used to display entries representative of a plurality of messages corresponding to all chat histories for all of chat threads currently engaged in by a given mobile terminal. Additionally, a buddy list display supports management of chat buddies, a detail view display allows otherwise truncated messages to be displayed, and a text message editor display supports the composition of text messages. Each chat user may designate public display identifiers for purposes of identification to other chat users. Additionally, each user may designate private display identifiers for each of his/her buddies, which private display identifiers may be used to replace the public display identifiers for that user's buddies when displayed on the user's mobile terminal. In this manner, the use of speech and text based group chatting and similar services in wireless communication environments is more readily enabled.

Abstract: An electrified vehicle according to an exemplary aspect of the present disclosure includes, among other things, an energy recovery mechanism, and a controller configured to selectively activate at least a battery cooling mode to dissipate excess power from the energy recovery mechanism.

Abstract: An apparatus (10) for coupling with a pipe (12), the apparatus (10) including a body assembly (13) having a body (14) adapted fit with the pipe (12), and at least two gripping parts (16) moveably coupled to the body (14), the at least two gripping parts (16) being adapted to be moveable between an insertion condition, in which the gripping parts (16) are resiliently depressible to allow movement of the pipe (12) in a first insertion direction, and a gripping condition in which the gripping parts (16) each engage with opposing side walls (18) of the pipe (12) to restrict movement of the pipe (12) in a second opposing direction thereby coupling the apparatus (10) and the pipe (12). Other variations of the apparatus (10) and associated methods of use are also disclosed.