Patents by Inventor Chris Olson

Chris Olson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180138870
    Abstract: A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 17, 2018
    Inventors: Dan Willaim Nobbe, David Halchin, Jeffrey A. Dykstra, Michael P. Gaynor, David Kovac, Kelly Michael Mekechuk, Gary Frederick Kaatz, Chris Olson
  • Patent number: 9973145
    Abstract: An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: May 15, 2018
    Assignee: pSemi Corporation
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Patent number: 9960736
    Abstract: Control systems and methods for power amplifiers operating in envelope tracking mode are presented. A set of corresponding functions and modules are described and various possible system configurations using such functions and modules are presented.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: May 1, 2018
    Assignee: pSemi Corporation
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Patent number: 9960098
    Abstract: An integrated circuit architecture that provides a path having relatively low thermal resistance between one or more electronic devices and one or more thermal structures formed on an insulator layer on a substrate. Independent parallel thermal conduction paths are provided through the insulator layer, such as a buried oxide (“BOX”) layer, to allow heat to flow from the substrate layer to a thermal structure disposed upon the BOX layer. In some cases, the substrate is a silicon substrate layer supporting the thermal structure and a heat source, such as an electronic device (e.g., power amplifier, transistor, diode, resistor, etc.).
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: May 1, 2018
    Assignee: pSemi Corporation
    Inventor: Chris Olson
  • Patent number: 9941843
    Abstract: An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: April 10, 2018
    Assignee: pSemi Corporation
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Patent number: 9882531
    Abstract: A transistor stack can include a combination of floating and body tied devices. Improved performance of the RF amplifier can be obtained by using a single body tied device as the input transistor of the stack, or as the output transistor of the stack, while other transistors of the stack are floating transistors. Transient response of the RF amplifier can be improved by using all body tied devices in the stack.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: January 30, 2018
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Simon Edward Willard, Chris Olson, Tero Tapio Ranta
  • Publication number: 20170372984
    Abstract: An integrated circuit architecture that provides a path having relatively low thermal resistance between one or more electronic devices and one or more thermal structures formed on an insulator layer on a substrate. Independent parallel thermal conduction paths are provided through the insulator layer, such as a buried oxide (“BOX”) layer, to allow heat to flow from the substrate layer to a thermal structure disposed upon the BOX layer. In some cases, the substrate is a silicon substrate layer supporting the thermal structure and a heat source, such as an electronic device (e.g., power amplifier, transistor, diode, resistor, etc.).
    Type: Application
    Filed: June 27, 2016
    Publication date: December 28, 2017
    Inventor: Chris Olson
  • Patent number: 9847759
    Abstract: A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 19, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Dan William Nobbe, David Halchin, Jeffrey A. Dykstra, Michael P. Gaynor, David Kovac, Kelly Michael Mekechuk, Gary Frederick Kaatz, Chris Olson
  • Publication number: 20170359029
    Abstract: Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.
    Type: Application
    Filed: June 9, 2017
    Publication date: December 14, 2017
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Patent number: 9800211
    Abstract: Methods and devices are described for compensating an effect of aging due to, for example, hot carrier injection, or other device degradation mechanisms affecting a current flow, in an RF amplifier. In one case a replica circuit is used to sense the aging of the RF amplifier and adjust a biasing of the RF amplifier accordingly.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: October 24, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Dan William Nobbe, Chris Olson, David Kovac
  • Patent number: 9729107
    Abstract: Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: August 8, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Patent number: 9716477
    Abstract: Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can be an envelope tracking amplifier. Circuital arrangements to generate reference gate-to-source voltages for biasing of the gates of the transistors of the stack are also presented. Particular biasing for a case of an input transistor of the stack is also presented.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: July 25, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Poojan Wagh, Joseph Golat, David Kovac, Jeffrey A. Dykstra, Chris Olson
  • Patent number: 9667195
    Abstract: Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 30, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Publication number: 20170149391
    Abstract: An amplifier with switchable and tunable harmonic terminations and a variable impedance matching network is presented. The amplifier can adapt to different modes and different frequency bands of operation by appropriate switching and/or tuning of the harmonic terminations and/or the variable impedance matching network.
    Type: Application
    Filed: February 1, 2017
    Publication date: May 25, 2017
    Inventors: Gary Frederick Kaatz, Chris Olson
  • Patent number: 9660598
    Abstract: Devices and methods for improving reliability of scalable periphery amplifiers is described. Amplifier segments of the scalable periphery architecture can be rotated to distribute wear. Further, extra amplifier segments can be implemented on amplifier dies to extend the overall lifetime of amplifiers.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: May 23, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Chris Olson
  • Patent number: 9602063
    Abstract: An amplifier with switchable and tunable harmonic terminations and a variable impedance matching network is presented. The amplifier can adapt to different modes and different frequency bands of operation by appropriate switching and/or tuning of the harmonic terminations and/or the variable impedance matching network.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: March 21, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Gary Frederick Kaatz, Chris Olson
  • Patent number: 9590674
    Abstract: Semiconductor devices with switchable connection between body and a ground node are presented. Methods for operating and fabricating such semiconductor devices are also presented.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: March 7, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Chris Olson
  • Patent number: 9543901
    Abstract: Optimization methods via various circuital arrangements for amplifier with variable supply power are presented. In one embodiment, a switch can be controlled to include or exclude a feedback network in a feedback path to the amplifier to adjust a response of the amplifier dependent on a region of operation of the amplifier arrangement (e.g. linear region or compression region).
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: January 10, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Publication number: 20160301368
    Abstract: Methods and devices are described for compensating an effect of aging due to, for example, hot carrier injection, or other device degradation mechanisms affecting a current flow, in an RF amplifier. In one case a replica circuit is used to sense the aging of the RF amplifier and adjust a biasing of the RF amplifier accordingly.
    Type: Application
    Filed: June 21, 2016
    Publication date: October 13, 2016
    Inventors: Dan William Nobbe, Chris Olson, David Kovac
  • Patent number: 9438185
    Abstract: Devices and methods for improving reliability of sealable periphery amplifiers is described. Amplifier segments of the sealable periphery architecture can be rotated to distribute wear. Further, extra amplifier segments can be implemented on amplifier dies to extend the overall lifetime of amplifiers.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: September 6, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Chris Olson