Abstract: Provided is a method that encompasses the determination of a virtual trajectory within a virtual representation of a patient's anatomy, wherein the trajectory is defined by a user's visual axis relative to the three-dimensional virtual representation of the patient's anatomy. The method includes acquiring image data which describes the three-dimensional virtual representation of the patient's body part, acquiring position data which describes a spatial position of a user's visual axis within a virtual-world co-ordinate system, determining visualization data based on the image data and the position data, and determining virtual-world trajectory data based on the position data.

Abstract: Provided is a method that encompasses the determination of a virtual trajectory within a virtual representation of a patient's anatomy, wherein the trajectory is defined by a user's visual axis relative to the three-dimensional virtual representation of the patient's anatomy. The method includes acquiring image data which describes the three-dimensional virtual representation of the patient's body part, acquiring position data which describes a spatial position of a user's visual axis within a virtual-world co-ordinate system, determining visualization data based on the image data and the position data, and determining virtual-world trajectory data based on the position data.

Abstract: The invention describes a filling device with a discharge container for filling upwardly open packaging containers with at least one opening flap for opening and closing a discharge opening for the product, the opening flap being moveable along a path between a closed position and an open position by means of a driving element. At least one delay device is provided by means of which the movement of the opening flap may be delayed on a section of the path.

Abstract: A semiconductor wafer of monocrystalline silicon. The semiconductor wafer having: a substrate wafer of monocrystalline silicon; and a layer of monocrystalline silicon that lies on a front side of the substrate wafer. The substrate wafer has a crystal orientation. An averaged front side-based ZDD of the semiconductor wafer, with a division of a surface of an epitaxial layer into 16 sectors and an edge exclusion of 1 mm, is not less than ?30 nm/mm2 and not more than 0 nm/mm2. An ESFQRmax of the semiconductor wafer, with an edge exclusion of 1 mm and 72 sectors each with a length of 30 mm, is at most 10 nm.

Abstract: A semiconductor wafer processing susceptor for holding a wafer having an orientation notch during deposition of a layer on the wafer, having a placement surface for supporting the semiconductor wafer in the rear edge region of the wafer, the placement surface having a stepped outer delimitation, and an indentation of the outer delimitation of the placement surface for placement of the partial region of the edge region of the rear side of the wafer in which the orientation notch is located onto a partial region of the placement surface delimited by the indentation of the outer delimitation of the placement surface. The susceptor is used in a method for depositing a layer on a wafer having an orientation notch, and wafers made of monocrystalline silicon upon which layers are deposited using the susceptor have greater local flatness on both front and rear sides proximate the orientation notch.

Abstract: A semiconductor wafer of monocrystalline silicon. The semiconductor wafer having: a substrate wafer of monocrystalline silicon; and a layer of monocrystalline silicon that lies on a front side of the substrate wafer. The substrate wafer has a crystal orientation. An averaged front side-based ZDD of the semiconductor wafer, with a division of a surface of an epitaxial layer into 16 sectors and an edge exclusion of 1 mm, is not less than ?30 nm/mm2 and not more than 0 nm/mm2. An ESFQRmax of the semiconductor wafer, with an edge exclusion of 1 mm and 72 sectors each with a length of 30 mm, is at most 10 nm.

Abstract: Semiconductor wafers are coated with an epitaxially deposited layer in an epitaxy reactor, wherein at least one semiconductor wafer is arranged on a respective susceptor in the epitaxy reactor and a first deposition gas for coating the at least one semiconductor wafer is conducted through the epitaxy reactor, wherein an etching process in which a first etching gas and a carrier gas are conducted through the epitaxy reactor is carried out before the coating process, and wherein a cleaning process in which a second etching gas and subsequently in particular a second deposition gas are conducted through the epitaxy reactor after a predefinable number of coating processes, wherein for two or more etching processes preceding the respective coating process at least one variable which influences the etching process is set individually. Semiconductor wafers processed thereby have distinctly uniform topology.

Abstract: The invention describes a filling device with a discharge container for filling upwardly open packaging containers with at least one opening flap for opening and closing a discharge opening for the product, the opening flap being moveable along a path between a closed position and an open position by means of a driving element. At least one delay device is provided by means of which the movement of the opening flap may be delayed on a section of the path.

Abstract: An apparatus for depositing a material layer originating from process gas on a substrate wafer, contains: a reactor chamber delimited by an upper dome, a lower dome, and a side wall; a susceptor for holding the substrate wafer during the deposition of the material layer; a preheating ring surrounding the susceptor; a liner, on which the preheating ring is supported in a centered position wherein a gap having a uniform width is present between the preheating ring and the susceptor; and a spacer acting between the liner and the preheating ring, the spacer keeping the preheating ring in the centered position and providing a distance ? between the preheating ring and the liner.

Abstract: Semiconductor wafers are coated with an epitaxially deposited layer in an epitaxy reactor, wherein at least one semiconductor wafer is arranged on a respective susceptor in the epitaxy reactor and a first deposition gas for coating the at least one semiconductor wafer is conducted through the epitaxy reactor, wherein an etching process in which a first etching gas and a carrier gas are conducted through the epitaxy reactor is carried out before the coating process, and wherein a cleaning process in which a second etching gas and subsequently in particular a second deposition gas are conducted through the epitaxy reactor after a predefinable number of coating processes, wherein for two or more etching processes preceding the respective coating process at least one variable which influences the etching process is set individually. Semiconductor wafers processed thereby have distinctly uniform topology.

Abstract: A semiconductor wafer processing susceptor for holding a wafer having an orientation notch during deposition of a layer on the wafer, having a placement surface for supporting the semiconductor wafer in the rear edge region of the wafer, the placement surface having a stepped outer delimitation, and an indentation of the outer delimitation of the placement surface for placement of the partial region of the edge region of the rear side of the wafer in which the orientation notch is located onto a partial region of the placement surface delimited by the indentation of the outer delimitation of the placement surface. The susceptor is used in a method for depositing a layer on a wafer having an orientation notch, and wafers made of monocrystalline silicon upon which layers are deposited using the susceptor have greater local flatness on both front and rear sides proximate the orientation notch.

Abstract: A semiconductor wafer processing susceptor for holding a wafer having an orientation notch during deposition of a layer on the wafer, having a placement surface for supporting the semiconductor wafer in the rear edge region of the wafer, the placement surface having a stepped outer delimitation, and an indentation of the outer delimitation of the placement surface for placement of the partial region of the edge region of the rear side of the wafer in which the orientation notch is located onto a partial region of the placement surface delimited by the indentation of the outer delimitation of the placement surface. The susceptor is used in a method for depositing a layer on a wafer having an orientation notch, and wafers made of monocrystalline silicon upon which layers are deposited using the susceptor have greater local flatness on both front and rear sides proximate the orientation notch.

Abstract: A semiconductor wafer processing susceptor for holding a wafer having an orientation notch during deposition of a layer on the wafer, having a placement surface for supporting the semiconductor wafer in the rear edge region of the wafer, the placement surface having a stepped outer delimitation, and an indentation of the outer delimitation of the placement surface for placement of the partial region of the edge region of the rear side of the wafer in which the orientation notch is located onto a partial region of the placement surface delimited by the indentation of the outer delimitation of the placement surface. The susceptor is used in a method for depositing a layer on a wafer having an orientation notch, and wafers made of monocrystalline silicon upon which layers are deposited using the susceptor have greater local flatness on both front and rear sides proximate the orientation notch.

Abstract: Semiconductor wafers composed of silicon with an epitaxially deposited layer, are prepared by: placing a dummy wafer on a susceptor of an epitaxy reactor; conducting an etching gas through the epitaxy reactor in order to remove residues on surfaces in the epitaxy reactor through the action of the etching gas; conducting a first deposition gas through the epitaxy reactor in order to deposit silicon on surfaces in the epitaxy reactor; replacing the dummy wafer by a substrate wafer composed of silicon; and conducting a second deposition gas through the epitaxy reactor in order to deposit an epitaxial layer on the substrate wafer.

Abstract: Epitaxially coated semiconductor wafers are prepared by a process in which a semiconductor wafer polished at least on its front side is placed on a susceptor in a single-wafer epitaxy reactor and epitaxially coated on its polished front side at temperatures of 1000-1200° C., wherein, after coating, the semiconductor wafer is cooled in the temperature range from 1200° C. to 900° C. at a rate of less than 5° C. per second. In a second method for producing an epitaxially coated wafer, the wafer is placed on a susceptor in the epitaxy reactor and epitaxially coated on its polished front side at a deposition temperature of 1000-1200° C., and after coating, and while still at the deposition temperature, the wafer is raised for 1-60 seconds to break connections between susceptor and wafer produced by deposited semiconductor material before the wafer is cooled.

Abstract: A method for quantitatively ranking a plurality of prospects in a subsurface region, includes generating a subsurface digital elevatiomodel of each prospect and identifying a region of subsurface imaging uncertainty within the model. The method further includes generating, for the region of imaging uncertainty, multiple realizations of the model, and determining geometrical and physical characteristics of the prospect for each realization. The characteristics, chosen to be related to a likelihood that the prospect is lower risk, are summed and the prospects are ranked in accordance therewith.

Abstract: A susceptor for supporting a semiconductor wafer during deposition of a layer on a front side of the semiconductor wafer, the semiconductor wafer having a diameter D and, at its edge, a notch having a depth T, comprising: a ring-shaped placement area having an internal diameter d for the placement of the semiconductor wafer in the edge region of a rear side of the semiconductor wafer, wherein, with the semiconductor wafer having been placed, the relationship (D?d)/2<T is satisfied; and a protrusion of the area for the placement of semiconductor wafer in the region of the notch of the semiconductor wafer extending the placement area inward, and which completely underlays the notch of the semiconductor wafer.

Abstract: An apparatus for depositing a material layer originating from process gas on a substrate wafer, contains: a reactor chamber delimited by an upper dome, a lower dome, and a side wall; a susceptor for holding the substrate wafer during the deposition of the material layer; a preheating ring surrounding the susceptor; a liner, on which the preheating ring is supported in a centered position wherein a gap having a uniform width is present between the preheating ring and the susceptor; and a spacer acting between the liner and the preheating ring, the spacer keeping the preheating ring in the centered position and providing a distance ? between the preheating ring and the liner.

Abstract: Silicon wafers polished on their front sides are individually placed on a susceptor in an epitaxy reactor and firstly pretreated under a hydrogen atmosphere, and secondly with addition of an etching medium with a flow rate of 1.5-5 slm to the hydrogen atmosphere, the hydrogen flow rate being 1-100 slm in both steps, and subsequently epitaxially coated on the polished front side, and then removed from the reactor. In a second method, gas flows introduced into the reactor by injectors are distributed into outer and inner zones of the chamber, such that the inner zone gas flow acts on a wafer central region and the outer zone gas flow acts on a wafer edge region, the inner/outer distribution of the etching medium I/O=0-0.75. Silicon wafers having an epitaxial layer having global flatness value GBIR of 0.02-0.06 ?m, relative to an edge exclusion of 2 mm are produced.

Abstract: Semiconductor wafers composed of silicon with an epitaxially deposited layer, are prepared by: placing a dummy wafer on a susceptor of an epitaxy reactor; conducting an etching gas through the epitaxy reactor in order to remove residues on surfaces in the epitaxy reactor through the action of the etching gas; conducting a first deposition gas through the epitaxy reactor in order to deposit silicon on surfaces in the epitaxy reactor; replacing the dummy wafer by a substrate wafer composed of silicon; and conducting a second deposition gas through the epitaxy reactor in order to deposit an epitaxial layer on the substrate wafer.